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Changes of Revision 19
View file
r8168.changes
Changed
@@ -1,4 +1,10 @@ ------------------------------------------------------------------- +Tue May 10 10:30:35 UTC 2022 - Werner Fink <werner@suse.de> + +- Update to new version 8.050.00 +- Port patches r8168-kernel_version.patch and r8168-configuration.patch + +------------------------------------------------------------------- Thu Jan 21 15:49:06 UTC 2021 - Werner Fink <werner@suse.de> - Now we change to github for basic download
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r8168.spec
Changed
@@ -18,7 +18,7 @@ #!BuildIgnore: enough-build-resources Name: r8168 -Version: 8.048.03 +Version: 8.050.00 Release: 0 Summary: Device driver for RealTek Gigabit Ethernet controllers License: GPL-2.0-or-later
View file
r8168-configuration.patch
Changed
@@ -3,8 +3,8 @@ 1 file changed, 1 insertion(+) --- src/Makefile -+++ src/Makefile 2018-01-10 14:35:59.981468278 +0000 -@@ -44,6 +44,7 @@ ENABLE_S0_MAGIC_PACKET = n ++++ src/Makefile 2022-05-10 10:26:59.851240712 +0000 +@@ -48,6 +48,7 @@ CONFIG_CTAP_SHORT_OFF = n ifneq ($(KERNELRELEASE),) obj-m := r8168.o r8168-objs := r8168_n.o r8168_asf.o rtl_eeprom.o rtltool.o
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r8168-kernel_version.patch
Changed
@@ -4,8 +4,8 @@ 2 files changed, 18 insertions(+), 1 deletion(-) --- src/r8168.h -+++ src/r8168.h 2021-01-25 09:25:12.615124741 +0000 -@@ -116,6 +116,10 @@ do { \ ++++ src/r8168.h 2022-05-10 10:26:28.831787721 +0000 +@@ -121,6 +121,10 @@ do { \ } while (0) #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) @@ -17,8 +17,8 @@ #if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present) #define vlan_tx_tag_present skb_vlan_tag_present --- src/r8168_n.c -+++ src/r8168_n.c 2021-01-25 11:42:13.268115241 +0000 -@@ -60,11 +60,16 @@ ++++ src/r8168_n.c 2022-05-10 10:26:28.871787016 +0000 +@@ -61,11 +61,16 @@ #include <linux/rtnetlink.h> #include <linux/completion.h> @@ -35,7 +35,7 @@ #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) #include <linux/prefetch.h> #endif -@@ -459,8 +464,12 @@ static void rtl8168_set_rx_mode(struct n +@@ -571,8 +576,12 @@ static void rtl8168_set_rx_mode(struct n #if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) static void rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue); #else @@ -48,7 +48,7 @@ static struct net_device_stats *rtl8168_get_stats(struct net_device *dev); static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, napi_budget); static int rtl8168_change_mtu(struct net_device *dev, int new_mtu); -@@ -27948,8 +27957,12 @@ static void +@@ -28748,8 +28757,12 @@ static void rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue) #else static void @@ -61,7 +61,7 @@ { struct rtl8168_private *tp = netdev_priv(dev); unsigned long flags; -@@ -28655,7 +28668,7 @@ process_pkt: +@@ -29435,7 +29448,7 @@ process_pkt: if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0) rtl8168_rx_skb(tp, skb);
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r8168-8.048.03.tar.gz/Makefile -> r8168-8.050.00.tar.gz/Makefile
Changed
@@ -1,9 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
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r8168-8.048.03.tar.gz/autorun.sh -> r8168-8.050.00.tar.gz/autorun.sh
Changed
@@ -1,4 +1,5 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0-only # invoke insmod with all arguments we got # and use a pathname, as insmod doesn't look in . by default
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r8168-8.048.03.tar.gz/src/Makefile -> r8168-8.050.00.tar.gz/src/Makefile
Changed
@@ -1,9 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -40,6 +41,9 @@ ENABLE_S5_KEEP_CURR_MAC = n ENABLE_EEE = y ENABLE_S0_MAGIC_PACKET = n +CONFIG_DYNAMIC_ASPM = y +ENABLE_USE_FIRMWARE_FILE = n +CONFIG_CTAP_SHORT_OFF = n ifneq ($(KERNELRELEASE),) obj-m := r8168.o @@ -83,6 +87,16 @@ ifeq ($(ENABLE_S0_MAGIC_PACKET), y) EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET endif + ifeq ($(CONFIG_DYNAMIC_ASPM), y) + EXTRA_CFLAGS += -DCONFIG_DYNAMIC_ASPM + endif + ifeq ($(ENABLE_USE_FIRMWARE_FILE), y) + r8168-objs += r8168_firmware.o + EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE + endif + ifeq ($(CONFIG_CTAP_SHORT_OFF), y) + EXTRA_CFLAGS += -DCONFIG_CTAP_SHORT_OFF + endif else BASEDIR := /lib/modules/$(shell uname -r) KERNELDIR ?= $(BASEDIR)/build
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r8168-8.048.03.tar.gz/src/Makefile_linux24x -> r8168-8.050.00.tar.gz/src/Makefile_linux24x
Changed
@@ -1,9 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2019 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
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r8168-8.048.03.tar.gz/src/r8168.h -> r8168-8.050.00.tar.gz/src/r8168.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -36,6 +37,10 @@ #include "r8168_realwow.h" #include "r8168_fiber.h" +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) +typedef int netdev_tx_t; +#endif + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) #define skb_transport_offset(skb) (skb->h.raw - skb->data) #endif @@ -133,6 +138,10 @@ #endif #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0) +#define eth_random_addr(addr) random_ether_addr(addr) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0) + #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) #define netdev_features_t u32 @@ -335,12 +344,12 @@ #define DASH_SUFFIX "" #endif -#define RTL8168_VERSION "8.048.03" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX +#define RTL8168_VERSION "8.050.00" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX #define MODULENAME "r8168" #define PFX MODULENAME ": " #define GPL_CLAIM "\ -r8168 Copyright (C) 2020 Realtek NIC software team <nicfae@realtek.com> \n \ +r8168 Copyright (C) 2022 Realtek NIC software team <nicfae@realtek.com> \n \ This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \ This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n" @@ -423,12 +432,18 @@ #define RTL8168_LINK_TIMEOUT (1 * HZ) #define RTL8168_ESD_TIMEOUT (2 * HZ) -#define NUM_TX_DESC 1024 /* Number of Tx descriptor registers */ -#define NUM_RX_DESC 1024 /* Number of Rx descriptor registers */ +#define MAX_NUM_TX_DESC 1024 /* Maximum number of Tx descriptor registers */ +#define MAX_NUM_RX_DESC 1024 /* Maximum number of Rx descriptor registers */ + +#define MIN_NUM_TX_DESC 32 /* Minimum number of Tx descriptor registers */ +#define MIN_NUM_RX_DESC 32 /* Minimum number of Rx descriptor registers */ + +#define NUM_TX_DESC 256 /* Number of Tx descriptor registers */ +#define NUM_RX_DESC 256 /* Number of Rx descriptor registers */ #define RX_BUF_SIZE 0x05F3 /* 0x05F3 = 1522bye + 1 */ -#define R8168_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) -#define R8168_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) + +#define OCP_STD_PHY_BASE 0xa400 #define NODE_ADDRESS_SIZE 6 @@ -492,6 +507,10 @@ #define ADVERTISE_1000HALF 0x100 #endif +#ifndef ETH_MIN_MTU +#define ETH_MIN_MTU 68 +#endif + /*****************************************************************************/ //#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) @@ -1173,6 +1192,7 @@ PMEnable = (1 << 0), /* Power Management Enable */ /* Config2 register */ + ClkReqEn = (1 << 7), /* Clock Request Enable */ PMSTS_En = (1 << 5), /* Config3 register */ @@ -1194,6 +1214,7 @@ UWF = (1 << 4), /* Accept Unicast wakeup frame */ LanWake = (1 << 1), /* LanWake enable/disable */ PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */ + ASPM_en = (1 << 0), /* ASPM enable */ /* CPlusCmd */ EnableBist = (1 << 15), @@ -1454,6 +1475,15 @@ u32 pci_sn_h; }; +/* Flow Control Settings */ +enum rtl8168_fc_mode { + rtl8168_fc_none = 0, + rtl8168_fc_rx_pause, + rtl8168_fc_tx_pause, + rtl8168_fc_full, + rtl8168_fc_default +}; + struct rtl8168_private { void __iomem *mmio_addr; /* memory map physical address */ struct pci_dev *pci_dev; /* Index of PCI device */ @@ -1477,12 +1507,14 @@ u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ u32 dirty_rx; u32 dirty_tx; + u32 num_rx_desc; /* Number of Rx descriptor registers */ + u32 num_tx_desc; /* Number of Tx descriptor registers */ struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */ struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */ dma_addr_t TxPhyAddr; dma_addr_t RxPhyAddr; - struct sk_buff *Rx_skbuffNUM_RX_DESC; /* Rx data buffers */ - struct ring_info tx_skbNUM_TX_DESC; /* Tx data buffers */ + struct sk_buff *Rx_skbuffMAX_NUM_RX_DESC; /* Rx data buffers */ + struct ring_info tx_skbMAX_NUM_TX_DESC; /* Tx data buffers */ unsigned rx_buf_sz; struct timer_list esd_timer; struct timer_list link_timer; @@ -1510,6 +1542,7 @@ u8 duplex; u32 speed; u32 advertising; + enum rtl8168_fc_mode fcpause; u16 eeprom_len; u16 cur_page; u32 bios_setting; @@ -1554,9 +1587,6 @@ u8 UseSwPaddingShortPkt; - void *ShortPacketEmptyBuffer; - dma_addr_t ShortPacketEmptyBufferPhy; - u8 RequireAdcBiasPatch; u16 AdcBiasPatchIoffset; @@ -1575,20 +1605,35 @@ u8 HwSuppPhyOcpVer; + u8 HwSuppAspmClkIntrLock; + u16 NicCustLedValue; + u8 HwSuppUpsVer; + u8 HwSuppMagicPktVer; u8 HwSuppCheckPhyDisableModeVer; u8 random_mac; - u8 HwSuppGigaForceMode; - + u16 phy_reg_aner; u16 phy_reg_anlpar; + u16 phy_reg_gbsr; u32 HwPcieSNOffset; + u8 HwSuppEsdVer; + u8 TestPhyOcpReg; + u16 BackupPhyFuseDout_15_0; + u16 BackupPhyFuseDout_31_16; + u16 BackupPhyFuseDout_47_32; + u16 BackupPhyFuseDout_63_48; + + const char *fw_name; + struct rtl8168_fw *rtl_fw; + u32 ocp_base; + //Dash+++++++++++++++++ u8 HwSuppDashVer; u8 DASH; @@ -1618,37 +1663,29 @@ u8 DashFwDisableRx; - void *UnalignedSendToFwBufferVa; void *SendToFwBuffer ; - u64 SendToFwBufferPhy ; + dma_addr_t SendToFwBufferPhy ; u8 SendingToFw; - dma_addr_t UnalignedSendToFwBufferPa; PTX_DASH_SEND_FW_DESC TxDashSendFwDesc; - u64 TxDashSendFwDescPhy; - u8 *UnalignedTxDashSendFwDescVa; + dma_addr_t TxDashSendFwDescPhy; u32 SizeOfTxDashSendFwDescMemAlloc; u32 SizeOfTxDashSendFwDesc ; u32 NumTxDashSendFwDesc ; u32 CurrNumTxDashSendFwDesc ; u32 LastSendNumTxDashSendFwDesc ; - dma_addr_t UnalignedTxDashSendFwDescPa; u32 NumRecvFromFwBuffer ; u32 SizeOfRecvFromFwBuffer ; u32 SizeOfRecvFromFwBufferMemAlloc ; void *RecvFromFwBuffer ; - u64 RecvFromFwBufferPhy ; + dma_addr_t RecvFromFwBufferPhy ; - void *UnalignedRecvFromFwBufferVa; - dma_addr_t UnalignedRecvFromFwBufferPa; PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc; - u64 RxDashRecvFwDescPhy; - u8 *UnalignedRxDashRecvFwDescVa; + dma_addr_t RxDashRecvFwDescPhy; u32 SizeOfRxDashRecvFwDescMemAlloc; u32 SizeOfRxDashRecvFwDesc ; u32 NumRxDashRecvFwDesc ; u32 CurrNumRxDashRecvFwDesc ; - dma_addr_t UnalignedRxDashRecvFwDescPa; u8 DashReqRegValue; u16 HostReqValue; @@ -1681,6 +1718,8 @@ u32 eee_adv_t; u8 eee_enabled; + u32 dynamic_aspm_packet_count; + #ifdef ENABLE_R8168_PROCFS //Procfs support struct proc_dir_entry *proc_dir; @@ -1728,6 +1767,8 @@ CFG_METHOD_31, CFG_METHOD_32, CFG_METHOD_33, + CFG_METHOD_34, + CFG_METHOD_35, CFG_METHOD_MAX, CFG_METHOD_DEFAULT = 0xFF }; @@ -1768,15 +1809,20 @@ #define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019) #define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0055) #define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003) +#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0004) //hwoptimize #define HW_PATCH_SOC_LAN (BIT_0) #define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2) -void rtl8168_mdio_write(struct rtl8168_private *tp, u32 RegAddr, u32 value); +#define HW_PHY_STATUS_INI 1 +#define HW_PHY_STATUS_EXT_INI 2 +#define HW_PHY_STATUS_LAN_ON 3 + +void rtl8168_mdio_write(struct rtl8168_private *tp, u16 RegAddr, u16 value); void rtl8168_mdio_prot_write(struct rtl8168_private *tp, u32 RegAddr, u32 value); void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp, u32 RegAddr, u32 value); -u32 rtl8168_mdio_read(struct rtl8168_private *tp, u32 RegAddr); +u32 rtl8168_mdio_read(struct rtl8168_private *tp, u16 RegAddr); u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp, u32 RegAddr); u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp, u32 RegAddr); void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value); @@ -1789,7 +1835,6 @@ void rtl8168_init_ring_indexes(struct rtl8168_private *tp); int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type); void rtl8168_oob_mutex_lock(struct rtl8168_private *tp); -u32 rtl8168_mdio_read(struct rtl8168_private *tp, u32 RegAddr); u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len); u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 base_address); u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, u32 base_address); @@ -1811,6 +1856,7 @@ #define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 ) #define HW_SUPP_SERDES_PHY(_M) ((_M)->HwSuppSerDesPhyVer > 0) #define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0) +#define HW_SUPPORT_UPS_MODE(_M) ((_M)->HwSuppUpsVer > 0) #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) #define netdev_mc_count(dev) ((dev)->mc_count)
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r8168-8.048.03.tar.gz/src/r8168_asf.c -> r8168-8.050.00.tar.gz/src/r8168_asf.c
Changed
@@ -1,10 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
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r8168-8.048.03.tar.gz/src/r8168_asf.h -> r8168-8.050.00.tar.gz/src/r8168_asf.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
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r8168-8.048.03.tar.gz/src/r8168_dash.h -> r8168-8.050.00.tar.gz/src/r8168_dash.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -114,25 +115,23 @@ }; typedef struct _RX_DASH_FROM_FW_DESC { - u16 length; - u8 statusLowByte; - u8 statusHighByte; - u32 resv; - u64 BufferAddress; + __le16 length; + __le16 status; + __le32 resv; + __le64 BufferAddress; } RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC; typedef struct _TX_DASH_SEND_FW_DESC { - u16 length; - u8 statusLowByte; - u8 statusHighByte; - u32 resv; - u64 BufferAddress; + __le16 length; + __le16 status; + __le32 resv; + __le64 BufferAddress; } TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC; typedef struct _OSOOBHdr { - u32 len; + __le32 len; u8 type; u8 flag; u8 hostReqV; @@ -177,12 +176,11 @@ #define HW_DASH_SUPPORT_TYPE_2(_M) ((_M)->HwSuppDashVer == 2) #define HW_DASH_SUPPORT_TYPE_3(_M) ((_M)->HwSuppDashVer == 3) -#define RECV_FROM_FW_BUF_SIZE (1520) -#define SEND_TO_FW_BUF_SIZE (1520) +#define RECV_FROM_FW_BUF_SIZE (2048) +#define SEND_TO_FW_BUF_SIZE (2048) #define RX_DASH_FROM_FW_OWN BIT_15 #define TX_DASH_SEND_FW_OWN BIT_15 -#define TX_DASH_SEND_FW_OWN_HIGHBYTE BIT_7 #define TXS_CC3_0 (BIT_0|BIT_1|BIT_2|BIT_3) #define TXS_EXC BIT_4
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r8168-8.048.03.tar.gz/src/r8168_fiber.h -> r8168-8.050.00.tar.gz/src/r8168_fiber.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -43,24 +44,26 @@ enum { FIBER_STAT_NOT_CHECKED = 0, - FIBER_STAT_CONNECT, + FIBER_STAT_CONNECT_EEPROM, FIBER_STAT_DISCONNECT, + FIBER_STAT_CONNECT_GPO, FIBER_STAT_MAX }; #define HW_FIBER_MODE_ENABLED(_M) ((_M)->HwFiberModeVer > 0) +#define HW_FIBER_STATUS_CONNECTED(_M) (((_M)->HwFiberStat == FIBER_STAT_CONNECT_EEPROM) || ((_M)->HwFiberStat == FIBER_STAT_CONNECT_GPO)) +#define HW_FIBER_STATUS_DISCONNECTED(_M) ((_M)->HwFiberStat == FIBER_STAT_DISCONNECT) +struct rtl8168_private; - -void rtl8168_hw_init_fiber_nic(struct net_device *dev); -void rtl8168_hw_fiber_nic_d3_para(struct net_device *dev); -void rtl8168_hw_fiber_phy_config(struct net_device *dev); -void rtl8168_hw_switch_mdi_to_fiber(struct net_device *dev); -void rtl8168_hw_switch_mdi_to_nic(struct net_device *dev); -unsigned int rtl8168_hw_fiber_link_ok(struct net_device *dev); -void rtl8168_check_fiber_link_status(struct net_device *dev); -void rtl8168_check_hw_fiber_mode_support(struct net_device *dev); -void rtl8168_set_fiber_mode_software_variable(struct net_device *dev); - +void rtl8168_hw_init_fiber_nic(struct rtl8168_private *tp); +void rtl8168_hw_fiber_nic_d3_para(struct rtl8168_private *tp); +void rtl8168_hw_fiber_phy_config(struct rtl8168_private *tp); +void rtl8168_hw_switch_mdi_to_fiber(struct rtl8168_private *tp); +void rtl8168_hw_switch_mdi_to_nic(struct rtl8168_private *tp); +unsigned int rtl8168_hw_fiber_link_ok(struct rtl8168_private *tp); +void rtl8168_check_fiber_link_status(struct rtl8168_private *tp); +void rtl8168_check_hw_fiber_mode_support(struct rtl8168_private *tp); +void rtl8168_set_fiber_mode_software_variable(struct rtl8168_private *tp); #endif /* _LINUX_R8168_FIBER_H */
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r8168-8.050.00.tar.gz/src/r8168_firmware.c
Added
@@ -0,0 +1,264 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8168 is the Linux device driver released for Realtek Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see <http://www.gnu.org/licenses/>. +# +# Author: +# Realtek NIC software team <nicfae@realtek.com> +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#include <linux/version.h> +#include <linux/delay.h> +#include <linux/firmware.h> + +#include "r8168_firmware.h" + +enum rtl_fw_opcode { + PHY_READ = 0x0, + PHY_DATA_OR = 0x1, + PHY_DATA_AND = 0x2, + PHY_BJMPN = 0x3, + PHY_MDIO_CHG = 0x4, + PHY_CLEAR_READCOUNT = 0x7, + PHY_WRITE = 0x8, + PHY_READCOUNT_EQ_SKIP = 0x9, + PHY_COMP_EQ_SKIPN = 0xa, + PHY_COMP_NEQ_SKIPN = 0xb, + PHY_WRITE_PREVIOUS = 0xc, + PHY_SKIPN = 0xd, + PHY_DELAY_MS = 0xe, +}; + +struct fw_info { + u32 magic; + char versionRTL8168_VER_SIZE; + __le32 fw_start; + __le32 fw_len; + u8 chksum; +} __packed; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0) +#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER)) +#endif +#define FW_OPCODE_SIZE sizeof_field(struct rtl8168_fw_phy_action, code0) + +static bool rtl8168_fw_format_ok(struct rtl8168_fw *rtl_fw) +{ + const struct firmware *fw = rtl_fw->fw; + struct fw_info *fw_info = (struct fw_info *)fw->data; + struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action; + + if (fw->size < FW_OPCODE_SIZE) + return false; + + if (!fw_info->magic) { + size_t i, size, start; + u8 checksum = 0; + + if (fw->size < sizeof(*fw_info)) + return false; + + for (i = 0; i < fw->size; i++) + checksum += fw->datai; + if (checksum != 0) + return false; + + start = le32_to_cpu(fw_info->fw_start); + if (start > fw->size) + return false; + + size = le32_to_cpu(fw_info->fw_len); + if (size > (fw->size - start) / FW_OPCODE_SIZE) + return false; + + strscpy(rtl_fw->version, fw_info->version, RTL8168_VER_SIZE); + + pa->code = (__le32 *)(fw->data + start); + pa->size = size; + } else { + if (fw->size % FW_OPCODE_SIZE) + return false; + + strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8168_VER_SIZE); + + pa->code = (__le32 *)fw->data; + pa->size = fw->size / FW_OPCODE_SIZE; + } + + return true; +} + +static bool rtl8168_fw_data_ok(struct rtl8168_fw *rtl_fw) +{ + struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action; + size_t index; + + for (index = 0; index < pa->size; index++) { + u32 action = le32_to_cpu(pa->codeindex); + u32 val = action & 0x0000ffff; + u32 regno = (action & 0x0fff0000) >> 16; + + switch (action >> 28) { + case PHY_READ: + case PHY_DATA_OR: + case PHY_DATA_AND: + case PHY_CLEAR_READCOUNT: + case PHY_WRITE: + case PHY_WRITE_PREVIOUS: + case PHY_DELAY_MS: + break; + + case PHY_MDIO_CHG: + if (val > 1) + goto out; + break; + + case PHY_BJMPN: + if (regno > index) + goto out; + break; + case PHY_READCOUNT_EQ_SKIP: + if (index + 2 >= pa->size) + goto out; + break; + case PHY_COMP_EQ_SKIPN: + case PHY_COMP_NEQ_SKIPN: + case PHY_SKIPN: + if (index + 1 + regno >= pa->size) + goto out; + break; + + default: + dev_err(rtl_fw->dev, "Invalid action 0x%08x\n", action); + return false; + } + } + + return true; +out: + dev_err(rtl_fw->dev, "Out of range of firmware\n"); + return false; +} + +void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw) +{ + struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action; + rtl8168_fw_write_t fw_write = rtl_fw->phy_write; + rtl8168_fw_read_t fw_read = rtl_fw->phy_read; + int predata = 0, count = 0; + size_t index; + + for (index = 0; index < pa->size; index++) { + u32 action = le32_to_cpu(pa->codeindex); + u32 data = action & 0x0000ffff; + u32 regno = (action & 0x0fff0000) >> 16; + enum rtl_fw_opcode opcode = action >> 28; + + if (!action) + break; + + switch (opcode) { + case PHY_READ: + predata = fw_read(tp, regno); + count++; + break; + case PHY_DATA_OR: + predata |= data; + break; + case PHY_DATA_AND: + predata &= data; + break; + case PHY_BJMPN: + index -= (regno + 1); + break; + case PHY_MDIO_CHG: + if (data) { + fw_write = rtl_fw->mac_mcu_write; + fw_read = rtl_fw->mac_mcu_read; + } else { + fw_write = rtl_fw->phy_write; + fw_read = rtl_fw->phy_read; + } + + break; + case PHY_CLEAR_READCOUNT: + count = 0; + break; + case PHY_WRITE: + fw_write(tp, regno, data); + break; + case PHY_READCOUNT_EQ_SKIP: + if (count == data) + index++; + break; + case PHY_COMP_EQ_SKIPN: + if (predata == data) + index += regno; + break; + case PHY_COMP_NEQ_SKIPN: + if (predata != data) + index += regno; + break; + case PHY_WRITE_PREVIOUS: + fw_write(tp, regno, predata); + break; + case PHY_SKIPN: + index += regno; + break; + case PHY_DELAY_MS: + mdelay(data); + break; + } + } +} + +void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw) +{ + release_firmware(rtl_fw->fw); +} + +int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw) +{ + int rc; + + rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev); + if (rc < 0) + goto out; + + if (!rtl8168_fw_format_ok(rtl_fw) || !rtl8168_fw_data_ok(rtl_fw)) { + release_firmware(rtl_fw->fw); + rc = -EINVAL; + goto out; + } + + return 0; +out: + dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n", + rtl_fw->fw_name, rc); + return rc; +}
View file
r8168-8.050.00.tar.gz/src/r8168_firmware.h
Added
@@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8168 is the Linux device driver released for Realtek 2.5Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see <http://www.gnu.org/licenses/>. +# +# Author: +# Realtek NIC software team <nicfae@realtek.com> +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_RTL8168_FIRMWARE_H +#define _LINUX_RTL8168_FIRMWARE_H + +#include <linux/device.h> +#include <linux/firmware.h> + +struct rtl8168_private; +typedef void (*rtl8168_fw_write_t)(struct rtl8168_private *tp, u16 reg, u16 val); +typedef u32 (*rtl8168_fw_read_t)(struct rtl8168_private *tp, u16 reg); + +#define RTL8168_VER_SIZE 32 + +struct rtl8168_fw { + rtl8168_fw_write_t phy_write; + rtl8168_fw_read_t phy_read; + rtl8168_fw_write_t mac_mcu_write; + rtl8168_fw_read_t mac_mcu_read; + const struct firmware *fw; + const char *fw_name; + struct device *dev; + + char versionRTL8168_VER_SIZE; + + struct rtl8168_fw_phy_action { + __le32 *code; + size_t size; + } phy_action; +}; + +int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw); +void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw); +void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw); + +#endif /* _LINUX_RTL8168_FIRMWARE_H */
View file
r8168-8.048.03.tar.gz/src/r8168_n.c -> r8168-8.050.00.tar.gz/src/r8168_n.c
Changed
@@ -1,10 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -87,16 +88,81 @@ #include "r8168_asf.h" #include "rtl_eeprom.h" #include "rtltool.h" +#include "r8168_firmware.h" #ifdef ENABLE_R8168_PROCFS #include <linux/proc_fs.h> #include <linux/seq_file.h> #endif +#define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw" +#define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw" +#define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw" +#define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw" +#define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw" +#define FIRMWARE_8168E_4 "rtl_nic/rtl8168e-4.fw" +#define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw" +#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw" +#define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw" +#define FIRMWARE_8411_2 "rtl_nic/rtl8411-2.fw" +#define FIRMWARE_8168G_2 "rtl_nic/rtl8168g-2.fw" +#define FIRMWARE_8168G_3 "rtl_nic/rtl8168g-3.fw" +#define FIRMWARE_8168EP_1 "rtl_nic/rtl8168ep-1.fw" +#define FIRMWARE_8168EP_2 "rtl_nic/rtl8168ep-2.fw" +#define FIRMWARE_8168EP_3 "rtl_nic/rtl8168ep-3.fw" +#define FIRMWARE_8168H_1 "rtl_nic/rtl8168h-1.fw" +#define FIRMWARE_8168H_2 "rtl_nic/rtl8168h-2.fw" +#define FIRMWARE_8168H_3 "rtl_nic/rtl8168h-3.fw" +#define FIRMWARE_8168FP_3 "rtl_nic/rtl8168fp-3.fw" +#define FIRMWARE_8168FP_4 "rtl_nic/rtl8168fp-4.fw" + /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). The RTL chips use a 64 element hash table based on the Ethernet CRC. */ static const int multicast_filter_limit = 32; +static const struct { + const char *name; + const char *fw_name; +} rtl_chip_fw_infos = { + /* PCI-E devices. */ + CFG_METHOD_1 = {"RTL8168B/8111", }, + CFG_METHOD_2 = {"RTL8168B/8111", }, + CFG_METHOD_3 = {"RTL8168B/8111", }, + CFG_METHOD_4 = {"RTL8168C/8111C", }, + CFG_METHOD_5 = {"RTL8168C/8111C", }, + CFG_METHOD_6 = {"RTL8168C/8111C", }, + CFG_METHOD_7 = {"RTL8168CP/8111CP", }, + CFG_METHOD_8 = {"RTL8168CP/8111CP", }, + CFG_METHOD_9 = {"RTL8168D/8111D", FIRMWARE_8168D_1}, + CFG_METHOD_10 = {"RTL8168D/8111D", FIRMWARE_8168D_2}, + CFG_METHOD_11 = {"RTL8168DP/8111DP", }, + CFG_METHOD_12 = {"RTL8168DP/8111DP", }, + CFG_METHOD_13 = {"RTL8168DP/8111DP", }, + CFG_METHOD_14 = {"RTL8168E/8111E", FIRMWARE_8168E_1}, + CFG_METHOD_15 = {"RTL8168E/8111E", FIRMWARE_8168E_2}, + CFG_METHOD_16 = {"RTL8168E-VL/8111E-VL", FIRMWARE_8168E_3}, + CFG_METHOD_17 = {"RTL8168E-VL/8111E-VL", FIRMWARE_8168E_4}, + CFG_METHOD_18 = {"RTL8168F/8111F", FIRMWARE_8168F_1}, + CFG_METHOD_19 = {"RTL8168F/8111F", FIRMWARE_8168F_2}, + CFG_METHOD_20 = {"RTL8411", FIRMWARE_8411_1}, + CFG_METHOD_21 = {"RTL8168G/8111G", FIRMWARE_8168G_2}, + CFG_METHOD_22 = {"RTL8168G/8111G", }, + CFG_METHOD_23 = {"RTL8168EP/8111EP", FIRMWARE_8168EP_1}, + CFG_METHOD_24 = {"RTL8168GU/8111GU", }, + CFG_METHOD_25 = {"RTL8168GU/8111GU", FIRMWARE_8168G_3}, + CFG_METHOD_26 = {"8411B", FIRMWARE_8411_2}, + CFG_METHOD_27 = {"RTL8168EP/8111EP", FIRMWARE_8168EP_2}, + CFG_METHOD_28 = {"RTL8168EP/8111EP", FIRMWARE_8168EP_3}, + CFG_METHOD_29 = {"RTL8168H/8111H", FIRMWARE_8168H_1}, + CFG_METHOD_30 = {"RTL8168H/8111H", FIRMWARE_8168H_2}, + CFG_METHOD_31 = {"RTL8168FP/8111FP", }, + CFG_METHOD_32 = {"RTL8168FP/8111FP", FIRMWARE_8168FP_3}, + CFG_METHOD_33 = {"RTL8168FP/8111FP", FIRMWARE_8168FP_4}, + CFG_METHOD_34 = {"RTL8168FP/8111FP", FIRMWARE_8168FP_4}, + CFG_METHOD_35 = {"RTL8168H/8111H", FIRMWARE_8168H_3}, + CFG_METHOD_DEFAULT = {"Unknown", }, +}; + #define _R(NAME,MAC,RCR,MASK, JumFrameSz) \ { .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz } @@ -305,6 +371,18 @@ 0xff7e5880, Jumbo_Frame_9k), + _R("RTL8168FP/8111FP", + CFG_METHOD_34, + RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + + _R("RTL8168H/8111H", + CFG_METHOD_35, + RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + _R("Unknown", CFG_METHOD_DEFAULT, (RX_DMA_BURST << RxCfgDMAShift), @@ -331,6 +409,7 @@ static int rx_copybreak = 0; static int use_dac = 1; static int timer_count = 0x2600; +static int dynamic_aspm_packet_threshold = 10; static struct { u32 msg_enable; @@ -350,6 +429,11 @@ #else static int aspm = 0; #endif +#ifdef CONFIG_DYNAMIC_ASPM +static int dynamic_aspm = 1; +#else +static int dynamic_aspm = 0; +#endif #ifdef ENABLE_S5WOL static int s5wol = 1; #else @@ -394,6 +478,9 @@ module_param(aspm, int, 0); MODULE_PARM_DESC(aspm, "Enable ASPM."); +module_param(dynamic_aspm, int, 0); +MODULE_PARM_DESC(aspm, "Enable Software Dynamic ASPM."); + module_param(s5wol, int, 0); MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan."); @@ -418,12 +505,37 @@ module_param(s0_magic_packet, int, 0); MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet."); +module_param(dynamic_aspm_packet_threshold, int, 0); +MODULE_PARM_DESC(dynamic_aspm_packet_threshold, "Dynamic ASPM packet threshold."); + #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) module_param_named(debug, debug.msg_enable, int, 0); MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); #endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) MODULE_LICENSE("GPL"); +#ifdef ENABLE_USE_FIRMWARE_FILE +MODULE_FIRMWARE(FIRMWARE_8168D_1); +MODULE_FIRMWARE(FIRMWARE_8168D_2); +MODULE_FIRMWARE(FIRMWARE_8168E_1); +MODULE_FIRMWARE(FIRMWARE_8168E_2); +MODULE_FIRMWARE(FIRMWARE_8168E_3); +MODULE_FIRMWARE(FIRMWARE_8168E_4); +MODULE_FIRMWARE(FIRMWARE_8168F_1); +MODULE_FIRMWARE(FIRMWARE_8168F_2); +MODULE_FIRMWARE(FIRMWARE_8411_1); +MODULE_FIRMWARE(FIRMWARE_8411_2); +MODULE_FIRMWARE(FIRMWARE_8168G_2); +MODULE_FIRMWARE(FIRMWARE_8168G_3); +MODULE_FIRMWARE(FIRMWARE_8168EP_1); +MODULE_FIRMWARE(FIRMWARE_8168EP_2); +MODULE_FIRMWARE(FIRMWARE_8168EP_3); +MODULE_FIRMWARE(FIRMWARE_8168H_1); +MODULE_FIRMWARE(FIRMWARE_8168H_2); +MODULE_FIRMWARE(FIRMWARE_8168H_3); +MODULE_FIRMWARE(FIRMWARE_8168FP_3); +MODULE_FIRMWARE(FIRMWARE_8168FP_4); +#endif MODULE_VERSION(RTL8168_VERSION); @@ -444,7 +556,7 @@ static void rtl8168_rx_clear(struct rtl8168_private *tp); static int rtl8168_open(struct net_device *dev); -static int rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev); +static netdev_tx_t rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev); #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs); #else @@ -467,11 +579,13 @@ static void rtl8168_down(struct net_device *dev); static int rtl8168_set_mac_address(struct net_device *dev, void *p); -void rtl8168_rar_set(struct rtl8168_private *tp, uint8_t *addr); +void rtl8168_rar_set(struct rtl8168_private *tp, const u8 *addr); static void rtl8168_desc_addr_fill(struct rtl8168_private *); static void rtl8168_tx_desc_init(struct rtl8168_private *tp); static void rtl8168_rx_desc_init(struct rtl8168_private *tp); +static u16 rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp); + static void rtl8168_hw_reset(struct net_device *dev); static void rtl8168_phy_power_up(struct net_device *dev); @@ -485,6 +599,17 @@ static int rtl8168_poll(napi_ptr napi, napi_budget budget); #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void rtl8168_reset_task(void *_data); +#else +static void rtl8168_reset_task(struct work_struct *work); +#endif + +static inline struct device *tp_to_dev(struct rtl8168_private *tp) +{ + return &tp->pci_dev->dev; +} + #if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) && \ LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,00))) void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst, @@ -809,7 +934,7 @@ u64 rx_broadcast; u32 rx_multicast; u16 tx_aborted; - u16 tx_underun; + u16 tx_underrun; }; #ifdef ENABLE_R8168_PROCFS @@ -837,10 +962,10 @@ seq_printf(m, "chipset\t%d\n", tp->chipset); seq_printf(m, "chipset_name\t%s\n", rtl_chip_infotp->chipset.name); seq_printf(m, "mtu\t%d\n", dev->mtu); - seq_printf(m, "NUM_RX_DESC\t0x%x\n", NUM_RX_DESC); + seq_printf(m, "NUM_RX_DESC\t0x%x\n", tp->num_rx_desc); seq_printf(m, "cur_rx\t0x%x\n", tp->cur_rx); seq_printf(m, "dirty_rx\t0x%x\n", tp->dirty_rx); - seq_printf(m, "NUM_TX_DESC\t0x%x\n", NUM_TX_DESC); + seq_printf(m, "NUM_TX_DESC\t0x%x\n", tp->num_tx_desc); seq_printf(m, "cur_tx\t0x%x\n", tp->cur_tx); seq_printf(m, "dirty_tx\t0x%x\n", tp->dirty_tx); seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz); @@ -904,9 +1029,10 @@ seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num); seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet); seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer); + seq_printf(m, "HwSuppUpsVer\t0x%x\n", tp->HwSuppUpsVer); + seq_printf(m, "HwSuppEsdVer\t0x%x\n", tp->HwSuppEsdVer); seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer); seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet); - seq_printf(m, "HwSuppGigaForceMode\t0x%x\n", tp->HwSuppGigaForceMode); seq_printf(m, "random_mac\t0x%x\n", tp->random_mac); seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr); #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -960,15 +1086,16 @@ seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets)); seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets)); seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors)); - seq_printf(m, "rx_missed\t%lld\n", le64_to_cpu(counters->rx_missed)); - seq_printf(m, "align_errors\t%lld\n", le64_to_cpu(counters->align_errors)); - seq_printf(m, "tx_one_collision\t%lld\n", le64_to_cpu(counters->tx_one_collision)); - seq_printf(m, "tx_multi_collision\t%lld\n", le64_to_cpu(counters->tx_multi_collision)); + seq_printf(m, "rx_errors\t%d\n", le32_to_cpu(counters->rx_errors)); + seq_printf(m, "rx_missed\t%d\n", le16_to_cpu(counters->rx_missed)); + seq_printf(m, "align_errors\t%d\n", le16_to_cpu(counters->align_errors)); + seq_printf(m, "tx_one_collision\t%d\n", le32_to_cpu(counters->tx_one_collision)); + seq_printf(m, "tx_multi_collision\t%d\n", le32_to_cpu(counters->tx_multi_collision)); seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast)); seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast)); - seq_printf(m, "rx_multicast\t%lld\n", le64_to_cpu(counters->rx_multicast)); - seq_printf(m, "tx_aborted\t%lld\n", le64_to_cpu(counters->tx_aborted)); - seq_printf(m, "tx_underun\t%lld\n", le64_to_cpu(counters->tx_underun)); + seq_printf(m, "rx_multicast\t%d\n", le32_to_cpu(counters->rx_multicast)); + seq_printf(m, "tx_aborted\t%d\n", le16_to_cpu(counters->tx_aborted)); + seq_printf(m, "tx_underrun\t%d\n", le16_to_cpu(counters->tx_underrun)); seq_putc(m, '\n'); return 0; @@ -1214,9 +1341,10 @@ "proc_init_num\t0x%x\n" "s0_magic_packet\t0x%x\n" "HwSuppMagicPktVer\t0x%x\n" + "HwSuppUpsVer\t0x%x\n" + "HwSuppEsdVer\t0x%x\n" "HwSuppCheckPhyDisableModeVer\t0x%x\n" "HwPkgDet\t0x%x\n" - "HwSuppGigaForceMode\t0x%x\n" "random_mac\t0x%x\n" "org_mac_addr\t%pM\n" #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -1228,10 +1356,10 @@ tp->chipset, rtl_chip_infotp->chipset.name, dev->mtu, - NUM_RX_DESC, + tp->num_rx_desc, tp->cur_rx, tp->dirty_rx, - NUM_TX_DESC, + tp->num_tx_desc, tp->cur_tx, tp->dirty_tx, tp->rx_buf_sz, @@ -1295,9 +1423,10 @@ proc_init_num, s0_magic_packet, tp->HwSuppMagicPktVer, + tp->HwSuppUpsVer, + tp->HwSuppEsdVer, tp->HwSuppCheckPhyDisableModeVer, tp->HwPkgDet, - tp->HwSuppGigaForceMode, tp->random_mac, tp->org_mac_addr, #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) @@ -1362,27 +1491,29 @@ "tx_packets\t%lld\n" "rx_packets\t%lld\n" "tx_errors\t%lld\n" - "rx_missed\t%lld\n" - "align_errors\t%lld\n" - "tx_one_collision\t%lld\n" - "tx_multi_collision\t%lld\n" + "rx_errors\t%d\n" + "rx_missed\t%d\n" + "align_errors\t%d\n" + "tx_one_collision\t%d\n" + "tx_multi_collision\t%d\n" "rx_unicast\t%lld\n" "rx_broadcast\t%lld\n" - "rx_multicast\t%lld\n" - "tx_aborted\t%lld\n" - "tx_underun\t%lld\n", + "rx_multicast\t%d\n" + "tx_aborted\t%d\n" + "tx_underrun\t%d\n", le64_to_cpu(counters->tx_packets), le64_to_cpu(counters->rx_packets), le64_to_cpu(counters->tx_errors), - le64_to_cpu(counters->rx_missed), - le64_to_cpu(counters->align_errors), - le64_to_cpu(counters->tx_one_collision), - le64_to_cpu(counters->tx_multi_collision), + le32_to_cpu(counters->rx_errors), + le16_to_cpu(counters->rx_missed), + le16_to_cpu(counters->align_errors), + le32_to_cpu(counters->tx_one_collision), + le32_to_cpu(counters->tx_multi_collision), le64_to_cpu(counters->rx_unicast), le64_to_cpu(counters->rx_broadcast), - le64_to_cpu(counters->rx_multicast), - le64_to_cpu(counters->tx_aborted), - le64_to_cpu(counters->tx_underun) + le32_to_cpu(counters->rx_multicast), + le16_to_cpu(counters->tx_aborted), + le16_to_cpu(counters->tx_underrun) ); len += snprintf(page + len, count - len, "\n"); @@ -1618,7 +1749,11 @@ static int rtl8168_proc_open(struct inode *inode, struct file *file) { struct net_device *dev = proc_get_parent_data(inode); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) + int (*show)(struct seq_file *, void *) = pde_data(inode); +#else int (*show)(struct seq_file *, void *) = PDE_DATA(inode); +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) return single_open(file, show, dev); } @@ -1884,8 +2019,8 @@ } void rtl8168_mdio_write(struct rtl8168_private *tp, - u32 RegAddr, - u32 value) + u16 RegAddr, + u16 value) { if (tp->rtk_enable_diag) return; @@ -2023,7 +2158,7 @@ } u32 rtl8168_mdio_read(struct rtl8168_private *tp, - u32 RegAddr) + u16 RegAddr) { if (tp->rtk_enable_diag) return 0xffffffff; @@ -2105,6 +2240,23 @@ return data16; } +#ifdef ENABLE_USE_FIRMWARE_FILE +static void mac_mcu_write(struct rtl8168_private *tp, u16 reg, u16 value) +{ + if (reg == 0x1f) { + tp->ocp_base = value << 4; + return; + } + + rtl8168_mac_ocp_write(tp, tp->ocp_base + reg, value); +} + +static u32 mac_mcu_read(struct rtl8168_private *tp, u16 reg) +{ + return rtl8168_mac_ocp_read(tp, tp->ocp_base + reg); +} +#endif + static void rtl8168_clear_and_set_mcu_ocp_bit( struct rtl8168_private *tp, @@ -2121,7 +2273,6 @@ rtl8168_mac_ocp_write(tp, addr, RegValue); } -/* static void rtl8168_clear_mcu_ocp_bit( struct rtl8168_private *tp, @@ -2135,7 +2286,6 @@ 0 ); } -*/ static void rtl8168_set_mcu_ocp_bit( @@ -2300,6 +2450,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: default: ocp_reg_mutex_oob = 0x110; ocp_reg_mutex_ib = 0x114; @@ -2362,6 +2513,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: default: ocp_reg_mutex_oob = 0x110; ocp_reg_mutex_ib = 0x114; @@ -2553,7 +2705,8 @@ if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 && tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 && tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 && - tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) { + tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 && + tp->mcfg != CFG_METHOD_34) { multi_fun_sel_bit = 0; } @@ -2594,7 +2747,8 @@ if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 && tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 && tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 && - tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) { + tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 && + tp->mcfg != CFG_METHOD_34) { multi_fun_sel_bit = 0; } @@ -2626,7 +2780,8 @@ if (tp->mcfg == CFG_METHOD_20) multi_fun_sel_bit = 2; else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 || - tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) + tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 || + tp->mcfg == CFG_METHOD_34) multi_fun_sel_bit = 1; else multi_fun_sel_bit = 0; @@ -2644,7 +2799,8 @@ if (tp->mcfg == CFG_METHOD_20) multi_fun_sel_bit = 2; else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 || - tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) + tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 || + tp->mcfg == CFG_METHOD_34) multi_fun_sel_bit = 1; else multi_fun_sel_bit = 0; @@ -2660,7 +2816,7 @@ if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) { u32 TmpUlong; u16 RegAlignAddr; u8 ShiftByte; @@ -2688,7 +2844,7 @@ { if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) { u32 TmpUlong; u16 RegAlignAddr; u8 ShiftByte; @@ -2734,52 +2890,52 @@ u8 i; u8 FunBit; - switch(tp->mcfg) { - case CFG_METHOD_23: - case CFG_METHOD_27: - case CFG_METHOD_28: - FunBit = 1; - //0: UMAC, 1: TCR1, 2: TCR2, 3: KCS, 4: EHCI(Control by EHCI Driver) - for (i = 0; i < 8; i++) { - if (FunBit & multi_fun_sel_bit) - rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask); + for (i = 0; i < 8; i++) { + FunBit = (1 << i); + if (FunBit & multi_fun_sel_bit) { + u8 set_other_fun = TRUE; - FunBit <<= 1; - } - break; - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: - FunBit = 1; - for (i = 0; i < 8; i++) { - if (FunBit & multi_fun_sel_bit) { - u8 set_other_fun = TRUE; - - if (i == 3 || i == 4) { + switch(tp->mcfg) { + case CFG_METHOD_23: + case CFG_METHOD_27: + case CFG_METHOD_28: + //0: UMAC, 1: TCR1, 2: TCR2, 3: KCS, 4: EHCI(Control by EHCI Driver) + if (i < 5) { TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00); - if (TmpUlong == 0xFFFFFFFF) set_other_fun = TRUE; else set_other_fun = FALSE; - } else if (i == 5 || i == 6) { + } + break; + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: + //0: BMC, 1: NIC, 2: TCR, 3: VGA/PCIE_TO_USB, 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS + if (i == 5 || i == 6) { if (tp->DASH) { TmpUlong = rtl8168_ocp_read(tp, 0x184, 4); - if (TmpUlong & BIT_26) set_other_fun = FALSE; else set_other_fun = TRUE; } + } else { //function 0/1/2/3/4/7 + TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00); + if (TmpUlong == 0xFFFFFFFF) + set_other_fun = TRUE; + else + set_other_fun = FALSE; } - - if (set_other_fun) - rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask); + break; + default: + return; } - FunBit <<= 1; + if (set_other_fun) + rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask); } - break; } } @@ -2828,6 +2984,7 @@ rtl8168_other_fun_dev_pci_setting(tp, 0x80, clearmask, setmask, multi_fun_sel_bit); } +/* static void rtl8168_set_dash_other_fun_dev_pci_cmd_register(struct rtl8168_private *tp, u8 pci_cmd_reg, @@ -2843,6 +3000,7 @@ rtl8168_other_fun_dev_pci_setting(tp, 0x04, clearmask, setmask, multi_fun_sel_bit); } +*/ u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, const u32 base_address) { @@ -2993,6 +3151,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3); mdelay(2); break; @@ -3018,6 +3178,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3); mdelay(2); break; @@ -3086,44 +3248,6 @@ return in_phy_disable_mode; } -static void -rtl8168_enable_phy_disable_mode(struct net_device *dev) -{ - struct rtl8168_private *tp = netdev_priv(dev); - - switch (tp->HwSuppCheckPhyDisableModeVer) { - case 1: - rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) | BIT_1); - break; - case 2: - case 3: - RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5); - break; - } - - dprintk("enable phy disable mode.\n"); -} - -static void -rtl8168_disable_phy_disable_mode(struct net_device *dev) -{ - struct rtl8168_private *tp = netdev_priv(dev); - - switch (tp->HwSuppCheckPhyDisableModeVer) { - case 1: - rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) & ~BIT_1); - break; - case 2: - case 3: - RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5); - break; - } - - mdelay(1); - - dprintk("disable phy disable mode.\n"); -} - void rtl8168_wait_txrx_fifo_empty(struct net_device *dev) { @@ -3144,6 +3268,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: for (i = 0; i < 10; i++) { udelay(100); if (RTL_R32(tp, TxConfig) & BIT_11) @@ -3154,8 +3280,9 @@ udelay(100); if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty)) break; - } + + mdelay(1); break; } } @@ -3167,21 +3294,15 @@ case CFG_METHOD_23: case CFG_METHOD_27: case CFG_METHOD_28: - rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x0E); - rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x0E); - rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x0E); + rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x1E); + rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x1E); break; case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: - rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 2, 1, 0xED); - rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x78); - if (tp->DASH) { - rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x85); - rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x85); - } else { - rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x85); - } + case CFG_METHOD_34: + rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0xFC); + rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFC); break; } @@ -3280,6 +3401,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD); break; } @@ -3388,8 +3510,6 @@ rtl8168_enable_rxdvgate(dev); - rtl8168_wait_txrx_fifo_empty(dev); - switch (tp->mcfg) { case CFG_METHOD_1: case CFG_METHOD_2: @@ -3429,6 +3549,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: mdelay(2); break; default: @@ -3436,6 +3558,8 @@ break; } + rtl8168_wait_txrx_fifo_empty(dev); + /* Soft reset the chip. */ RTL_W8(tp, ChipCmd, CmdReset); @@ -3508,6 +3632,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: RTL_W32(tp, TimeInt1, 0x0000); RTL_W32(tp, TimeInt2, 0x0000); RTL_W32(tp, TimeInt3, 0x0000); @@ -3556,7 +3682,7 @@ do { skb = dev_alloc_skb(len + RTK_RX_ALIGN); if (unlikely(!skb)) - dev_printk(KERN_NOTICE, &tp->pci_dev->dev, "-ENOMEM;\n"); + dev_printk(KERN_NOTICE, tp_to_dev(tp), "-ENOMEM;\n"); } while (unlikely(skb == NULL)); skb_reserve(skb, RTK_RX_ALIGN); @@ -3565,8 +3691,8 @@ memcpy(skb_put(skb, sizeof(type)), &type, sizeof(type)); tmpAddr = skb_put(skb, len - 14); - mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE); - dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(mapping), + mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE); + dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping), len, DMA_TO_DEVICE); txd->addr = cpu_to_le64(mapping); txd->opts2 = 0; @@ -3595,14 +3721,14 @@ rx_len -= 4; rxd->opts1 = cpu_to_le32(DescOwn | tp->rx_buf_sz); - dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(mapping), len, DMA_TO_DEVICE); + dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping), len, DMA_TO_DEVICE); if (rx_len == len) { - dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE); + dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE); i = memcmp(skb->data, rx_skb->data, rx_len); pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE); if (i == 0) { -// dev_printk(KERN_INFO, &tp->pci_dev->dev, "loopback test finished\n",rx_len,len); +// dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len); break; } } @@ -3645,11 +3771,26 @@ return retval; } +static int +rtl8168_wait_phy_reset_complete(struct rtl8168_private *tp) +{ + int i, val; + + for (i = 0; i < 2500; i++) { + val = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET; + if (!val) + return 0; + + mdelay(1); + } + + return -1; +} + static void rtl8168_xmii_reset_enable(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); - int i, val = 0; if (rtl8168_is_in_phy_disable_mode(dev)) return; @@ -3662,15 +3803,7 @@ ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL)); rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); - for (i = 0; i < 2500; i++) { - val = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET; - - if (!val) { - return; - } - - mdelay(1); - } + if (rtl8168_wait_phy_reset_complete(tp) == 0) return; if (netif_msg_link(tp)) printk(KERN_ERR "%s: PHY reset failed.\n", dev->name); @@ -3727,6 +3860,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x1EA, 1, ERIAR_ExGMAC); csi_tmp |= BIT_0; rtl8168_eri_write(tp, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC); @@ -3734,6 +3869,88 @@ } } +static void +rtl8168_enable_cfg9346_write(struct rtl8168_private *tp) +{ + RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock); +} + +static void +rtl8168_disable_cfg9346_write(struct rtl8168_private *tp) +{ + RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock); +} + +static void +rtl8168_enable_exit_l1_mask(struct rtl8168_private *tp) +{ + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_16: + case CFG_METHOD_17: + case CFG_METHOD_18: + case CFG_METHOD_19: + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + break; + case CFG_METHOD_20: + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp |= (BIT_10 | BIT_11); + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + break; + case CFG_METHOD_21 ... CFG_METHOD_34: + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + break; + } +} + +static void +rtl8168_disable_exit_l1_mask(struct rtl8168_private *tp) +{ + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_16: + case CFG_METHOD_17: + case CFG_METHOD_18: + case CFG_METHOD_19: + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp &= ~(BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + break; + case CFG_METHOD_20: + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp &= ~(BIT_10 | BIT_11); + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + break; + case CFG_METHOD_21 ... CFG_METHOD_34: + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + break; + } +} + +static void +rtl8168_hw_aspm_clkreq_enable(struct rtl8168_private *tp, bool enable) +{ + if (!tp->HwSuppAspmClkIntrLock) return; + + if (enable && aspm) { + RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn); + } else { + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en); + } + + udelay(10); +} + #ifdef ENABLE_DASH_SUPPORT static void NICChkTypeEnableDashInterrupt(struct rtl8168_private *tp) @@ -3759,7 +3976,7 @@ int link_status_on; #ifdef ENABLE_FIBER_SUPPORT - rtl8168_check_fiber_link_status(dev); + rtl8168_check_fiber_link_status(tp); #endif //ENABLE_FIBER_SUPPORT link_status_on = tp->link_ok(dev); @@ -3819,7 +4036,9 @@ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) && netif_running(dev)) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) && + netif_running(dev)) { if (RTL_R8(tp, PHYstatus)&FullDup) RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19); else @@ -3829,7 +4048,7 @@ if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) { /*half mode*/ if (!(RTL_R8(tp, PHYstatus)&FullDup)) { rtl8168_mdio_write(tp, 0x1F, 0x0000); @@ -3838,7 +4057,8 @@ } if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) && (RTL_R8(tp, PHYstatus) & _10bps)) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) && + (RTL_R8(tp, PHYstatus) & _10bps)) { u32 csi_tmp; csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC); @@ -3853,7 +4073,9 @@ netif_wake_queue(dev); rtl8168_mdio_write(tp, 0x1F, 0x0000); + tp->phy_reg_aner = rtl8168_mdio_read(tp, MII_EXPANSION); tp->phy_reg_anlpar = rtl8168_mdio_read(tp, MII_LPA); + tp->phy_reg_gbsr = rtl8168_mdio_read(tp, MII_STAT1000); if (netif_msg_ifup(tp)) printk(KERN_INFO PFX "%s: link up\n", dev->name); @@ -3861,7 +4083,9 @@ if (netif_msg_ifdown(tp)) printk(KERN_INFO PFX "%s: link down\n", dev->name); + tp->phy_reg_aner = 0; tp->phy_reg_anlpar = 0; + tp->phy_reg_gbsr = 0; netif_stop_queue(dev); @@ -3875,6 +4099,12 @@ rtl8168_init_ring(dev); + if (dynamic_aspm) { + rtl8168_enable_cfg9346_write(tp); + rtl8168_hw_aspm_clkreq_enable(tp, true); + rtl8168_disable_cfg9346_write(tp); + } + rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); switch (tp->mcfg) { @@ -3885,6 +4115,10 @@ case CFG_METHOD_25: case CFG_METHOD_27: case CFG_METHOD_28: + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: if (tp->org_pci_offset_99 & BIT_2) tp->issue_offset_99_event = TRUE; break; @@ -3907,6 +4141,10 @@ case CFG_METHOD_25: case CFG_METHOD_27: case CFG_METHOD_28: + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: if (tp->issue_offset_99_event) { if (!(RTL_R8(tp, PHYstatus) & PowerSaveStatus)) { tp->issue_offset_99_event = FALSE; @@ -3915,6 +4153,17 @@ } break; } + } else { + if (dynamic_aspm) { + bool enable_hw_aspm_clkreq = true; + if (tp->dynamic_aspm_packet_count > dynamic_aspm_packet_threshold) + enable_hw_aspm_clkreq = false; + + rtl8168_enable_cfg9346_write(tp); + rtl8168_hw_aspm_clkreq_enable(tp, enable_hw_aspm_clkreq); + rtl8168_disable_cfg9346_write(tp); + } + tp->dynamic_aspm_packet_count = 0; } } @@ -3958,7 +4207,8 @@ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13); if (val != 0x0050) { rtl8168_set_phy_mcu_patch_request(tp); @@ -3979,7 +4229,8 @@ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13); if (val != 0x0500) { rtl8168_set_phy_mcu_patch_request(tp); @@ -4022,6 +4273,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC); csi_tmp &= ~(BIT_0 | BIT_1); rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC); @@ -4037,6 +4290,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00); break; } @@ -4056,6 +4311,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99); break; } @@ -4074,11 +4331,13 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC); csi_tmp &= ~(BIT_0 | BIT_1); - if (!(tp->org_pci_offset_99 & (BIT_5 | BIT_6))) + if (tp->org_pci_offset_99 & (BIT_5 | BIT_6)) csi_tmp |= BIT_1; - if (!(tp->org_pci_offset_99 & BIT_2)) + if (tp->org_pci_offset_99 & BIT_2) csi_tmp |= BIT_0; rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC); break; @@ -4114,6 +4373,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC); csi_tmp &= ~( BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12 | BIT_13 | BIT_14 | BIT_15 ); csi_tmp |= ( BIT_9 | BIT_10 | BIT_13 | BIT_14 | BIT_15 ); @@ -4145,6 +4406,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: if (tp->org_pci_offset_99 & BIT_2) rtl8168_mac_ocp_write(tp, 0xE0A2, rtl8168_mac_ocp_read(tp, 0xE0A2) | BIT_0); break; @@ -4171,6 +4434,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_eri_write(tp, 0x2E8, 2, 0x9003, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0x2EA, 2, 0x9003, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC); @@ -4198,6 +4463,7 @@ case CFG_METHOD_26: case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: if (tp->org_pci_offset_99 & BIT_2) RTL_W8(tp, 0xB6, RTL_R8(tp, 0xB6) | BIT_0); break; @@ -4222,6 +4488,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC); csi_tmp &= ~BIT_2; rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC); @@ -4255,6 +4523,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC); csi_tmp &= ~(0x0000FFF0); csi_tmp |= (0x00000640); @@ -4267,6 +4536,19 @@ } switch (tp->mcfg) { + case CFG_METHOD_35: + csi_tmp = rtl8168_eri_read(tp, 0x1E8, 2, ERIAR_ExGMAC); + csi_tmp &= ~(0xFFF0); + csi_tmp |= 0x0640; + rtl8168_eri_write(tp,0x1E8, 2, csi_tmp, ERIAR_ExGMAC); + + csi_tmp = rtl8168_eri_read(tp, 0x1E4, 2, ERIAR_ExGMAC); + csi_tmp &= ~(0xFF00); + rtl8168_eri_write(tp, 0x1E4, 2, csi_tmp, ERIAR_ExGMAC); + break; + } + + switch (tp->mcfg) { case CFG_METHOD_24: case CFG_METHOD_25: case CFG_METHOD_26: @@ -4274,6 +4556,7 @@ case CFG_METHOD_28: case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC); csi_tmp |= BIT_2; rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC); @@ -4316,27 +4599,14 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: - rtl8168_issue_offset_99_event(tp); - break; - } - - switch (tp->mcfg) { - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: + if (tp->org_pci_offset_99 & BIT_2) + rtl8168_issue_offset_99_event(tp); rtl8168_disable_pci_offset_99(tp); break; } + switch (tp->mcfg) { case CFG_METHOD_24: case CFG_METHOD_25: @@ -4348,59 +4618,29 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_disable_pci_offset_180(tp); break; } } static void -rtl8168_enable_cfg9346_write(struct rtl8168_private *tp) -{ - RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock); -} - -static void -rtl8168_disable_cfg9346_write(struct rtl8168_private *tp) -{ - RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock); -} - -static void rtl8168_hw_d3_para(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); RTL_W16(tp, RxMaxSize, RX_BUF_SIZE); - switch (tp->mcfg) { - case CFG_METHOD_14: - case CFG_METHOD_15: - case CFG_METHOD_16: - case CFG_METHOD_17: - case CFG_METHOD_18: - case CFG_METHOD_19: - case CFG_METHOD_20: - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + if (tp->HwSuppAspmClkIntrLock) { RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); rtl8168_enable_cfg9346_write(tp); - RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); - RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); + rtl8168_hw_aspm_clkreq_enable(tp, false); rtl8168_disable_cfg9346_write(tp); - break; } + rtl8168_disable_exit_l1_mask(tp); + #ifdef ENABLE_REALWOW_SUPPORT rtl8168_set_realwow_d3_para(dev); #endif @@ -4416,11 +4656,8 @@ if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || - tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || - tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) rtl8168_eri_write(tp, 0x2F8, 2, 0x0064, ERIAR_ExGMAC); - } if (tp->bios_setting & BIT_28) { if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || @@ -4448,12 +4685,22 @@ rtl8168_set_pci_99_180_exit_driver_para(dev); + switch (tp->mcfg) { + case CFG_METHOD_35: + rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_3); + rtl8168_set_mcu_ocp_bit(tp, 0xDE38, BIT_2); + rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0)); + rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0)); + break; + } + /*disable ocp phy power saving*/ if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) if (!tp->dash_printer_enabled) rtl8168_disable_ocp_phy_power_saving(dev); @@ -4621,9 +4868,6 @@ bmcr_true_force = BMCR_SPEED100; } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) { bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX; - } else if ((speed == SPEED_1000) && (duplex == DUPLEX_FULL) && - tp->HwSuppGigaForceMode) { - bmcr_true_force = BMCR_SPEED1000 | BMCR_FULLDPLX; } else { netif_err(tp, drv, dev, "Failed to set phy force mode!\n"); return; @@ -4634,6 +4878,115 @@ } static void +rtl8168_set_pci_pme(struct rtl8168_private *tp, int set) +{ + struct pci_dev *pdev = tp->pci_dev; + u16 pmc; + + if (!pdev->pm_cap) + return; + + pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc); + pmc |= PCI_PM_CTRL_PME_STATUS; + if (set) + pmc |= PCI_PM_CTRL_PME_ENABLE; + else + pmc &= ~PCI_PM_CTRL_PME_ENABLE; + pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc); +} + +static void +rtl8168_set_wol_link_speed(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + int auto_nego; + int giga_ctrl; + u32 adv; + u16 anlpar; + u16 gbsr; + u16 aner; + + if (tp->autoneg != AUTONEG_ENABLE) + goto exit; + + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE); + auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL + | ADVERTISE_100HALF | ADVERTISE_100FULL); + + giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000); + giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); + + aner = anlpar = gbsr = 0; + if (tp->link_ok(dev)) { + aner = rtl8168_mdio_read(tp, MII_EXPANSION); + anlpar = rtl8168_mdio_read(tp, MII_LPA); + gbsr = rtl8168_mdio_read(tp, MII_STAT1000); + } else { + if (netif_running(dev)) { + aner = tp->phy_reg_aner; + anlpar = tp->phy_reg_anlpar; + gbsr = tp->phy_reg_gbsr; + } + } + + if ((aner | anlpar | gbsr) == 0) { + int auto_nego_tmp = 0; + adv = tp->advertising; + if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF)) + auto_nego_tmp |= ADVERTISE_10HALF; + if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL)) + auto_nego_tmp |= ADVERTISE_10FULL; + if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF)) + auto_nego_tmp |= ADVERTISE_100HALF; + if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL)) + auto_nego_tmp |= ADVERTISE_100FULL; + + if (auto_nego_tmp == 0) goto exit; + + auto_nego |= auto_nego_tmp; + goto skip_check_lpa; + } + if (!(aner & EXPANSION_NWAY)) goto exit; + + adv = tp->advertising; + if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF)) + auto_nego |= ADVERTISE_10HALF; + else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL)) + auto_nego |= ADVERTISE_10FULL; + else if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF)) + auto_nego |= ADVERTISE_100HALF; + else if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL)) + auto_nego |= ADVERTISE_100FULL; + else if (adv & ADVERTISED_1000baseT_Half && (gbsr & LPA_1000HALF)) + giga_ctrl |= ADVERTISE_1000HALF; + else if (adv & ADVERTISED_1000baseT_Full && (gbsr & LPA_1000FULL)) + giga_ctrl |= ADVERTISE_1000FULL; + else + goto exit; + +skip_check_lpa: + if (tp->DASH) + auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); + + if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF)) + auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); + +#ifdef CONFIG_DOWN_SPEED_100 + auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); +#endif + + rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego); + rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl); + + rtl8168_phy_restart_nway(dev); + +exit: + return; +} + +static void rtl8168_powerdown_pll(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); @@ -4644,10 +4997,6 @@ #endif //ENABLE_FIBER_SUPPORT if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) { - int auto_nego; - int giga_ctrl; - u16 anlpar; - rtl8168_set_hw_wol(dev, tp->wol_opts); if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17 || @@ -4657,44 +5006,20 @@ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { rtl8168_enable_cfg9346_write(tp); RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En); rtl8168_disable_cfg9346_write(tp); } + /* Enable the PME and clear the status */ + rtl8168_set_pci_pme(tp, 1); + if (HW_SUPP_SERDES_PHY(tp)) return; - rtl8168_mdio_write(tp, 0x1F, 0x0000); - auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE); - auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL - | ADVERTISE_100HALF | ADVERTISE_100FULL); - - if (netif_running(dev)) - anlpar = tp->phy_reg_anlpar; - else - anlpar = rtl8168_mdio_read(tp, MII_LPA); - -#ifdef CONFIG_DOWN_SPEED_100 - auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); -#else - if (anlpar & (LPA_10HALF | LPA_10FULL)) - auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL); - else - auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); -#endif - - if (tp->DASH) - auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); - - if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF)) - auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); - - giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000) & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); - rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego); - rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl); - rtl8168_phy_restart_nway(dev); + rtl8168_set_wol_link_speed(dev); RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys); @@ -4709,38 +5034,42 @@ rtl8168_phy_power_down(dev); - switch (tp->mcfg) { - case CFG_METHOD_9: - case CFG_METHOD_10: - case CFG_METHOD_11: - case CFG_METHOD_12: - case CFG_METHOD_13: - case CFG_METHOD_14: - case CFG_METHOD_15: - case CFG_METHOD_17: - case CFG_METHOD_18: - case CFG_METHOD_19: - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: - RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7); - break; + if (!tp->HwIcVerUnknown) { + switch (tp->mcfg) { + case CFG_METHOD_9: + case CFG_METHOD_10: + //case CFG_METHOD_11: + case CFG_METHOD_12: + case CFG_METHOD_13: + case CFG_METHOD_14: + case CFG_METHOD_15: + case CFG_METHOD_17: + case CFG_METHOD_18: + case CFG_METHOD_19: + case CFG_METHOD_21: + case CFG_METHOD_22: + case CFG_METHOD_24: + case CFG_METHOD_25: + case CFG_METHOD_26: + case CFG_METHOD_27: + case CFG_METHOD_28: + case CFG_METHOD_29: + case CFG_METHOD_30: + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: + RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7); + break; + } } switch (tp->mcfg) { case CFG_METHOD_14 ... CFG_METHOD_15: RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6); break; - case CFG_METHOD_16 ... CFG_METHOD_33: + case CFG_METHOD_16 ... CFG_METHOD_34: RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6); RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6); break; @@ -4774,6 +5103,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6); break; } @@ -4829,7 +5160,7 @@ spin_unlock_irqrestore(&tp->lock, flags); - device_set_wakeup_enable(&tp->pci_dev->dev, tp->wol_enabled); + device_set_wakeup_enable(tp_to_dev(tp), tp->wol_enabled); return 0; } @@ -4839,12 +5170,17 @@ struct ethtool_drvinfo *info) { struct rtl8168_private *tp = netdev_priv(dev); + struct rtl8168_fw *rtl_fw = tp->rtl_fw; strcpy(info->driver, MODULENAME); strcpy(info->version, RTL8168_VERSION); strcpy(info->bus_info, pci_name(tp->pci_dev)); info->regdump_len = R8168_REGS_DUMP_SIZE; info->eedump_len = tp->eeprom_len; + BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); + if (rtl_fw) + strlcpy(info->fw_version, rtl_fw->version, + sizeof(info->fw_version)); } static int @@ -4868,12 +5204,13 @@ if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { //Disable Giga Lite rtl8168_mdio_write(tp, 0x1F, 0x0A42); rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_9); if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7); rtl8168_mdio_write(tp, 0x1F, 0x0A40); rtl8168_mdio_write(tp, 0x1F, 0x0000); @@ -4910,7 +5247,7 @@ giga_ctrl |= ADVERTISE_1000FULL; //flow control - if (dev->mtu <= ETH_DATA_LEN) + if (dev->mtu <= ETH_DATA_LEN && tp->fcpause == rtl8168_fc_full) auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM; tp->phy_auto_nego_reg = auto_nego; @@ -4923,11 +5260,9 @@ mdelay(20); } else { /*true force*/ - if (speed == SPEED_10 || speed == SPEED_100 || - (speed == SPEED_1000 && duplex == DUPLEX_FULL && - tp->HwSuppGigaForceMode)) { + if (speed == SPEED_10 || speed == SPEED_100) rtl8168_phy_setup_force_mode(dev, speed, duplex); - } else + else goto out; } @@ -5448,6 +5783,45 @@ spin_unlock_irqrestore(&tp->lock, flags); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) +static void rtl8168_get_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *pause) +{ + struct rtl8168_private *tp = netdev_priv(dev); + + pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); + if (tp->fcpause == rtl8168_fc_rx_pause) + pause->rx_pause = 1; + else if (tp->fcpause == rtl8168_fc_tx_pause) + pause->tx_pause = 1; + else if (tp->fcpause == rtl8168_fc_full) { + pause->rx_pause = 1; + pause->tx_pause = 1; + } +} + +static int rtl8168_set_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *pause) +{ + struct rtl8168_private *tp = netdev_priv(dev); + enum rtl8168_fc_mode newfc; + + if (pause->tx_pause || pause->rx_pause) + newfc = rtl8168_fc_full; + else + newfc = rtl8168_fc_none; + + if (tp->fcpause != newfc) { + tp->fcpause = newfc; + + rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + } + + return 0; + +} +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + static u32 rtl8168_get_msglevel(struct net_device *dev) { @@ -5499,7 +5873,93 @@ return -EOPNOTSUPP; } } +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) + +static void +rtl8168_wait_for_quiescence(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + + synchronize_irq(dev->irq); + + /* Wait for any pending NAPI task to complete */ +#ifdef CONFIG_R8168_NAPI +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + RTL_NAPI_DISABLE(dev, &tp->napi); #endif +#endif //CONFIG_R8168_NAPI + + rtl8168_irq_mask_and_ack(tp); + +#ifdef CONFIG_R8168_NAPI +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + RTL_NAPI_ENABLE(dev, &tp->napi); +#endif +#endif //CONFIG_R8168_NAPI +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +static void rtl8168_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +#else +static void rtl8168_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +{ + struct rtl8168_private *tp = netdev_priv(dev); + + ring->rx_max_pending = MAX_NUM_TX_DESC; + ring->tx_max_pending = MAX_NUM_RX_DESC;; + ring->rx_pending = tp->num_rx_desc; + ring->tx_pending = tp->num_tx_desc; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +static int rtl8168_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +#else +static int rtl8168_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +{ + struct rtl8168_private *tp = netdev_priv(dev); + u32 new_rx_count, new_tx_count; + int rc = 0; + + if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) + return -EINVAL; + + new_tx_count = clamp_t(u32, ring->tx_pending, + MIN_NUM_TX_DESC, MAX_NUM_TX_DESC); + + new_rx_count = clamp_t(u32, ring->rx_pending, + MIN_NUM_RX_DESC, MAX_NUM_RX_DESC); + + if ((new_rx_count == tp->num_rx_desc) && + (new_tx_count == tp->num_tx_desc)) { + /* nothing to do */ + return 0; + } + + if (netif_running(dev)) { + rtl8168_wait_for_quiescence(dev); + rtl8168_close(dev); + } + + tp->num_rx_desc = new_rx_count; + tp->num_tx_desc = new_tx_count; + + if (netif_running(dev)) + rc = rtl8168_open(dev); + + return rc; +} +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) #if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) static void @@ -5549,7 +6009,7 @@ data9 = le64_to_cpu(counters->rx_broadcast); data10 = le32_to_cpu(counters->rx_multicast); data11 = le16_to_cpu(counters->tx_aborted); - data12 = le16_to_cpu(counters->tx_underun); + data12 = le16_to_cpu(counters->tx_underrun); } static void @@ -5559,11 +6019,11 @@ { switch (stringset) { case ETH_SS_STATS: - memcpy(data, *rtl8168_gstrings, sizeof(rtl8168_gstrings)); + memcpy(data, rtl8168_gstrings, sizeof(rtl8168_gstrings)); break; } } -#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) static int rtl_get_eeprom_len(struct net_device *dev) { @@ -5582,10 +6042,10 @@ u16 tmp; if (tp->eeprom_type == EEPROM_TYPE_NONE) { - dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Detect none EEPROM\n"); + dev_printk(KERN_DEBUG, tp_to_dev(tp), "Detect none EEPROM\n"); return -EOPNOTSUPP; } else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) { - dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Invalid parameter\n"); + dev_printk(KERN_DEBUG, tp_to_dev(tp), "Invalid parameter\n"); return -EINVAL; } @@ -5781,6 +6241,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC); csi_tmp |= BIT_1 | BIT_0; rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC); @@ -5793,7 +6255,7 @@ break; default: -// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); +// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n"); ret = -EOPNOTSUPP; break; } @@ -5804,6 +6266,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mdio_write(tp, 0x1F, 0x0A4A); rtl8168_set_eth_phy_bit(tp, 0x11, BIT_9); rtl8168_mdio_write(tp, 0x1F, 0x0A42); @@ -5820,6 +6284,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_oob_mutex_lock(tp); break; } @@ -5833,6 +6298,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_set_phy_mcu_patch_request(tp); break; } @@ -5892,8 +6359,9 @@ break; case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: data = rtl8168_mac_ocp_read(tp, 0xE052); - data |= BIT_0; + data &= ~(BIT_0); rtl8168_mac_ocp_write(tp, 0xE052, data); rtl8168_mdio_write(tp, 0x1F, 0x0A43); @@ -5909,8 +6377,11 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: data = rtl8168_mac_ocp_read(tp, 0xE052); - data |= BIT_0; + data &= ~(BIT_0); + if (tp->HwPkgDet == 0x0F) + data |= BIT_0; rtl8168_mac_ocp_write(tp, 0xE052, data); rtl8168_mdio_write(tp, 0x1F, 0x0A43); @@ -5934,6 +6405,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_clear_phy_mcu_patch_request(tp); break; } @@ -5945,6 +6418,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_oob_mutex_unlock(tp); break; } @@ -6050,6 +6524,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC); csi_tmp &= ~(BIT_1 | BIT_0); rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC); @@ -6062,7 +6538,7 @@ break; default: -// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); +// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n"); ret = -EOPNOTSUPP; break; } @@ -6070,6 +6546,7 @@ switch (tp->mcfg) { case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: rtl8168_mdio_write(tp, 0x1F, 0x0A42); rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7); rtl8168_mdio_write(tp, 0x1F, 0x0A4A); @@ -6086,6 +6563,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_oob_mutex_lock(tp); break; } @@ -6099,6 +6577,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_set_phy_mcu_patch_request(tp); break; } @@ -6135,6 +6615,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: data = rtl8168_mac_ocp_read(tp, 0xE052); data &= ~(BIT_0); rtl8168_mac_ocp_write(tp, 0xE052, data); @@ -6159,6 +6641,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_clear_phy_mcu_patch_request(tp); break; } @@ -6170,6 +6654,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_oob_mutex_unlock(tp); break; } @@ -6217,7 +6702,7 @@ u16 val; switch (tp->mcfg) { - case CFG_METHOD_21 ... CFG_METHOD_33: + case CFG_METHOD_21 ... CFG_METHOD_34: break; default: return -EOPNOTSUPP; @@ -6264,13 +6749,15 @@ unsigned long flags; switch (tp->mcfg) { - case CFG_METHOD_21 ... CFG_METHOD_33: + case CFG_METHOD_21 ... CFG_METHOD_34: break; default: return -EOPNOTSUPP; } - if (HW_SUPP_SERDES_PHY(tp) || !HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) + if (HW_SUPP_SERDES_PHY(tp) || + !HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp) || + tp->DASH) return -EOPNOTSUPP; spin_lock_irqsave(&tp->lock, flags); @@ -6300,14 +6787,22 @@ static const struct ethtool_ops rtl8168_ethtool_ops = { .get_drvinfo = rtl8168_get_drvinfo, .get_regs_len = rtl8168_get_regs_len, - .get_link = ethtool_op_get_link, + .get_link = ethtool_op_get_link, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + .get_ringparam = rtl8168_get_ringparam, + .set_ringparam = rtl8168_set_ringparam, +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) .get_settings = rtl8168_get_settings, .set_settings = rtl8168_set_settings, #else .get_link_ksettings = rtl8168_get_settings, .set_link_ksettings = rtl8168_set_settings, -#endif +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + .get_pauseparam = rtl8168_get_pauseparam, + .set_pauseparam = rtl8168_set_pauseparam, +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) .get_msglevel = rtl8168_get_msglevel, .set_msglevel = rtl8168_set_msglevel, #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) @@ -6320,8 +6815,8 @@ #ifdef NETIF_F_TSO .get_tso = ethtool_op_get_tso, .set_tso = ethtool_op_set_tso, -#endif -#endif +#endif //NETIF_F_TSO +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) .get_regs = rtl8168_get_regs, .get_wol = rtl8168_get_wol, .set_wol = rtl8168_set_wol, @@ -6330,7 +6825,7 @@ .get_stats_count = rtl8168_get_stats_count, #else .get_sset_count = rtl8168_get_sset_count, -#endif +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) .get_ethtool_stats = rtl8168_get_ethtool_stats, #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) #ifdef ETHTOOL_GPERMADDR @@ -6410,6 +6905,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mdio_write(tp, 0x1F, 0x0A43); rtl8168_mdio_write(tp, 0x13, 0x8045); rtl8168_mdio_write(tp, 0x14, 0x0000); @@ -6424,7 +6921,7 @@ rtl8168_mdio_write(tp, 0x00, 0x9200); break; default: - dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n"); + dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support Green Feature\n"); break; } @@ -6488,6 +6985,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mdio_write(tp, 0x1F, 0x0A43); rtl8168_mdio_write(tp, 0x13, 0x8045); rtl8168_mdio_write(tp, 0x14, 0x2444); @@ -6502,7 +7001,7 @@ rtl8168_mdio_write(tp, 0x00, 0x9200); break; default: - dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n"); + dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support Green Feature\n"); break; } @@ -6683,6 +7182,10 @@ tp->HwIcVerUnknown = TRUE; } + if (tp->mcfg == CFG_METHOD_30 && + (rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) == 0x0100) + tp->mcfg = CFG_METHOD_35; + tp->efuse_ver = EFUSE_SUPPORT_V3; break; case 0x54800000: @@ -6692,8 +7195,10 @@ tp->mcfg = CFG_METHOD_32; } else if (ICVerID == 0x00300000) { tp->mcfg = CFG_METHOD_33; + } else if (ICVerID == 0x00400000) { + tp->mcfg = CFG_METHOD_34; } else { - tp->mcfg = CFG_METHOD_33; + tp->mcfg = CFG_METHOD_34; tp->HwIcVerUnknown = TRUE; } @@ -6877,6 +7382,251 @@ RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset); } +static +u16 +rtl8168_get_phy_state(struct rtl8168_private *tp) +{ + u16 PhyState = 0xFF; + + if (HW_SUPPORT_UPS_MODE(tp) == FALSE) goto exit; + + switch (tp->HwSuppUpsVer) { + case 1: + PhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10); + PhyState &= 0x7; //bit2:0 + break; + } + +exit: + return PhyState; +} + +static +bool +rtl8168_wait_phy_state_ready(struct rtl8168_private *tp, + u16 PhyState, + u32 MicroSecondTimeout + ) +{ + u16 TmpPhyState; + u32 WaitCount; + u32 i = 0; + bool PhyStateReady = TRUE; + + if (HW_SUPPORT_UPS_MODE(tp) == FALSE) goto exit; + + WaitCount = MicroSecondTimeout / 1000; + if (WaitCount == 0) WaitCount = 100; + + do { + TmpPhyState = rtl8168_get_phy_state(tp); + mdelay(1); + i++; + } while ((i < WaitCount) && (TmpPhyState != PhyState)); + + PhyStateReady = (i == WaitCount && TmpPhyState != PhyState) ? FALSE : TRUE; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) + WARN_ON_ONCE(i == WaitCount); +#endif + +exit: + return PhyStateReady; +} + +static +bool +rtl8168_test_phy_ocp_v2(struct rtl8168_private *tp) +{ + bool RestorePhyOcpReg = FALSE; + + u16 PhyRegValue; + u8 ResetPhyType = 0; + + if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) { + ResetPhyType = 1; + } else { + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + PhyRegValue = rtl8168_mdio_read(tp, 0x12); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + if ((PhyRegValue & 0x03) != 0x00) { + ResetPhyType = 2; + } + } + + if (ResetPhyType == 0) goto exit; + + netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n", + ResetPhyType); + + rtl8168_mdio_write(tp, 0x1F, 0x0C41); + rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + mdelay(24); //24ms + + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + PhyRegValue = rtl8168_mdio_read(tp, 0x12); + if ((PhyRegValue & 0x03) != 0x00) { + u32 WaitCnt = 0; + while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) { + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14)); + rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14)); + mdelay(100); + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + PhyRegValue = rtl8168_mdio_read(tp, 0x12); + WaitCnt++; + } + } + + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + rtl8168_mdio_write(tp, 0x1F, 0x0A46); + rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0); + rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32); + rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000); + rtl8168_mdio_write(tp, 0x1F, 0x0A46); + rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000); + + tp->HwHasWrRamCodeToMicroP = FALSE; + + RestorePhyOcpReg = TRUE; + +exit: + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + return RestorePhyOcpReg; +} + +static +bool +rtl8168_test_phy_ocp_v3(struct rtl8168_private *tp) +{ + bool RestorePhyOcpReg = FALSE; + + u16 PhyRegValue; + u8 ResetPhyType = 0; + u8 watch_dog = 0; + u8 uc_response; + u8 nctl_pc_range_fail; + u8 nctl_pc_stuck_fail; + + rtl8168_mdio_write(tp, 0x1F, 0x0B82); + uc_response = !!(rtl8168_mdio_read(tp, 0x10) & BIT_5); + rtl8168_mdio_write(tp, 0x1F, 0x0B84); + nctl_pc_range_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_1); + nctl_pc_stuck_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_2); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + if (uc_response || nctl_pc_range_fail || nctl_pc_stuck_fail) { + ResetPhyType = 3; + } else { + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + PhyRegValue = rtl8168_mdio_read(tp, 0x12); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + if ((PhyRegValue & 0x03) != 0x00) { + watch_dog = (u8)(PhyRegValue & 0x03); + ResetPhyType = 2; + } + } + + if (ResetPhyType == 0) goto exit; + + netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n", + ResetPhyType); + + rtl8168_mdio_write(tp, 0x1F, 0x0C41); + rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + mdelay(24000); //24ms + + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + PhyRegValue = rtl8168_mdio_read(tp, 0x12); + if ((PhyRegValue & 0x03) != 0x00) { + u32 WaitCnt = 0; + while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) { + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14)); + rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14)); + mdelay(100000); + rtl8168_mdio_write(tp, 0x1F, 0x0C40); + PhyRegValue = rtl8168_mdio_read(tp, 0x12); + WaitCnt++; + } + } + + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + //issue9 + rtl8168_mdio_write(tp, 0x1F, 0x0A46); + rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0); + rtl8168_mdio_write(tp, 0x11, tp->BackupPhyFuseDout_31_16); + rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32); + rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000); + rtl8168_mdio_write(tp, 0x1F, 0x0A46); + rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000); + + //record fail case + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x801C); + PhyRegValue = 0; + PhyRegValue = watch_dog & 0x03; + PhyRegValue <<= 14; + if (uc_response) PhyRegValue |= BIT_13; + if (nctl_pc_range_fail) PhyRegValue |= BIT_12; + if (nctl_pc_stuck_fail) PhyRegValue |= BIT_11; + ClearAndSetEthPhyBit(tp, + 0x14, + 0xF800, + PhyRegValue); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + tp->HwHasWrRamCodeToMicroP = FALSE; + + RestorePhyOcpReg = TRUE; + +exit: + //set uc_response to 1 and gphy should auto clear it. + rtl8168_mdio_write(tp, 0x1F, 0x0B82); + rtl8168_set_eth_phy_bit(tp, 0x10, BIT_5); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + return RestorePhyOcpReg; +} + +static +bool +rtl8168_test_phy_ocp(struct rtl8168_private *tp) +{ + bool RestorePhyOcpReg = FALSE; + + if (tp->TestPhyOcpReg == FALSE) goto exit; + + switch (tp->HwSuppEsdVer) { + case 2: + RestorePhyOcpReg = rtl8168_test_phy_ocp_v2(tp); + break; + case 3: + RestorePhyOcpReg = rtl8168_test_phy_ocp_v3(tp); + break; + default: + break; + } + +exit: + return RestorePhyOcpReg; +} + static int rtl8168_is_ups_resume(struct net_device *dev) { @@ -6898,7 +7648,7 @@ { struct rtl8168_private *tp = netdev_priv(dev); u16 TmpPhyState; - int i=0; + int i = 0; do { TmpPhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10); @@ -6957,19 +7707,9 @@ } } - switch (tp->mcfg) { - case CFG_METHOD_23: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: - rtl8168_dash2_disable_txrx(dev); - break; - } - if (HW_DASH_SUPPORT_DASH(tp)) { rtl8168_driver_start(tp); + rtl8168_dash2_disable_txrx(dev); #ifdef ENABLE_DASH_SUPPORT DashHwInit(dev); #endif @@ -7017,11 +7757,13 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_eri_write(tp, 0x174, 2, 0x00FF, ERIAR_ExGMAC); rtl8168_mac_ocp_write(tp, 0xE428, 0x0010); break; case CFG_METHOD_29: - case CFG_METHOD_30: { + case CFG_METHOD_30: + case CFG_METHOD_35: { u32 csi_tmp; csi_tmp = rtl8168_eri_read(tp, 0x174, 2, ERIAR_ExGMAC); csi_tmp &= ~(BIT_8); @@ -7057,6 +7799,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_disable_now_is_oob(tp); data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) & ~BIT_14; @@ -7071,25 +7815,16 @@ } //wait ups resume (phy state 2) - switch (tp->mcfg) { - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + if (HW_SUPPORT_UPS_MODE(tp)) if (rtl8168_is_ups_resume(dev)) { - rtl8168_wait_phy_ups_resume(dev, 2); + rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_EXT_INI); rtl8168_clear_ups_resume_bit(dev); } - break; - }; #ifdef ENABLE_FIBER_SUPPORT if (HW_FIBER_MODE_ENABLED(tp)) - rtl8168_hw_init_fiber_nic(dev); + rtl8168_hw_init_fiber_nic(tp); #endif //ENABLE_FIBER_SUPPORT - - tp->phy_reg_anlpar = 0; } void @@ -7097,25 +7832,10 @@ { struct rtl8168_private *tp = netdev_priv(dev); - switch (tp->mcfg) { - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + if (tp->HwSuppAspmClkIntrLock) { rtl8168_enable_cfg9346_write(tp); - RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); - RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); + rtl8168_hw_aspm_clkreq_enable(tp, false); rtl8168_disable_cfg9346_write(tp); - break; } switch (tp->mcfg) { @@ -7124,6 +7844,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000); break; } @@ -7142,6 +7864,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000); rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0000); rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000); @@ -7156,6 +7880,7 @@ } } +#ifndef ENABLE_USE_FIRMWARE_FILE static void rtl8168_set_mac_mcu_8168g_1(struct net_device *dev) { @@ -8078,446 +8803,128 @@ rtl8168_set_mac_mcu_8168ep_1(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8168ep_1 = { + 0xE008, 0xE0D3, 0xE0D6, 0xE0D9, 0xE0DB, 0xE0DD, 0xE0DF, 0xE0E1, 0xC251, + 0x7340, 0x49B1, 0xF010, 0x1D02, 0x8D40, 0xC202, 0xBA00, 0x2C3A, 0xC0F0, + 0xE8DE, 0x2000, 0x8000, 0xC0B6, 0x268C, 0x752C, 0x49D4, 0xF112, 0xE025, + 0xC2F6, 0x7146, 0xC2F5, 0x7340, 0x49BE, 0xF103, 0xC7F2, 0xE002, 0xC7F1, + 0x304F, 0x6226, 0x49A1, 0xF1F0, 0x7222, 0x49A0, 0xF1ED, 0x2525, 0x1F28, + 0x3097, 0x3091, 0x9A36, 0x752C, 0x21DC, 0x25BC, 0xC6E2, 0x77C0, 0x1304, + 0xF014, 0x1303, 0xF014, 0x1302, 0xF014, 0x1301, 0xF014, 0x49D4, 0xF103, + 0xC3D7, 0xBB00, 0xC618, 0x67C6, 0x752E, 0x22D7, 0x26DD, 0x1505, 0xF013, + 0xC60A, 0xBE00, 0xC309, 0xBB00, 0xC308, 0xBB00, 0xC307, 0xBB00, 0xC306, + 0xBB00, 0x25C8, 0x25A6, 0x25AC, 0x25B2, 0x25B8, 0xCD08, 0x0000, 0xC0BC, + 0xC2FF, 0x7340, 0x49B0, 0xF04E, 0x1F46, 0x308F, 0xC3F7, 0x1C04, 0xE84D, + 0x1401, 0xF147, 0x7226, 0x49A7, 0xF044, 0x7222, 0x2525, 0x1F30, 0x3097, + 0x3091, 0x7340, 0xC4EA, 0x401C, 0xF006, 0xC6E8, 0x75C0, 0x49D7, 0xF105, + 0xE036, 0x1D08, 0x8DC1, 0x0208, 0x6640, 0x2764, 0x1606, 0xF12F, 0x6346, + 0x133B, 0xF12C, 0x9B34, 0x1B18, 0x3093, 0xC32A, 0x1C10, 0xE82A, 0x1401, + 0xF124, 0x1A36, 0x308A, 0x7322, 0x25B5, 0x0B0E, 0x1C00, 0xE82C, 0xC71F, + 0x4027, 0xF11A, 0xE838, 0x1F42, 0x308F, 0x1B08, 0xE824, 0x7236, 0x7746, + 0x1700, 0xF00D, 0xC313, 0x401F, 0xF103, 0x1F00, 0x9F46, 0x7744, 0x449F, + 0x445F, 0xE817, 0xC70A, 0x4027, 0xF105, 0xC302, 0xBB00, 0x2E08, 0x2DC2, + 0xC7FF, 0xBF00, 0xCDB8, 0xFFFF, 0x0C02, 0xA554, 0xA5DC, 0x402F, 0xF105, + 0x1400, 0xF1FA, 0x1C01, 0xE002, 0x1C00, 0xFF80, 0x49B0, 0xF004, 0x0B01, + 0xA1D3, 0xE003, 0x0B02, 0xA5D3, 0x3127, 0x3720, 0x0B02, 0xA5D3, 0x3127, + 0x3720, 0x1300, 0xF1FB, 0xFF80, 0x7322, 0x25B5, 0x1E28, 0x30DE, 0x30D9, + 0x7264, 0x1E11, 0x2368, 0x3116, 0xFF80, 0x1B7E, 0xC602, 0xBE00, 0x06A6, + 0x1B7E, 0xC602, 0xBE00, 0x0764, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, + 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, + 0x0000 + }; rtl8168_hw_disable_mac_mcu_bps(dev); - rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 ); - rtl8168_mac_ocp_write( tp, 0xF802, 0xE0D3 ); - rtl8168_mac_ocp_write( tp, 0xF804, 0xE0D6 ); - rtl8168_mac_ocp_write( tp, 0xF806, 0xE0D9 ); - rtl8168_mac_ocp_write( tp, 0xF808, 0xE0DB ); - rtl8168_mac_ocp_write( tp, 0xF80A, 0xE0DD ); - rtl8168_mac_ocp_write( tp, 0xF80C, 0xE0DF ); - rtl8168_mac_ocp_write( tp, 0xF80E, 0xE0E1 ); - rtl8168_mac_ocp_write( tp, 0xF810, 0xC251 ); - rtl8168_mac_ocp_write( tp, 0xF812, 0x7340 ); - rtl8168_mac_ocp_write( tp, 0xF814, 0x49B1 ); - rtl8168_mac_ocp_write( tp, 0xF816, 0xF010 ); - rtl8168_mac_ocp_write( tp, 0xF818, 0x1D02 ); - rtl8168_mac_ocp_write( tp, 0xF81A, 0x8D40 ); - rtl8168_mac_ocp_write( tp, 0xF81C, 0xC202 ); - rtl8168_mac_ocp_write( tp, 0xF81E, 0xBA00 ); - rtl8168_mac_ocp_write( tp, 0xF820, 0x2C3A ); - rtl8168_mac_ocp_write( tp, 0xF822, 0xC0F0 ); - rtl8168_mac_ocp_write( tp, 0xF824, 0xE8DE ); - rtl8168_mac_ocp_write( tp, 0xF826, 0x2000 ); - rtl8168_mac_ocp_write( tp, 0xF828, 0x8000 ); - rtl8168_mac_ocp_write( tp, 0xF82A, 0xC0B6 ); - rtl8168_mac_ocp_write( tp, 0xF82C, 0x268C ); - rtl8168_mac_ocp_write( tp, 0xF82E, 0x752C ); - rtl8168_mac_ocp_write( tp, 0xF830, 0x49D4 ); - rtl8168_mac_ocp_write( tp, 0xF832, 0xF112 ); - rtl8168_mac_ocp_write( tp, 0xF834, 0xE025 ); - rtl8168_mac_ocp_write( tp, 0xF836, 0xC2F6 ); - rtl8168_mac_ocp_write( tp, 0xF838, 0x7146 ); - rtl8168_mac_ocp_write( tp, 0xF83A, 0xC2F5 ); - rtl8168_mac_ocp_write( tp, 0xF83C, 0x7340 ); - rtl8168_mac_ocp_write( tp, 0xF83E, 0x49BE ); - rtl8168_mac_ocp_write( tp, 0xF840, 0xF103 ); - rtl8168_mac_ocp_write( tp, 0xF842, 0xC7F2 ); - rtl8168_mac_ocp_write( tp, 0xF844, 0xE002 ); - rtl8168_mac_ocp_write( tp, 0xF846, 0xC7F1 ); - rtl8168_mac_ocp_write( tp, 0xF848, 0x304F ); - rtl8168_mac_ocp_write( tp, 0xF84A, 0x6226 ); - rtl8168_mac_ocp_write( tp, 0xF84C, 0x49A1 ); - rtl8168_mac_ocp_write( tp, 0xF84E, 0xF1F0 ); - rtl8168_mac_ocp_write( tp, 0xF850, 0x7222 ); - rtl8168_mac_ocp_write( tp, 0xF852, 0x49A0 ); - rtl8168_mac_ocp_write( tp, 0xF854, 0xF1ED ); - rtl8168_mac_ocp_write( tp, 0xF856, 0x2525 ); - rtl8168_mac_ocp_write( tp, 0xF858, 0x1F28 ); - rtl8168_mac_ocp_write( tp, 0xF85A, 0x3097 ); - rtl8168_mac_ocp_write( tp, 0xF85C, 0x3091 ); - rtl8168_mac_ocp_write( tp, 0xF85E, 0x9A36 ); - rtl8168_mac_ocp_write( tp, 0xF860, 0x752C ); - rtl8168_mac_ocp_write( tp, 0xF862, 0x21DC ); - rtl8168_mac_ocp_write( tp, 0xF864, 0x25BC ); - rtl8168_mac_ocp_write( tp, 0xF866, 0xC6E2 ); - rtl8168_mac_ocp_write( tp, 0xF868, 0x77C0 ); - rtl8168_mac_ocp_write( tp, 0xF86A, 0x1304 ); - rtl8168_mac_ocp_write( tp, 0xF86C, 0xF014 ); - rtl8168_mac_ocp_write( tp, 0xF86E, 0x1303 ); - rtl8168_mac_ocp_write( tp, 0xF870, 0xF014 ); - rtl8168_mac_ocp_write( tp, 0xF872, 0x1302 ); - rtl8168_mac_ocp_write( tp, 0xF874, 0xF014 ); - rtl8168_mac_ocp_write( tp, 0xF876, 0x1301 ); - rtl8168_mac_ocp_write( tp, 0xF878, 0xF014 ); - rtl8168_mac_ocp_write( tp, 0xF87A, 0x49D4 ); - rtl8168_mac_ocp_write( tp, 0xF87C, 0xF103 ); - rtl8168_mac_ocp_write( tp, 0xF87E, 0xC3D7 ); - rtl8168_mac_ocp_write( tp, 0xF880, 0xBB00 ); - rtl8168_mac_ocp_write( tp, 0xF882, 0xC618 ); - rtl8168_mac_ocp_write( tp, 0xF884, 0x67C6 ); - rtl8168_mac_ocp_write( tp, 0xF886, 0x752E ); - rtl8168_mac_ocp_write( tp, 0xF888, 0x22D7 ); - rtl8168_mac_ocp_write( tp, 0xF88A, 0x26DD ); - rtl8168_mac_ocp_write( tp, 0xF88C, 0x1505 ); - rtl8168_mac_ocp_write( tp, 0xF88E, 0xF013 ); - rtl8168_mac_ocp_write( tp, 0xF890, 0xC60A ); - rtl8168_mac_ocp_write( tp, 0xF892, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF894, 0xC309 ); - rtl8168_mac_ocp_write( tp, 0xF896, 0xBB00 ); - rtl8168_mac_ocp_write( tp, 0xF898, 0xC308 ); - rtl8168_mac_ocp_write( tp, 0xF89A, 0xBB00 ); - rtl8168_mac_ocp_write( tp, 0xF89C, 0xC307 ); - rtl8168_mac_ocp_write( tp, 0xF89E, 0xBB00 ); - rtl8168_mac_ocp_write( tp, 0xF8A0, 0xC306 ); - rtl8168_mac_ocp_write( tp, 0xF8A2, 0xBB00 ); - rtl8168_mac_ocp_write( tp, 0xF8A4, 0x25C8 ); - rtl8168_mac_ocp_write( tp, 0xF8A6, 0x25A6 ); - rtl8168_mac_ocp_write( tp, 0xF8A8, 0x25AC ); - rtl8168_mac_ocp_write( tp, 0xF8AA, 0x25B2 ); - rtl8168_mac_ocp_write( tp, 0xF8AC, 0x25B8 ); - rtl8168_mac_ocp_write( tp, 0xF8AE, 0xCD08 ); - rtl8168_mac_ocp_write( tp, 0xF8B0, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF8B2, 0xC0BC ); - rtl8168_mac_ocp_write( tp, 0xF8B4, 0xC2FF ); - rtl8168_mac_ocp_write( tp, 0xF8B6, 0x7340 ); - rtl8168_mac_ocp_write( tp, 0xF8B8, 0x49B0 ); - rtl8168_mac_ocp_write( tp, 0xF8BA, 0xF04E ); - rtl8168_mac_ocp_write( tp, 0xF8BC, 0x1F46 ); - rtl8168_mac_ocp_write( tp, 0xF8BE, 0x308F ); - rtl8168_mac_ocp_write( tp, 0xF8C0, 0xC3F7 ); - rtl8168_mac_ocp_write( tp, 0xF8C2, 0x1C04 ); - rtl8168_mac_ocp_write( tp, 0xF8C4, 0xE84D ); - rtl8168_mac_ocp_write( tp, 0xF8C6, 0x1401 ); - rtl8168_mac_ocp_write( tp, 0xF8C8, 0xF147 ); - rtl8168_mac_ocp_write( tp, 0xF8CA, 0x7226 ); - rtl8168_mac_ocp_write( tp, 0xF8CC, 0x49A7 ); - rtl8168_mac_ocp_write( tp, 0xF8CE, 0xF044 ); - rtl8168_mac_ocp_write( tp, 0xF8D0, 0x7222 ); - rtl8168_mac_ocp_write( tp, 0xF8D2, 0x2525 ); - rtl8168_mac_ocp_write( tp, 0xF8D4, 0x1F30 ); - rtl8168_mac_ocp_write( tp, 0xF8D6, 0x3097 ); - rtl8168_mac_ocp_write( tp, 0xF8D8, 0x3091 ); - rtl8168_mac_ocp_write( tp, 0xF8DA, 0x7340 ); - rtl8168_mac_ocp_write( tp, 0xF8DC, 0xC4EA ); - rtl8168_mac_ocp_write( tp, 0xF8DE, 0x401C ); - rtl8168_mac_ocp_write( tp, 0xF8E0, 0xF006 ); - rtl8168_mac_ocp_write( tp, 0xF8E2, 0xC6E8 ); - rtl8168_mac_ocp_write( tp, 0xF8E4, 0x75C0 ); - rtl8168_mac_ocp_write( tp, 0xF8E6, 0x49D7 ); - rtl8168_mac_ocp_write( tp, 0xF8E8, 0xF105 ); - rtl8168_mac_ocp_write( tp, 0xF8EA, 0xE036 ); - rtl8168_mac_ocp_write( tp, 0xF8EC, 0x1D08 ); - rtl8168_mac_ocp_write( tp, 0xF8EE, 0x8DC1 ); - rtl8168_mac_ocp_write( tp, 0xF8F0, 0x0208 ); - rtl8168_mac_ocp_write( tp, 0xF8F2, 0x6640 ); - rtl8168_mac_ocp_write( tp, 0xF8F4, 0x2764 ); - rtl8168_mac_ocp_write( tp, 0xF8F6, 0x1606 ); - rtl8168_mac_ocp_write( tp, 0xF8F8, 0xF12F ); - rtl8168_mac_ocp_write( tp, 0xF8FA, 0x6346 ); - rtl8168_mac_ocp_write( tp, 0xF8FC, 0x133B ); - rtl8168_mac_ocp_write( tp, 0xF8FE, 0xF12C ); - rtl8168_mac_ocp_write( tp, 0xF900, 0x9B34 ); - rtl8168_mac_ocp_write( tp, 0xF902, 0x1B18 ); - rtl8168_mac_ocp_write( tp, 0xF904, 0x3093 ); - rtl8168_mac_ocp_write( tp, 0xF906, 0xC32A ); - rtl8168_mac_ocp_write( tp, 0xF908, 0x1C10 ); - rtl8168_mac_ocp_write( tp, 0xF90A, 0xE82A ); - rtl8168_mac_ocp_write( tp, 0xF90C, 0x1401 ); - rtl8168_mac_ocp_write( tp, 0xF90E, 0xF124 ); - rtl8168_mac_ocp_write( tp, 0xF910, 0x1A36 ); - rtl8168_mac_ocp_write( tp, 0xF912, 0x308A ); - rtl8168_mac_ocp_write( tp, 0xF914, 0x7322 ); - rtl8168_mac_ocp_write( tp, 0xF916, 0x25B5 ); - rtl8168_mac_ocp_write( tp, 0xF918, 0x0B0E ); - rtl8168_mac_ocp_write( tp, 0xF91A, 0x1C00 ); - rtl8168_mac_ocp_write( tp, 0xF91C, 0xE82C ); - rtl8168_mac_ocp_write( tp, 0xF91E, 0xC71F ); - rtl8168_mac_ocp_write( tp, 0xF920, 0x4027 ); - rtl8168_mac_ocp_write( tp, 0xF922, 0xF11A ); - rtl8168_mac_ocp_write( tp, 0xF924, 0xE838 ); - rtl8168_mac_ocp_write( tp, 0xF926, 0x1F42 ); - rtl8168_mac_ocp_write( tp, 0xF928, 0x308F ); - rtl8168_mac_ocp_write( tp, 0xF92A, 0x1B08 ); - rtl8168_mac_ocp_write( tp, 0xF92C, 0xE824 ); - rtl8168_mac_ocp_write( tp, 0xF92E, 0x7236 ); - rtl8168_mac_ocp_write( tp, 0xF930, 0x7746 ); - rtl8168_mac_ocp_write( tp, 0xF932, 0x1700 ); - rtl8168_mac_ocp_write( tp, 0xF934, 0xF00D ); - rtl8168_mac_ocp_write( tp, 0xF936, 0xC313 ); - rtl8168_mac_ocp_write( tp, 0xF938, 0x401F ); - rtl8168_mac_ocp_write( tp, 0xF93A, 0xF103 ); - rtl8168_mac_ocp_write( tp, 0xF93C, 0x1F00 ); - rtl8168_mac_ocp_write( tp, 0xF93E, 0x9F46 ); - rtl8168_mac_ocp_write( tp, 0xF940, 0x7744 ); - rtl8168_mac_ocp_write( tp, 0xF942, 0x449F ); - rtl8168_mac_ocp_write( tp, 0xF944, 0x445F ); - rtl8168_mac_ocp_write( tp, 0xF946, 0xE817 ); - rtl8168_mac_ocp_write( tp, 0xF948, 0xC70A ); - rtl8168_mac_ocp_write( tp, 0xF94A, 0x4027 ); - rtl8168_mac_ocp_write( tp, 0xF94C, 0xF105 ); - rtl8168_mac_ocp_write( tp, 0xF94E, 0xC302 ); - rtl8168_mac_ocp_write( tp, 0xF950, 0xBB00 ); - rtl8168_mac_ocp_write( tp, 0xF952, 0x2E08 ); - rtl8168_mac_ocp_write( tp, 0xF954, 0x2DC2 ); - rtl8168_mac_ocp_write( tp, 0xF956, 0xC7FF ); - rtl8168_mac_ocp_write( tp, 0xF958, 0xBF00 ); - rtl8168_mac_ocp_write( tp, 0xF95A, 0xCDB8 ); - rtl8168_mac_ocp_write( tp, 0xF95C, 0xFFFF ); - rtl8168_mac_ocp_write( tp, 0xF95E, 0x0C02 ); - rtl8168_mac_ocp_write( tp, 0xF960, 0xA554 ); - rtl8168_mac_ocp_write( tp, 0xF962, 0xA5DC ); - rtl8168_mac_ocp_write( tp, 0xF964, 0x402F ); - rtl8168_mac_ocp_write( tp, 0xF966, 0xF105 ); - rtl8168_mac_ocp_write( tp, 0xF968, 0x1400 ); - rtl8168_mac_ocp_write( tp, 0xF96A, 0xF1FA ); - rtl8168_mac_ocp_write( tp, 0xF96C, 0x1C01 ); - rtl8168_mac_ocp_write( tp, 0xF96E, 0xE002 ); - rtl8168_mac_ocp_write( tp, 0xF970, 0x1C00 ); - rtl8168_mac_ocp_write( tp, 0xF972, 0xFF80 ); - rtl8168_mac_ocp_write( tp, 0xF974, 0x49B0 ); - rtl8168_mac_ocp_write( tp, 0xF976, 0xF004 ); - rtl8168_mac_ocp_write( tp, 0xF978, 0x0B01 ); - rtl8168_mac_ocp_write( tp, 0xF97A, 0xA1D3 ); - rtl8168_mac_ocp_write( tp, 0xF97C, 0xE003 ); - rtl8168_mac_ocp_write( tp, 0xF97E, 0x0B02 ); - rtl8168_mac_ocp_write( tp, 0xF980, 0xA5D3 ); - rtl8168_mac_ocp_write( tp, 0xF982, 0x3127 ); - rtl8168_mac_ocp_write( tp, 0xF984, 0x3720 ); - rtl8168_mac_ocp_write( tp, 0xF986, 0x0B02 ); - rtl8168_mac_ocp_write( tp, 0xF988, 0xA5D3 ); - rtl8168_mac_ocp_write( tp, 0xF98A, 0x3127 ); - rtl8168_mac_ocp_write( tp, 0xF98C, 0x3720 ); - rtl8168_mac_ocp_write( tp, 0xF98E, 0x1300 ); - rtl8168_mac_ocp_write( tp, 0xF990, 0xF1FB ); - rtl8168_mac_ocp_write( tp, 0xF992, 0xFF80 ); - rtl8168_mac_ocp_write( tp, 0xF994, 0x7322 ); - rtl8168_mac_ocp_write( tp, 0xF996, 0x25B5 ); - rtl8168_mac_ocp_write( tp, 0xF998, 0x1E28 ); - rtl8168_mac_ocp_write( tp, 0xF99A, 0x30DE ); - rtl8168_mac_ocp_write( tp, 0xF99C, 0x30D9 ); - rtl8168_mac_ocp_write( tp, 0xF99E, 0x7264 ); - rtl8168_mac_ocp_write( tp, 0xF9A0, 0x1E11 ); - rtl8168_mac_ocp_write( tp, 0xF9A2, 0x2368 ); - rtl8168_mac_ocp_write( tp, 0xF9A4, 0x3116 ); - rtl8168_mac_ocp_write( tp, 0xF9A6, 0xFF80 ); - rtl8168_mac_ocp_write( tp, 0xF9A8, 0x1B7E ); - rtl8168_mac_ocp_write( tp, 0xF9AA, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9AC, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9AE, 0x06A6 ); - rtl8168_mac_ocp_write( tp, 0xF9B0, 0x1B7E ); - rtl8168_mac_ocp_write( tp, 0xF9B2, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9B4, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9B6, 0x0764 ); - rtl8168_mac_ocp_write( tp, 0xF9B8, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9BA, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9BC, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF9BE, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9C0, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9C2, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF9C4, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9C6, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9C8, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF9CA, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9CC, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9CE, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF9D0, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF9D2, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF9D4, 0x0000 ); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_1); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_1i); + } - rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 ); + rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); - rtl8168_mac_ocp_write( tp, 0xFC28, 0x2549 ); - rtl8168_mac_ocp_write( tp, 0xFC2A, 0x06A5 ); - rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0763 ); + rtl8168_mac_ocp_write(tp, 0xFC28, 0x2549); + rtl8168_mac_ocp_write(tp, 0xFC2A, 0x06A5); + rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0763); +} + +static bool +rtl8168_check_dash_other_fun_present(struct rtl8168_private *tp) +{ + //check if func 2 exist + if (rtl8168_csi_other_fun_read(tp, 2, 0x00) != 0xffffffff) + return true; + + return false; } static void rtl8168_set_mac_mcu_8168ep_2(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8168ep_2 = { + 0xE008, 0xE017, 0xE052, 0xE057, 0xE059, 0xE05B, 0xE05D, 0xE05F, 0xC50F, + 0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00, + 0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402, + 0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A, + 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF117, 0xC123, 0xC223, + 0xC323, 0xE808, 0xC322, 0xE806, 0xC321, 0xE804, 0xC320, 0xE802, 0xE00C, + 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, + 0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, + 0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001, + 0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0490, + 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, + 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000 + }; rtl8168_hw_disable_mac_mcu_bps(dev); - rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 ); - rtl8168_mac_ocp_write( tp, 0xF802, 0xE017 ); - rtl8168_mac_ocp_write( tp, 0xF804, 0xE019 ); - rtl8168_mac_ocp_write( tp, 0xF806, 0xE01B ); - rtl8168_mac_ocp_write( tp, 0xF808, 0xE01D ); - rtl8168_mac_ocp_write( tp, 0xF80A, 0xE01F ); - rtl8168_mac_ocp_write( tp, 0xF80C, 0xE021 ); - rtl8168_mac_ocp_write( tp, 0xF80E, 0xE023 ); - rtl8168_mac_ocp_write( tp, 0xF810, 0xC50F ); - rtl8168_mac_ocp_write( tp, 0xF812, 0x76A4 ); - rtl8168_mac_ocp_write( tp, 0xF814, 0x49E3 ); - rtl8168_mac_ocp_write( tp, 0xF816, 0xF007 ); - rtl8168_mac_ocp_write( tp, 0xF818, 0x49C0 ); - rtl8168_mac_ocp_write( tp, 0xF81A, 0xF103 ); - rtl8168_mac_ocp_write( tp, 0xF81C, 0xC607 ); - rtl8168_mac_ocp_write( tp, 0xF81E, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF820, 0xC606 ); - rtl8168_mac_ocp_write( tp, 0xF822, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF824, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF826, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF828, 0x0BDA ); - rtl8168_mac_ocp_write( tp, 0xF82A, 0x0BB0 ); - rtl8168_mac_ocp_write( tp, 0xF82C, 0x0BBA ); - rtl8168_mac_ocp_write( tp, 0xF82E, 0xDC00 ); - rtl8168_mac_ocp_write( tp, 0xF830, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF832, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF834, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF836, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF838, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF83A, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF83C, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF83E, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF840, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF842, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF844, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF846, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF848, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF84A, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF84C, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF84E, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF850, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF852, 0x0000 ); - rtl8168_mac_ocp_write( tp, 0xF854, 0xC602 ); - rtl8168_mac_ocp_write( tp, 0xF856, 0xBE00 ); - rtl8168_mac_ocp_write( tp, 0xF858, 0x0000 ); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_2); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_2i); + } - rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 ); + rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); - rtl8168_mac_ocp_write( tp, 0xFC28, 0x0BB3 ); + rtl8168_mac_ocp_write(tp, 0xFC28, 0x0BB3); + if (false == rtl8168_check_dash_other_fun_present(tp)) + rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7); + //rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485); } static void rtl8168_set_mac_mcu_8168h_1(struct net_device *dev) { + rtl8168_hw_disable_mac_mcu_bps(dev); +} + +static void +rtl8168_set_mac_mcu_8168h_2(struct net_device *dev) +{ struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8168h_1 = { + 0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE07A, 0xC707, + 0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00, + 0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123, + 0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A, + 0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2, 0x49D9, 0xF111, + 0xC517, 0x9DC8, 0xC516, 0x9DD2, 0xC618, 0x75C0, 0x49D4, 0xF003, 0x49D0, + 0xF104, 0xC60A, 0xC50E, 0x9DC0, 0xB005, 0xC607, 0x9DC0, 0xB007, 0xC602, + 0xBE00, 0x1A06, 0xB400, 0xE86C, 0xA000, 0x01E1, 0x0200, 0x9200, 0xE84C, + 0xE004, 0xE908, 0xC502, 0xBD00, 0x0B58, 0xB407, 0xB404, 0x2195, 0x25BD, + 0x9BE0, 0x1C1C, 0x484F, 0x9CE2, 0x72E2, 0x49AE, 0xF1FE, 0x0B00, 0xF116, + 0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, + 0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C, + 0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481, + 0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0x9C46, + 0xC402, 0xBC00, 0x0578, 0xC602, 0xBE00, 0x0000 + }; rtl8168_hw_disable_mac_mcu_bps(dev); - rtl8168_mac_ocp_write(tp, 0xF800, 0xE008); - rtl8168_mac_ocp_write(tp, 0xF802, 0xE00F); - rtl8168_mac_ocp_write(tp, 0xF804, 0xE011); - rtl8168_mac_ocp_write(tp, 0xF806, 0xE047); - rtl8168_mac_ocp_write(tp, 0xF808, 0xE049); - rtl8168_mac_ocp_write(tp, 0xF80A, 0xE073); - rtl8168_mac_ocp_write(tp, 0xF80C, 0xE075); - rtl8168_mac_ocp_write(tp, 0xF80E, 0xE077); - rtl8168_mac_ocp_write(tp, 0xF810, 0xC707); - rtl8168_mac_ocp_write(tp, 0xF812, 0x1D00); - rtl8168_mac_ocp_write(tp, 0xF814, 0x8DE2); - rtl8168_mac_ocp_write(tp, 0xF816, 0x48C1); - rtl8168_mac_ocp_write(tp, 0xF818, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF81A, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF81C, 0x00E4); - rtl8168_mac_ocp_write(tp, 0xF81E, 0xE0C0); - rtl8168_mac_ocp_write(tp, 0xF820, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF822, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF824, 0x0216); - rtl8168_mac_ocp_write(tp, 0xF826, 0xC634); - rtl8168_mac_ocp_write(tp, 0xF828, 0x75C0); - rtl8168_mac_ocp_write(tp, 0xF82A, 0x49D3); - rtl8168_mac_ocp_write(tp, 0xF82C, 0xF027); - rtl8168_mac_ocp_write(tp, 0xF82E, 0xC631); - rtl8168_mac_ocp_write(tp, 0xF830, 0x75C0); - rtl8168_mac_ocp_write(tp, 0xF832, 0x49D3); - rtl8168_mac_ocp_write(tp, 0xF834, 0xF123); - rtl8168_mac_ocp_write(tp, 0xF836, 0xC627); - rtl8168_mac_ocp_write(tp, 0xF838, 0x75C0); - rtl8168_mac_ocp_write(tp, 0xF83A, 0xB405); - rtl8168_mac_ocp_write(tp, 0xF83C, 0xC525); - rtl8168_mac_ocp_write(tp, 0xF83E, 0x9DC0); - rtl8168_mac_ocp_write(tp, 0xF840, 0xC621); - rtl8168_mac_ocp_write(tp, 0xF842, 0x75C8); - rtl8168_mac_ocp_write(tp, 0xF844, 0x49D5); - rtl8168_mac_ocp_write(tp, 0xF846, 0xF00A); - rtl8168_mac_ocp_write(tp, 0xF848, 0x49D6); - rtl8168_mac_ocp_write(tp, 0xF84A, 0xF008); - rtl8168_mac_ocp_write(tp, 0xF84C, 0x49D7); - rtl8168_mac_ocp_write(tp, 0xF84E, 0xF006); - rtl8168_mac_ocp_write(tp, 0xF850, 0x49D8); - rtl8168_mac_ocp_write(tp, 0xF852, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF854, 0x75D2); - rtl8168_mac_ocp_write(tp, 0xF856, 0x49D9); - rtl8168_mac_ocp_write(tp, 0xF858, 0xF111); - rtl8168_mac_ocp_write(tp, 0xF85A, 0xC517); - rtl8168_mac_ocp_write(tp, 0xF85C, 0x9DC8); - rtl8168_mac_ocp_write(tp, 0xF85E, 0xC516); - rtl8168_mac_ocp_write(tp, 0xF860, 0x9DD2); - rtl8168_mac_ocp_write(tp, 0xF862, 0xC618); - rtl8168_mac_ocp_write(tp, 0xF864, 0x75C0); - rtl8168_mac_ocp_write(tp, 0xF866, 0x49D4); - rtl8168_mac_ocp_write(tp, 0xF868, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF86A, 0x49D0); - rtl8168_mac_ocp_write(tp, 0xF86C, 0xF104); - rtl8168_mac_ocp_write(tp, 0xF86E, 0xC60A); - rtl8168_mac_ocp_write(tp, 0xF870, 0xC50E); - rtl8168_mac_ocp_write(tp, 0xF872, 0x9DC0); - rtl8168_mac_ocp_write(tp, 0xF874, 0xB005); - rtl8168_mac_ocp_write(tp, 0xF876, 0xC607); - rtl8168_mac_ocp_write(tp, 0xF878, 0x9DC0); - rtl8168_mac_ocp_write(tp, 0xF87A, 0xB007); - rtl8168_mac_ocp_write(tp, 0xF87C, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF87E, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF880, 0x1A06); - rtl8168_mac_ocp_write(tp, 0xF882, 0xB400); - rtl8168_mac_ocp_write(tp, 0xF884, 0xE86C); - rtl8168_mac_ocp_write(tp, 0xF886, 0xA000); - rtl8168_mac_ocp_write(tp, 0xF888, 0x01E1); - rtl8168_mac_ocp_write(tp, 0xF88A, 0x0200); - rtl8168_mac_ocp_write(tp, 0xF88C, 0x9200); - rtl8168_mac_ocp_write(tp, 0xF88E, 0xE84C); - rtl8168_mac_ocp_write(tp, 0xF890, 0xE004); - rtl8168_mac_ocp_write(tp, 0xF892, 0xE908); - rtl8168_mac_ocp_write(tp, 0xF894, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF896, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF898, 0x0B58); - rtl8168_mac_ocp_write(tp, 0xF89A, 0xB407); - rtl8168_mac_ocp_write(tp, 0xF89C, 0xB404); - rtl8168_mac_ocp_write(tp, 0xF89E, 0x2195); - rtl8168_mac_ocp_write(tp, 0xF8A0, 0x25BD); - rtl8168_mac_ocp_write(tp, 0xF8A2, 0x9BE0); - rtl8168_mac_ocp_write(tp, 0xF8A4, 0x1C1C); - rtl8168_mac_ocp_write(tp, 0xF8A6, 0x484F); - rtl8168_mac_ocp_write(tp, 0xF8A8, 0x9CE2); - rtl8168_mac_ocp_write(tp, 0xF8AA, 0x72E2); - rtl8168_mac_ocp_write(tp, 0xF8AC, 0x49AE); - rtl8168_mac_ocp_write(tp, 0xF8AE, 0xF1FE); - rtl8168_mac_ocp_write(tp, 0xF8B0, 0x0B00); - rtl8168_mac_ocp_write(tp, 0xF8B2, 0xF116); - rtl8168_mac_ocp_write(tp, 0xF8B4, 0xC71C); - rtl8168_mac_ocp_write(tp, 0xF8B6, 0xC419); - rtl8168_mac_ocp_write(tp, 0xF8B8, 0x9CE0); - rtl8168_mac_ocp_write(tp, 0xF8BA, 0x1C13); - rtl8168_mac_ocp_write(tp, 0xF8BC, 0x484F); - rtl8168_mac_ocp_write(tp, 0xF8BE, 0x9CE2); - rtl8168_mac_ocp_write(tp, 0xF8C0, 0x74E2); - rtl8168_mac_ocp_write(tp, 0xF8C2, 0x49CE); - rtl8168_mac_ocp_write(tp, 0xF8C4, 0xF1FE); - rtl8168_mac_ocp_write(tp, 0xF8C6, 0xC412); - rtl8168_mac_ocp_write(tp, 0xF8C8, 0x9CE0); - rtl8168_mac_ocp_write(tp, 0xF8CA, 0x1C13); - rtl8168_mac_ocp_write(tp, 0xF8CC, 0x484F); - rtl8168_mac_ocp_write(tp, 0xF8CE, 0x9CE2); - rtl8168_mac_ocp_write(tp, 0xF8D0, 0x74E2); - rtl8168_mac_ocp_write(tp, 0xF8D2, 0x49CE); - rtl8168_mac_ocp_write(tp, 0xF8D4, 0xF1FE); - rtl8168_mac_ocp_write(tp, 0xF8D6, 0xC70C); - rtl8168_mac_ocp_write(tp, 0xF8D8, 0x74F8); - rtl8168_mac_ocp_write(tp, 0xF8DA, 0x48C3); - rtl8168_mac_ocp_write(tp, 0xF8DC, 0x8CF8); - rtl8168_mac_ocp_write(tp, 0xF8DE, 0xB004); - rtl8168_mac_ocp_write(tp, 0xF8E0, 0xB007); - rtl8168_mac_ocp_write(tp, 0xF8E2, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF8E4, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF8E6, 0x0F24); - rtl8168_mac_ocp_write(tp, 0xF8E8, 0x0481); - rtl8168_mac_ocp_write(tp, 0xF8EA, 0x0C81); - rtl8168_mac_ocp_write(tp, 0xF8EC, 0xDE24); - rtl8168_mac_ocp_write(tp, 0xF8EE, 0xE000); - rtl8168_mac_ocp_write(tp, 0xF8F0, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF8F2, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF8F4, 0x0CA4); - rtl8168_mac_ocp_write(tp, 0xF8F6, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF8F8, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF8FA, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF8FC, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF8FE, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF900, 0x0000); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_1); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_1i); + } rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); @@ -8527,792 +8934,264 @@ rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0B26); rtl8168_mac_ocp_write(tp, 0xFC30, 0x0F02); rtl8168_mac_ocp_write(tp, 0xFC32, 0x0CA0); + //rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C); rtl8168_mac_ocp_write(tp, 0xFC38, 0x003F); } static void +rtl8168_set_mac_mcu_8168h_3(struct net_device *dev) +{ + rtl8168_hw_disable_mac_mcu_bps(dev); +} + +static void rtl8168_set_mac_mcu_8168fp_1(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + u16 breakPointEnabled = 0; rtl8168_hw_disable_mac_mcu_bps(dev); - rtl8168_mac_ocp_write(tp, 0xF800, 0xE00A); - rtl8168_mac_ocp_write(tp, 0xF802, 0xE0C1); - rtl8168_mac_ocp_write(tp, 0xF804, 0xE104); - rtl8168_mac_ocp_write(tp, 0xF806, 0xE108); - rtl8168_mac_ocp_write(tp, 0xF808, 0xE10D); - rtl8168_mac_ocp_write(tp, 0xF80A, 0xE112); - rtl8168_mac_ocp_write(tp, 0xF80C, 0xE11C); - rtl8168_mac_ocp_write(tp, 0xF80E, 0xE121); - rtl8168_mac_ocp_write(tp, 0xF810, 0xE000); - rtl8168_mac_ocp_write(tp, 0xF812, 0xE0C8); - rtl8168_mac_ocp_write(tp, 0xF814, 0xB400); - rtl8168_mac_ocp_write(tp, 0xF816, 0xC1FE); - rtl8168_mac_ocp_write(tp, 0xF818, 0x49E2); - rtl8168_mac_ocp_write(tp, 0xF81A, 0xF04C); - rtl8168_mac_ocp_write(tp, 0xF81C, 0x49EA); - rtl8168_mac_ocp_write(tp, 0xF81E, 0xF04A); - rtl8168_mac_ocp_write(tp, 0xF820, 0x74E6); - rtl8168_mac_ocp_write(tp, 0xF822, 0xC246); - rtl8168_mac_ocp_write(tp, 0xF824, 0x7542); - rtl8168_mac_ocp_write(tp, 0xF826, 0x73EC); - rtl8168_mac_ocp_write(tp, 0xF828, 0x1800); - rtl8168_mac_ocp_write(tp, 0xF82A, 0x49C0); - rtl8168_mac_ocp_write(tp, 0xF82C, 0xF10D); - rtl8168_mac_ocp_write(tp, 0xF82E, 0x49C1); - rtl8168_mac_ocp_write(tp, 0xF830, 0xF10B); - rtl8168_mac_ocp_write(tp, 0xF832, 0x49C2); - rtl8168_mac_ocp_write(tp, 0xF834, 0xF109); - rtl8168_mac_ocp_write(tp, 0xF836, 0x49B0); - rtl8168_mac_ocp_write(tp, 0xF838, 0xF107); - rtl8168_mac_ocp_write(tp, 0xF83A, 0x49B1); - rtl8168_mac_ocp_write(tp, 0xF83C, 0xF105); - rtl8168_mac_ocp_write(tp, 0xF83E, 0x7220); - rtl8168_mac_ocp_write(tp, 0xF840, 0x49A2); - rtl8168_mac_ocp_write(tp, 0xF842, 0xF102); - rtl8168_mac_ocp_write(tp, 0xF844, 0xE002); - rtl8168_mac_ocp_write(tp, 0xF846, 0x4800); - rtl8168_mac_ocp_write(tp, 0xF848, 0x49D0); - rtl8168_mac_ocp_write(tp, 0xF84A, 0xF10A); - rtl8168_mac_ocp_write(tp, 0xF84C, 0x49D1); - rtl8168_mac_ocp_write(tp, 0xF84E, 0xF108); - rtl8168_mac_ocp_write(tp, 0xF850, 0x49D2); - rtl8168_mac_ocp_write(tp, 0xF852, 0xF106); - rtl8168_mac_ocp_write(tp, 0xF854, 0x49D3); - rtl8168_mac_ocp_write(tp, 0xF856, 0xF104); - rtl8168_mac_ocp_write(tp, 0xF858, 0x49DF); - rtl8168_mac_ocp_write(tp, 0xF85A, 0xF102); - rtl8168_mac_ocp_write(tp, 0xF85C, 0xE00C); - rtl8168_mac_ocp_write(tp, 0xF85E, 0x4801); - rtl8168_mac_ocp_write(tp, 0xF860, 0x72E4); - rtl8168_mac_ocp_write(tp, 0xF862, 0x49AD); - rtl8168_mac_ocp_write(tp, 0xF864, 0xF108); - rtl8168_mac_ocp_write(tp, 0xF866, 0xC225); - rtl8168_mac_ocp_write(tp, 0xF868, 0x6741); - rtl8168_mac_ocp_write(tp, 0xF86A, 0x48F0); - rtl8168_mac_ocp_write(tp, 0xF86C, 0x8F41); - rtl8168_mac_ocp_write(tp, 0xF86E, 0x4870); - rtl8168_mac_ocp_write(tp, 0xF870, 0x8F41); - rtl8168_mac_ocp_write(tp, 0xF872, 0xC7CF); - rtl8168_mac_ocp_write(tp, 0xF874, 0x49B5); - rtl8168_mac_ocp_write(tp, 0xF876, 0xF01F); - rtl8168_mac_ocp_write(tp, 0xF878, 0x49B2); - rtl8168_mac_ocp_write(tp, 0xF87A, 0xF00B); - rtl8168_mac_ocp_write(tp, 0xF87C, 0x4980); - rtl8168_mac_ocp_write(tp, 0xF87E, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF880, 0x484E); - rtl8168_mac_ocp_write(tp, 0xF882, 0x94E7); - rtl8168_mac_ocp_write(tp, 0xF884, 0x4981); - rtl8168_mac_ocp_write(tp, 0xF886, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF888, 0x485E); - rtl8168_mac_ocp_write(tp, 0xF88A, 0xC212); - rtl8168_mac_ocp_write(tp, 0xF88C, 0x9543); - rtl8168_mac_ocp_write(tp, 0xF88E, 0xE071); - rtl8168_mac_ocp_write(tp, 0xF890, 0x49B6); - rtl8168_mac_ocp_write(tp, 0xF892, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF894, 0x49B3); - rtl8168_mac_ocp_write(tp, 0xF896, 0xF10F); - rtl8168_mac_ocp_write(tp, 0xF898, 0x4980); - rtl8168_mac_ocp_write(tp, 0xF89A, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF89C, 0x484E); - rtl8168_mac_ocp_write(tp, 0xF89E, 0x94E7); - rtl8168_mac_ocp_write(tp, 0xF8A0, 0x4981); - rtl8168_mac_ocp_write(tp, 0xF8A2, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF8A4, 0x485E); - rtl8168_mac_ocp_write(tp, 0xF8A6, 0xC204); - rtl8168_mac_ocp_write(tp, 0xF8A8, 0x9543); - rtl8168_mac_ocp_write(tp, 0xF8AA, 0xE005); - rtl8168_mac_ocp_write(tp, 0xF8AC, 0xE000); - rtl8168_mac_ocp_write(tp, 0xF8AE, 0xE0FC); - rtl8168_mac_ocp_write(tp, 0xF8B0, 0xE0FA); - rtl8168_mac_ocp_write(tp, 0xF8B2, 0xE065); - rtl8168_mac_ocp_write(tp, 0xF8B4, 0x49B7); - rtl8168_mac_ocp_write(tp, 0xF8B6, 0xF007); - rtl8168_mac_ocp_write(tp, 0xF8B8, 0x4980); - rtl8168_mac_ocp_write(tp, 0xF8BA, 0xF005); - rtl8168_mac_ocp_write(tp, 0xF8BC, 0x1A38); - rtl8168_mac_ocp_write(tp, 0xF8BE, 0x46D4); - rtl8168_mac_ocp_write(tp, 0xF8C0, 0x1200); - rtl8168_mac_ocp_write(tp, 0xF8C2, 0xF109); - rtl8168_mac_ocp_write(tp, 0xF8C4, 0x4981); - rtl8168_mac_ocp_write(tp, 0xF8C6, 0xF055); - rtl8168_mac_ocp_write(tp, 0xF8C8, 0x49C3); - rtl8168_mac_ocp_write(tp, 0xF8CA, 0xF105); - rtl8168_mac_ocp_write(tp, 0xF8CC, 0x1A30); - rtl8168_mac_ocp_write(tp, 0xF8CE, 0x46D5); - rtl8168_mac_ocp_write(tp, 0xF8D0, 0x1200); - rtl8168_mac_ocp_write(tp, 0xF8D2, 0xF04F); - rtl8168_mac_ocp_write(tp, 0xF8D4, 0x7220); - rtl8168_mac_ocp_write(tp, 0xF8D6, 0x49A2); - rtl8168_mac_ocp_write(tp, 0xF8D8, 0xF130); - rtl8168_mac_ocp_write(tp, 0xF8DA, 0x49C1); - rtl8168_mac_ocp_write(tp, 0xF8DC, 0xF12E); - rtl8168_mac_ocp_write(tp, 0xF8DE, 0x49B0); - rtl8168_mac_ocp_write(tp, 0xF8E0, 0xF12C); - rtl8168_mac_ocp_write(tp, 0xF8E2, 0xC2E6); - rtl8168_mac_ocp_write(tp, 0xF8E4, 0x7240); - rtl8168_mac_ocp_write(tp, 0xF8E6, 0x49A8); - rtl8168_mac_ocp_write(tp, 0xF8E8, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF8EA, 0x49D0); - rtl8168_mac_ocp_write(tp, 0xF8EC, 0xF126); - rtl8168_mac_ocp_write(tp, 0xF8EE, 0x49A9); - rtl8168_mac_ocp_write(tp, 0xF8F0, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF8F2, 0x49D1); - rtl8168_mac_ocp_write(tp, 0xF8F4, 0xF122); - rtl8168_mac_ocp_write(tp, 0xF8F6, 0x49AA); - rtl8168_mac_ocp_write(tp, 0xF8F8, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF8FA, 0x49D2); - rtl8168_mac_ocp_write(tp, 0xF8FC, 0xF11E); - rtl8168_mac_ocp_write(tp, 0xF8FE, 0x49AB); - rtl8168_mac_ocp_write(tp, 0xF900, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF902, 0x49DF); - rtl8168_mac_ocp_write(tp, 0xF904, 0xF11A); - rtl8168_mac_ocp_write(tp, 0xF906, 0x49AC); - rtl8168_mac_ocp_write(tp, 0xF908, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF90A, 0x49D3); - rtl8168_mac_ocp_write(tp, 0xF90C, 0xF116); - rtl8168_mac_ocp_write(tp, 0xF90E, 0x4980); - rtl8168_mac_ocp_write(tp, 0xF910, 0xF003); - rtl8168_mac_ocp_write(tp, 0xF912, 0x49C7); - rtl8168_mac_ocp_write(tp, 0xF914, 0xF105); - rtl8168_mac_ocp_write(tp, 0xF916, 0x4981); - rtl8168_mac_ocp_write(tp, 0xF918, 0xF02C); - rtl8168_mac_ocp_write(tp, 0xF91A, 0x49D7); - rtl8168_mac_ocp_write(tp, 0xF91C, 0xF02A); - rtl8168_mac_ocp_write(tp, 0xF91E, 0x49C0); - rtl8168_mac_ocp_write(tp, 0xF920, 0xF00C); - rtl8168_mac_ocp_write(tp, 0xF922, 0xC721); - rtl8168_mac_ocp_write(tp, 0xF924, 0x62F4); - rtl8168_mac_ocp_write(tp, 0xF926, 0x49A0); - rtl8168_mac_ocp_write(tp, 0xF928, 0xF008); - rtl8168_mac_ocp_write(tp, 0xF92A, 0x49A4); - rtl8168_mac_ocp_write(tp, 0xF92C, 0xF106); - rtl8168_mac_ocp_write(tp, 0xF92E, 0x4824); - rtl8168_mac_ocp_write(tp, 0xF930, 0x8AF4); - rtl8168_mac_ocp_write(tp, 0xF932, 0xC71A); - rtl8168_mac_ocp_write(tp, 0xF934, 0x1A40); - rtl8168_mac_ocp_write(tp, 0xF936, 0x9AE0); - rtl8168_mac_ocp_write(tp, 0xF938, 0x49B6); - rtl8168_mac_ocp_write(tp, 0xF93A, 0xF017); - rtl8168_mac_ocp_write(tp, 0xF93C, 0x200E); - rtl8168_mac_ocp_write(tp, 0xF93E, 0xC7B8); - rtl8168_mac_ocp_write(tp, 0xF940, 0x72E0); - rtl8168_mac_ocp_write(tp, 0xF942, 0x4710); - rtl8168_mac_ocp_write(tp, 0xF944, 0x92E1); - rtl8168_mac_ocp_write(tp, 0xF946, 0xC70E); - rtl8168_mac_ocp_write(tp, 0xF948, 0x77E0); - rtl8168_mac_ocp_write(tp, 0xF94A, 0x49F0); - rtl8168_mac_ocp_write(tp, 0xF94C, 0xF112); - rtl8168_mac_ocp_write(tp, 0xF94E, 0xC70B); - rtl8168_mac_ocp_write(tp, 0xF950, 0x77E0); - rtl8168_mac_ocp_write(tp, 0xF952, 0x27FE); - rtl8168_mac_ocp_write(tp, 0xF954, 0x1AFA); - rtl8168_mac_ocp_write(tp, 0xF956, 0x4317); - rtl8168_mac_ocp_write(tp, 0xF958, 0xC705); - rtl8168_mac_ocp_write(tp, 0xF95A, 0x9AE2); - rtl8168_mac_ocp_write(tp, 0xF95C, 0x1A11); - rtl8168_mac_ocp_write(tp, 0xF95E, 0x8AE0); - rtl8168_mac_ocp_write(tp, 0xF960, 0xE008); - rtl8168_mac_ocp_write(tp, 0xF962, 0xE41C); - rtl8168_mac_ocp_write(tp, 0xF964, 0xC0AE); - rtl8168_mac_ocp_write(tp, 0xF966, 0xD23A); - rtl8168_mac_ocp_write(tp, 0xF968, 0xC7A2); - rtl8168_mac_ocp_write(tp, 0xF96A, 0x74E6); - rtl8168_mac_ocp_write(tp, 0xF96C, 0x484F); - rtl8168_mac_ocp_write(tp, 0xF96E, 0x94E7); - rtl8168_mac_ocp_write(tp, 0xF970, 0xC79E); - rtl8168_mac_ocp_write(tp, 0xF972, 0x8CE6); - rtl8168_mac_ocp_write(tp, 0xF974, 0x8BEC); - rtl8168_mac_ocp_write(tp, 0xF976, 0xC29C); - rtl8168_mac_ocp_write(tp, 0xF978, 0x8D42); - rtl8168_mac_ocp_write(tp, 0xF97A, 0x7220); - rtl8168_mac_ocp_write(tp, 0xF97C, 0xB000); - rtl8168_mac_ocp_write(tp, 0xF97E, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF980, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF982, 0x0932); - rtl8168_mac_ocp_write(tp, 0xF984, 0xB400); - rtl8168_mac_ocp_write(tp, 0xF986, 0xC240); - rtl8168_mac_ocp_write(tp, 0xF988, 0xC340); - rtl8168_mac_ocp_write(tp, 0xF98A, 0x7060); - rtl8168_mac_ocp_write(tp, 0xF98C, 0x498F); - rtl8168_mac_ocp_write(tp, 0xF98E, 0xF014); - rtl8168_mac_ocp_write(tp, 0xF990, 0x488F); - rtl8168_mac_ocp_write(tp, 0xF992, 0x9061); - rtl8168_mac_ocp_write(tp, 0xF994, 0x744C); - rtl8168_mac_ocp_write(tp, 0xF996, 0x49C3); - rtl8168_mac_ocp_write(tp, 0xF998, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF99A, 0x7562); - rtl8168_mac_ocp_write(tp, 0xF99C, 0x485E); - rtl8168_mac_ocp_write(tp, 0xF99E, 0x9563); - rtl8168_mac_ocp_write(tp, 0xF9A0, 0x7446); - rtl8168_mac_ocp_write(tp, 0xF9A2, 0x49C3); - rtl8168_mac_ocp_write(tp, 0xF9A4, 0xF106); - rtl8168_mac_ocp_write(tp, 0xF9A6, 0x7562); - rtl8168_mac_ocp_write(tp, 0xF9A8, 0x1C30); - rtl8168_mac_ocp_write(tp, 0xF9AA, 0x46E5); - rtl8168_mac_ocp_write(tp, 0xF9AC, 0x1200); - rtl8168_mac_ocp_write(tp, 0xF9AE, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF9B0, 0x7446); - rtl8168_mac_ocp_write(tp, 0xF9B2, 0x484F); - rtl8168_mac_ocp_write(tp, 0xF9B4, 0x9447); - rtl8168_mac_ocp_write(tp, 0xF9B6, 0xC32A); - rtl8168_mac_ocp_write(tp, 0xF9B8, 0x7466); - rtl8168_mac_ocp_write(tp, 0xF9BA, 0x49C0); - rtl8168_mac_ocp_write(tp, 0xF9BC, 0xF00F); - rtl8168_mac_ocp_write(tp, 0xF9BE, 0x48C0); - rtl8168_mac_ocp_write(tp, 0xF9C0, 0x9C66); - rtl8168_mac_ocp_write(tp, 0xF9C2, 0x7446); - rtl8168_mac_ocp_write(tp, 0xF9C4, 0x4840); - rtl8168_mac_ocp_write(tp, 0xF9C6, 0x4841); - rtl8168_mac_ocp_write(tp, 0xF9C8, 0x4842); - rtl8168_mac_ocp_write(tp, 0xF9CA, 0x9C46); - rtl8168_mac_ocp_write(tp, 0xF9CC, 0x744C); - rtl8168_mac_ocp_write(tp, 0xF9CE, 0x4840); - rtl8168_mac_ocp_write(tp, 0xF9D0, 0x9C4C); - rtl8168_mac_ocp_write(tp, 0xF9D2, 0x744A); - rtl8168_mac_ocp_write(tp, 0xF9D4, 0x484A); - rtl8168_mac_ocp_write(tp, 0xF9D6, 0x9C4A); - rtl8168_mac_ocp_write(tp, 0xF9D8, 0xE013); - rtl8168_mac_ocp_write(tp, 0xF9DA, 0x498E); - rtl8168_mac_ocp_write(tp, 0xF9DC, 0xF011); - rtl8168_mac_ocp_write(tp, 0xF9DE, 0x488E); - rtl8168_mac_ocp_write(tp, 0xF9E0, 0x9061); - rtl8168_mac_ocp_write(tp, 0xF9E2, 0x744C); - rtl8168_mac_ocp_write(tp, 0xF9E4, 0x49C3); - rtl8168_mac_ocp_write(tp, 0xF9E6, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF9E8, 0x7446); - rtl8168_mac_ocp_write(tp, 0xF9EA, 0x484E); - rtl8168_mac_ocp_write(tp, 0xF9EC, 0x9447); - rtl8168_mac_ocp_write(tp, 0xF9EE, 0x7446); - rtl8168_mac_ocp_write(tp, 0xF9F0, 0x1D38); - rtl8168_mac_ocp_write(tp, 0xF9F2, 0x46EC); - rtl8168_mac_ocp_write(tp, 0xF9F4, 0x1500); - rtl8168_mac_ocp_write(tp, 0xF9F6, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF9F8, 0x7446); - rtl8168_mac_ocp_write(tp, 0xF9FA, 0x484F); - rtl8168_mac_ocp_write(tp, 0xF9FC, 0x9447); - rtl8168_mac_ocp_write(tp, 0xF9FE, 0xB000); - rtl8168_mac_ocp_write(tp, 0xFA00, 0xC502); - rtl8168_mac_ocp_write(tp, 0xFA02, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xFA04, 0x074C); - rtl8168_mac_ocp_write(tp, 0xFA06, 0xE000); - rtl8168_mac_ocp_write(tp, 0xFA08, 0xE0FC); - rtl8168_mac_ocp_write(tp, 0xFA0A, 0xE0C0); - rtl8168_mac_ocp_write(tp, 0xFA0C, 0x4830); - rtl8168_mac_ocp_write(tp, 0xFA0E, 0x4837); - rtl8168_mac_ocp_write(tp, 0xFA10, 0xC502); - rtl8168_mac_ocp_write(tp, 0xFA12, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xFA14, 0x0978); - rtl8168_mac_ocp_write(tp, 0xFA16, 0x63E2); - rtl8168_mac_ocp_write(tp, 0xFA18, 0x4830); - rtl8168_mac_ocp_write(tp, 0xFA1A, 0x4837); - rtl8168_mac_ocp_write(tp, 0xFA1C, 0xC502); - rtl8168_mac_ocp_write(tp, 0xFA1E, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xFA20, 0x09FE); - rtl8168_mac_ocp_write(tp, 0xFA22, 0x73E2); - rtl8168_mac_ocp_write(tp, 0xFA24, 0x4830); - rtl8168_mac_ocp_write(tp, 0xFA26, 0x8BE2); - rtl8168_mac_ocp_write(tp, 0xFA28, 0xC302); - rtl8168_mac_ocp_write(tp, 0xFA2A, 0xBB00); - rtl8168_mac_ocp_write(tp, 0xFA2C, 0x0A12); - rtl8168_mac_ocp_write(tp, 0xFA2E, 0x73E2); - rtl8168_mac_ocp_write(tp, 0xFA30, 0x48B0); - rtl8168_mac_ocp_write(tp, 0xFA32, 0x48B3); - rtl8168_mac_ocp_write(tp, 0xFA34, 0x48B4); - rtl8168_mac_ocp_write(tp, 0xFA36, 0x48B5); - rtl8168_mac_ocp_write(tp, 0xFA38, 0x48B6); - rtl8168_mac_ocp_write(tp, 0xFA3A, 0x48B7); - rtl8168_mac_ocp_write(tp, 0xFA3C, 0x8BE2); - rtl8168_mac_ocp_write(tp, 0xFA3E, 0xC302); - rtl8168_mac_ocp_write(tp, 0xFA40, 0xBB00); - rtl8168_mac_ocp_write(tp, 0xFA42, 0x0A5A); - rtl8168_mac_ocp_write(tp, 0xFA44, 0x73E2); - rtl8168_mac_ocp_write(tp, 0xFA46, 0x4830); - rtl8168_mac_ocp_write(tp, 0xFA48, 0x8BE2); - rtl8168_mac_ocp_write(tp, 0xFA4A, 0xC302); - rtl8168_mac_ocp_write(tp, 0xFA4C, 0xBB00); - rtl8168_mac_ocp_write(tp, 0xFA4E, 0x0A6C); - rtl8168_mac_ocp_write(tp, 0xFA50, 0x73E2); - rtl8168_mac_ocp_write(tp, 0xFA52, 0x4830); - rtl8168_mac_ocp_write(tp, 0xFA54, 0x4837); - rtl8168_mac_ocp_write(tp, 0xFA56, 0xC502); - rtl8168_mac_ocp_write(tp, 0xFA58, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xFA5A, 0x0A86); + if(tp->HwPkgDet == 0x00 || tp->HwPkgDet == 0x0F) { + static const u16 mcu_patch_code_8168fp_1_1 = { + 0xE00A, 0xE0C1, 0xE104, 0xE108, 0xE10D, 0xE112, 0xE11C, 0xE121, 0xE000, + 0xE0C8, 0xB400, 0xC1FE, 0x49E2, 0xF04C, 0x49EA, 0xF04A, 0x74E6, 0xC246, + 0x7542, 0x73EC, 0x1800, 0x49C0, 0xF10D, 0x49C1, 0xF10B, 0x49C2, 0xF109, + 0x49B0, 0xF107, 0x49B1, 0xF105, 0x7220, 0x49A2, 0xF102, 0xE002, 0x4800, + 0x49D0, 0xF10A, 0x49D1, 0xF108, 0x49D2, 0xF106, 0x49D3, 0xF104, 0x49DF, + 0xF102, 0xE00C, 0x4801, 0x72E4, 0x49AD, 0xF108, 0xC225, 0x6741, 0x48F0, + 0x8F41, 0x4870, 0x8F41, 0xC7CF, 0x49B5, 0xF01F, 0x49B2, 0xF00B, 0x4980, + 0xF003, 0x484E, 0x94E7, 0x4981, 0xF004, 0x485E, 0xC212, 0x9543, 0xE071, + 0x49B6, 0xF003, 0x49B3, 0xF10F, 0x4980, 0xF003, 0x484E, 0x94E7, 0x4981, + 0xF004, 0x485E, 0xC204, 0x9543, 0xE005, 0xE000, 0xE0FC, 0xE0FA, 0xE065, + 0x49B7, 0xF007, 0x4980, 0xF005, 0x1A38, 0x46D4, 0x1200, 0xF109, 0x4981, + 0xF055, 0x49C3, 0xF105, 0x1A30, 0x46D5, 0x1200, 0xF04F, 0x7220, 0x49A2, + 0xF130, 0x49C1, 0xF12E, 0x49B0, 0xF12C, 0xC2E6, 0x7240, 0x49A8, 0xF003, + 0x49D0, 0xF126, 0x49A9, 0xF003, 0x49D1, 0xF122, 0x49AA, 0xF003, 0x49D2, + 0xF11E, 0x49AB, 0xF003, 0x49DF, 0xF11A, 0x49AC, 0xF003, 0x49D3, 0xF116, + 0x4980, 0xF003, 0x49C7, 0xF105, 0x4981, 0xF02C, 0x49D7, 0xF02A, 0x49C0, + 0xF00C, 0xC721, 0x62F4, 0x49A0, 0xF008, 0x49A4, 0xF106, 0x4824, 0x8AF4, + 0xC71A, 0x1A40, 0x9AE0, 0x49B6, 0xF017, 0x200E, 0xC7B8, 0x72E0, 0x4710, + 0x92E1, 0xC70E, 0x77E0, 0x49F0, 0xF112, 0xC70B, 0x77E0, 0x27FE, 0x1AFA, + 0x4317, 0xC705, 0x9AE2, 0x1A11, 0x8AE0, 0xE008, 0xE41C, 0xC0AE, 0xD23A, + 0xC7A2, 0x74E6, 0x484F, 0x94E7, 0xC79E, 0x8CE6, 0x8BEC, 0xC29C, 0x8D42, + 0x7220, 0xB000, 0xC502, 0xBD00, 0x0932, 0xB400, 0xC240, 0xC340, 0x7060, + 0x498F, 0xF014, 0x488F, 0x9061, 0x744C, 0x49C3, 0xF004, 0x7562, 0x485E, + 0x9563, 0x7446, 0x49C3, 0xF106, 0x7562, 0x1C30, 0x46E5, 0x1200, 0xF004, + 0x7446, 0x484F, 0x9447, 0xC32A, 0x7466, 0x49C0, 0xF00F, 0x48C0, 0x9C66, + 0x7446, 0x4840, 0x4841, 0x4842, 0x9C46, 0x744C, 0x4840, 0x9C4C, 0x744A, + 0x484A, 0x9C4A, 0xE013, 0x498E, 0xF011, 0x488E, 0x9061, 0x744C, 0x49C3, + 0xF004, 0x7446, 0x484E, 0x9447, 0x7446, 0x1D38, 0x46EC, 0x1500, 0xF004, + 0x7446, 0x484F, 0x9447, 0xB000, 0xC502, 0xBD00, 0x074C, 0xE000, 0xE0FC, + 0xE0C0, 0x4830, 0x4837, 0xC502, 0xBD00, 0x0978, 0x63E2, 0x4830, 0x4837, + 0xC502, 0xBD00, 0x09FE, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A12, + 0x73E2, 0x48B0, 0x48B3, 0x48B4, 0x48B5, 0x48B6, 0x48B7, 0x8BE2, 0xC302, + 0xBB00, 0x0A5A, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A6C, 0x73E2, + 0x4830, 0x4837, 0xC502, 0xBD00, 0x0A86 + }; + + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_1); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_1i); + } + + rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); + + rtl8168_mac_ocp_write(tp, 0xFC28, 0x0890); + rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0712); + rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0974); + rtl8168_mac_ocp_write(tp, 0xFC2E, 0x09FC); + rtl8168_mac_ocp_write(tp, 0xFC30, 0x0A0E); + rtl8168_mac_ocp_write(tp, 0xFC32, 0x0A56); + rtl8168_mac_ocp_write(tp, 0xFC34, 0x0A68); + rtl8168_mac_ocp_write(tp, 0xFC36, 0x0A84); + + } else if (tp->HwPkgDet == 0x6) { + static const u16 mcu_patch_code_8168fp_1_2 = { + 0xE008, 0xE00A, 0xE031, 0xE033, 0xE035, 0xE144, 0xE166, 0xE168, 0xC502, + 0xBD00, 0x0000, 0xC725, 0x75E0, 0x48D0, 0x9DE0, 0xC722, 0x75E0, 0x1C78, + 0x416C, 0x1530, 0xF111, 0xC71D, 0x75F6, 0x49D1, 0xF00D, 0x75E0, 0x1C1F, + 0x416C, 0x1502, 0xF108, 0x75FA, 0x49D3, 0xF005, 0x75EC, 0x9DE4, 0x4853, + 0x9DFA, 0xC70B, 0x75E0, 0x4852, 0x4850, 0x9DE0, 0xC602, 0xBE00, 0x04B8, + 0xE420, 0xE000, 0xE0FC, 0xE43C, 0xDC00, 0xEB00, 0xC202, 0xBA00, 0x0000, + 0xC002, 0xB800, 0x0000, 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xB406, + 0xC44D, 0xC54D, 0x1867, 0xE8A2, 0x2318, 0x276E, 0x1601, 0xF106, 0x1A07, + 0xE861, 0xE86B, 0xE873, 0xE037, 0x231E, 0x276E, 0x1602, 0xF10B, 0x1A07, + 0xE858, 0xE862, 0xC247, 0xC344, 0xE8E3, 0xC73B, 0x66E0, 0xE8B5, 0xE029, + 0x231A, 0x276C, 0xC733, 0x9EE0, 0x1866, 0xE885, 0x251C, 0x120F, 0xF011, + 0x1209, 0xF011, 0x2014, 0x240E, 0x1000, 0xF007, 0x120C, 0xF00D, 0x1203, + 0xF00D, 0x1200, 0xF00D, 0x120C, 0xF00D, 0x1203, 0xF00D, 0x1A03, 0xE00C, + 0x1A07, 0xE00A, 0x1A00, 0xE008, 0x1A01, 0xE006, 0x1A02, 0xE004, 0x1A04, + 0xE002, 0x1A05, 0xE829, 0xE833, 0xB006, 0xB005, 0xB004, 0xB003, 0xB002, + 0xB001, 0x60C4, 0xC702, 0xBF00, 0x2786, 0xDD00, 0xD030, 0xE0C4, 0xE0F8, + 0xDC42, 0xD3F0, 0x0000, 0x0004, 0x0007, 0x0014, 0x0090, 0x1000, 0x0F00, + 0x1004, 0x1008, 0x3000, 0x3004, 0x3008, 0x4000, 0x7777, 0x8000, 0x8001, + 0x8008, 0x8003, 0x8004, 0xC000, 0xC004, 0xF004, 0xFFFF, 0xB406, 0xB407, + 0xC6E5, 0x77C0, 0x27F3, 0x23F3, 0x47FA, 0x9FC0, 0xB007, 0xB006, 0xFF80, + 0xB405, 0xB407, 0xC7D8, 0x75E0, 0x48D0, 0x9DE0, 0xB007, 0xB005, 0xFF80, + 0xB401, 0xC0EA, 0xC2DC, 0xC3D8, 0xE865, 0xC0D3, 0xC1E0, 0xC2E3, 0xE861, + 0xE817, 0xC0CD, 0xC2CF, 0xE85D, 0xC0C9, 0xC1D6, 0xC2DB, 0xE859, 0xE80F, + 0xC1C7, 0xC2CE, 0xE855, 0xC0C0, 0xC1D1, 0xC2D3, 0xE851, 0xE807, 0xC0BE, + 0xC2C2, 0xE84D, 0xE803, 0xB001, 0xFF80, 0xB402, 0xC2C6, 0xE859, 0x499F, + 0xF1FE, 0xB002, 0xFF80, 0xB402, 0xB403, 0xB407, 0xE821, 0x8882, 0x1980, + 0x8983, 0xE81D, 0x7180, 0x218B, 0x25BB, 0x1310, 0xF014, 0x1310, 0xFB03, + 0x1F20, 0x38FB, 0x3288, 0x434B, 0x2491, 0x430B, 0x1F0F, 0x38FB, 0x4313, + 0x2121, 0x4353, 0x2521, 0x418A, 0x6282, 0x2527, 0x212F, 0x418A, 0xB007, + 0xB003, 0xB002, 0xFF80, 0x6183, 0x2496, 0x1100, 0xF1FD, 0xFF80, 0x4800, + 0x4801, 0xC213, 0xC313, 0xE815, 0x4860, 0x8EE0, 0xC210, 0xC310, 0xE822, + 0x481E, 0xC20C, 0xC30C, 0xE80C, 0xC206, 0x7358, 0x483A, 0x9B58, 0xFF80, + 0xE8E0, 0xE000, 0x1008, 0x0F00, 0x800C, 0x0F00, 0xB407, 0xB406, 0xB403, + 0xC7F7, 0x98E0, 0x99E2, 0x9AE4, 0x21B2, 0x4831, 0x483F, 0x9BE6, 0x66E7, + 0x49E6, 0xF1FE, 0xB003, 0xB006, 0xB007, 0xFF80, 0xB407, 0xB406, 0xB403, + 0xC7E5, 0x9AE4, 0x21B2, 0x4831, 0x9BE6, 0x66E7, 0x49E6, 0xF1FE, 0x70E0, + 0x71E2, 0xB003, 0xB006, 0xB007, 0xFF80, 0x4882, 0xB406, 0xB405, 0xC71E, + 0x76E0, 0x1D78, 0x4175, 0x1630, 0xF10C, 0xC715, 0x76E0, 0x4861, 0x9EE0, + 0xC713, 0x1EFF, 0x9EE2, 0x75E0, 0x4850, 0x9DE0, 0xE005, 0xC70B, 0x76E0, + 0x4865, 0x9EE0, 0xB005, 0xB006, 0xC708, 0xC102, 0xB900, 0x279E, 0xEB16, + 0xEB00, 0xE43C, 0xDC00, 0xD3EC, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, + 0x0000 + }; - rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_2); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_2i); + } + + rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); - rtl8168_mac_ocp_write(tp, 0xFC28, 0x0890); - rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0712); - rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0974); - rtl8168_mac_ocp_write(tp, 0xFC2E, 0x09FC); - rtl8168_mac_ocp_write(tp, 0xFC30, 0x0A0E); - rtl8168_mac_ocp_write(tp, 0xFC32, 0x0A56); - rtl8168_mac_ocp_write(tp, 0xFC34, 0x0A68); - rtl8168_mac_ocp_write(tp, 0xFC36, 0x0A84); - - if (tp->HwPkgDet == 0x0) - rtl8168_mac_ocp_write(tp, 0xFC38, 0x00FC); - else if(tp->HwPkgDet == 0xF) - rtl8168_mac_ocp_write(tp, 0xFC38, 0x00FF); + rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000); + rtl8168_mac_ocp_write(tp, 0xFC2A, 0x04b4); + rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000); + rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000); + rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000); + rtl8168_mac_ocp_write(tp, 0xFC32, 0x279C); + rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000); + rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000); + } + + if (tp->HwPkgDet == 0x00) + breakPointEnabled = 0x00FC; + else if (tp->HwPkgDet == 0x0F) + breakPointEnabled = 0x00FF; + else if (tp->HwPkgDet == 0x06) + breakPointEnabled = 0x0022; + + rtl8168_mac_ocp_write(tp, 0xFC38, breakPointEnabled); } static void -rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev) +rtl8168_set_mac_mcu_8168fp_8116as_2(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8168fp_8116as_2 = { + 0xE008, 0xE00A, 0xE00F, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE01C, 0xC602, + 0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0, + 0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0000 + }; rtl8168_hw_disable_mac_mcu_bps(dev); - rtl8168_mac_ocp_write(tp, 0xF800, 0xE008); - rtl8168_mac_ocp_write(tp, 0xF802, 0xE00A); - rtl8168_mac_ocp_write(tp, 0xF804, 0xE031); - rtl8168_mac_ocp_write(tp, 0xF806, 0xE033); - rtl8168_mac_ocp_write(tp, 0xF808, 0xE035); - rtl8168_mac_ocp_write(tp, 0xF80A, 0xE144); - rtl8168_mac_ocp_write(tp, 0xF80C, 0xE166); - rtl8168_mac_ocp_write(tp, 0xF80E, 0xE168); - rtl8168_mac_ocp_write(tp, 0xF810, 0xC502); - rtl8168_mac_ocp_write(tp, 0xF812, 0xBD00); - rtl8168_mac_ocp_write(tp, 0xF814, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF816, 0xC725); - rtl8168_mac_ocp_write(tp, 0xF818, 0x75E0); - rtl8168_mac_ocp_write(tp, 0xF81A, 0x48D0); - rtl8168_mac_ocp_write(tp, 0xF81C, 0x9DE0); - rtl8168_mac_ocp_write(tp, 0xF81E, 0xC722); - rtl8168_mac_ocp_write(tp, 0xF820, 0x75E0); - rtl8168_mac_ocp_write(tp, 0xF822, 0x1C78); - rtl8168_mac_ocp_write(tp, 0xF824, 0x416C); - rtl8168_mac_ocp_write(tp, 0xF826, 0x1530); - rtl8168_mac_ocp_write(tp, 0xF828, 0xF111); - rtl8168_mac_ocp_write(tp, 0xF82A, 0xC71D); - rtl8168_mac_ocp_write(tp, 0xF82C, 0x75F6); - rtl8168_mac_ocp_write(tp, 0xF82E, 0x49D1); - rtl8168_mac_ocp_write(tp, 0xF830, 0xF00D); - rtl8168_mac_ocp_write(tp, 0xF832, 0x75E0); - rtl8168_mac_ocp_write(tp, 0xF834, 0x1C1F); - rtl8168_mac_ocp_write(tp, 0xF836, 0x416C); - rtl8168_mac_ocp_write(tp, 0xF838, 0x1502); - rtl8168_mac_ocp_write(tp, 0xF83A, 0xF108); - rtl8168_mac_ocp_write(tp, 0xF83C, 0x75FA); - rtl8168_mac_ocp_write(tp, 0xF83E, 0x49D3); - rtl8168_mac_ocp_write(tp, 0xF840, 0xF005); - rtl8168_mac_ocp_write(tp, 0xF842, 0x75EC); - rtl8168_mac_ocp_write(tp, 0xF844, 0x9DE4); - rtl8168_mac_ocp_write(tp, 0xF846, 0x4853); - rtl8168_mac_ocp_write(tp, 0xF848, 0x9DFA); - rtl8168_mac_ocp_write(tp, 0xF84A, 0xC70B); - rtl8168_mac_ocp_write(tp, 0xF84C, 0x75E0); - rtl8168_mac_ocp_write(tp, 0xF84E, 0x4852); - rtl8168_mac_ocp_write(tp, 0xF850, 0x4850); - rtl8168_mac_ocp_write(tp, 0xF852, 0x9DE0); - rtl8168_mac_ocp_write(tp, 0xF854, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF856, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF858, 0x04B8); - rtl8168_mac_ocp_write(tp, 0xF85A, 0xE420); - rtl8168_mac_ocp_write(tp, 0xF85C, 0xE000); - rtl8168_mac_ocp_write(tp, 0xF85E, 0xE0FC); - rtl8168_mac_ocp_write(tp, 0xF860, 0xE43C); - rtl8168_mac_ocp_write(tp, 0xF862, 0xDC00); - rtl8168_mac_ocp_write(tp, 0xF864, 0xEB00); - rtl8168_mac_ocp_write(tp, 0xF866, 0xC202); - rtl8168_mac_ocp_write(tp, 0xF868, 0xBA00); - rtl8168_mac_ocp_write(tp, 0xF86A, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF86C, 0xC002); - rtl8168_mac_ocp_write(tp, 0xF86E, 0xB800); - rtl8168_mac_ocp_write(tp, 0xF870, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF872, 0xB401); - rtl8168_mac_ocp_write(tp, 0xF874, 0xB402); - rtl8168_mac_ocp_write(tp, 0xF876, 0xB403); - rtl8168_mac_ocp_write(tp, 0xF878, 0xB404); - rtl8168_mac_ocp_write(tp, 0xF87A, 0xB405); - rtl8168_mac_ocp_write(tp, 0xF87C, 0xB406); - rtl8168_mac_ocp_write(tp, 0xF87E, 0xC44D); - rtl8168_mac_ocp_write(tp, 0xF880, 0xC54D); - rtl8168_mac_ocp_write(tp, 0xF882, 0x1867); - rtl8168_mac_ocp_write(tp, 0xF884, 0xE8A2); - rtl8168_mac_ocp_write(tp, 0xF886, 0x2318); - rtl8168_mac_ocp_write(tp, 0xF888, 0x276E); - rtl8168_mac_ocp_write(tp, 0xF88A, 0x1601); - rtl8168_mac_ocp_write(tp, 0xF88C, 0xF106); - rtl8168_mac_ocp_write(tp, 0xF88E, 0x1A07); - rtl8168_mac_ocp_write(tp, 0xF890, 0xE861); - rtl8168_mac_ocp_write(tp, 0xF892, 0xE86B); - rtl8168_mac_ocp_write(tp, 0xF894, 0xE873); - rtl8168_mac_ocp_write(tp, 0xF896, 0xE037); - rtl8168_mac_ocp_write(tp, 0xF898, 0x231E); - rtl8168_mac_ocp_write(tp, 0xF89A, 0x276E); - rtl8168_mac_ocp_write(tp, 0xF89C, 0x1602); - rtl8168_mac_ocp_write(tp, 0xF89E, 0xF10B); - rtl8168_mac_ocp_write(tp, 0xF8A0, 0x1A07); - rtl8168_mac_ocp_write(tp, 0xF8A2, 0xE858); - rtl8168_mac_ocp_write(tp, 0xF8A4, 0xE862); - rtl8168_mac_ocp_write(tp, 0xF8A6, 0xC247); - rtl8168_mac_ocp_write(tp, 0xF8A8, 0xC344); - rtl8168_mac_ocp_write(tp, 0xF8AA, 0xE8E3); - rtl8168_mac_ocp_write(tp, 0xF8AC, 0xC73B); - rtl8168_mac_ocp_write(tp, 0xF8AE, 0x66E0); - rtl8168_mac_ocp_write(tp, 0xF8B0, 0xE8B5); - rtl8168_mac_ocp_write(tp, 0xF8B2, 0xE029); - rtl8168_mac_ocp_write(tp, 0xF8B4, 0x231A); - rtl8168_mac_ocp_write(tp, 0xF8B6, 0x276C); - rtl8168_mac_ocp_write(tp, 0xF8B8, 0xC733); - rtl8168_mac_ocp_write(tp, 0xF8BA, 0x9EE0); - rtl8168_mac_ocp_write(tp, 0xF8BC, 0x1866); - rtl8168_mac_ocp_write(tp, 0xF8BE, 0xE885); - rtl8168_mac_ocp_write(tp, 0xF8C0, 0x251C); - rtl8168_mac_ocp_write(tp, 0xF8C2, 0x120F); - rtl8168_mac_ocp_write(tp, 0xF8C4, 0xF011); - rtl8168_mac_ocp_write(tp, 0xF8C6, 0x1209); - rtl8168_mac_ocp_write(tp, 0xF8C8, 0xF011); - rtl8168_mac_ocp_write(tp, 0xF8CA, 0x2014); - rtl8168_mac_ocp_write(tp, 0xF8CC, 0x240E); - rtl8168_mac_ocp_write(tp, 0xF8CE, 0x1000); - rtl8168_mac_ocp_write(tp, 0xF8D0, 0xF007); - rtl8168_mac_ocp_write(tp, 0xF8D2, 0x120C); - rtl8168_mac_ocp_write(tp, 0xF8D4, 0xF00D); - rtl8168_mac_ocp_write(tp, 0xF8D6, 0x1203); - rtl8168_mac_ocp_write(tp, 0xF8D8, 0xF00D); - rtl8168_mac_ocp_write(tp, 0xF8DA, 0x1200); - rtl8168_mac_ocp_write(tp, 0xF8DC, 0xF00D); - rtl8168_mac_ocp_write(tp, 0xF8DE, 0x120C); - rtl8168_mac_ocp_write(tp, 0xF8E0, 0xF00D); - rtl8168_mac_ocp_write(tp, 0xF8E2, 0x1203); - rtl8168_mac_ocp_write(tp, 0xF8E4, 0xF00D); - rtl8168_mac_ocp_write(tp, 0xF8E6, 0x1A03); - rtl8168_mac_ocp_write(tp, 0xF8E8, 0xE00C); - rtl8168_mac_ocp_write(tp, 0xF8EA, 0x1A07); - rtl8168_mac_ocp_write(tp, 0xF8EC, 0xE00A); - rtl8168_mac_ocp_write(tp, 0xF8EE, 0x1A00); - rtl8168_mac_ocp_write(tp, 0xF8F0, 0xE008); - rtl8168_mac_ocp_write(tp, 0xF8F2, 0x1A01); - rtl8168_mac_ocp_write(tp, 0xF8F4, 0xE006); - rtl8168_mac_ocp_write(tp, 0xF8F6, 0x1A02); - rtl8168_mac_ocp_write(tp, 0xF8F8, 0xE004); - rtl8168_mac_ocp_write(tp, 0xF8FA, 0x1A04); - rtl8168_mac_ocp_write(tp, 0xF8FC, 0xE002); - rtl8168_mac_ocp_write(tp, 0xF8FE, 0x1A05); - rtl8168_mac_ocp_write(tp, 0xF900, 0xE829); - rtl8168_mac_ocp_write(tp, 0xF902, 0xE833); - rtl8168_mac_ocp_write(tp, 0xF904, 0xB006); - rtl8168_mac_ocp_write(tp, 0xF906, 0xB005); - rtl8168_mac_ocp_write(tp, 0xF908, 0xB004); - rtl8168_mac_ocp_write(tp, 0xF90A, 0xB003); - rtl8168_mac_ocp_write(tp, 0xF90C, 0xB002); - rtl8168_mac_ocp_write(tp, 0xF90E, 0xB001); - rtl8168_mac_ocp_write(tp, 0xF910, 0x60C4); - rtl8168_mac_ocp_write(tp, 0xF912, 0xC702); - rtl8168_mac_ocp_write(tp, 0xF914, 0xBF00); - rtl8168_mac_ocp_write(tp, 0xF916, 0x2786); - rtl8168_mac_ocp_write(tp, 0xF918, 0xDD00); - rtl8168_mac_ocp_write(tp, 0xF91A, 0xD030); - rtl8168_mac_ocp_write(tp, 0xF91C, 0xE0C4); - rtl8168_mac_ocp_write(tp, 0xF91E, 0xE0F8); - rtl8168_mac_ocp_write(tp, 0xF920, 0xDC42); - rtl8168_mac_ocp_write(tp, 0xF922, 0xD3F0); - rtl8168_mac_ocp_write(tp, 0xF924, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF926, 0x0004); - rtl8168_mac_ocp_write(tp, 0xF928, 0x0007); - rtl8168_mac_ocp_write(tp, 0xF92A, 0x0014); - rtl8168_mac_ocp_write(tp, 0xF92C, 0x0090); - rtl8168_mac_ocp_write(tp, 0xF92E, 0x1000); - rtl8168_mac_ocp_write(tp, 0xF930, 0x0F00); - rtl8168_mac_ocp_write(tp, 0xF932, 0x1004); - rtl8168_mac_ocp_write(tp, 0xF934, 0x1008); - rtl8168_mac_ocp_write(tp, 0xF936, 0x3000); - rtl8168_mac_ocp_write(tp, 0xF938, 0x3004); - rtl8168_mac_ocp_write(tp, 0xF93A, 0x3008); - rtl8168_mac_ocp_write(tp, 0xF93C, 0x4000); - rtl8168_mac_ocp_write(tp, 0xF93E, 0x7777); - rtl8168_mac_ocp_write(tp, 0xF940, 0x8000); - rtl8168_mac_ocp_write(tp, 0xF942, 0x8001); - rtl8168_mac_ocp_write(tp, 0xF944, 0x8008); - rtl8168_mac_ocp_write(tp, 0xF946, 0x8003); - rtl8168_mac_ocp_write(tp, 0xF948, 0x8004); - rtl8168_mac_ocp_write(tp, 0xF94A, 0xC000); - rtl8168_mac_ocp_write(tp, 0xF94C, 0xC004); - rtl8168_mac_ocp_write(tp, 0xF94E, 0xF004); - rtl8168_mac_ocp_write(tp, 0xF950, 0xFFFF); - rtl8168_mac_ocp_write(tp, 0xF952, 0xB406); - rtl8168_mac_ocp_write(tp, 0xF954, 0xB407); - rtl8168_mac_ocp_write(tp, 0xF956, 0xC6E5); - rtl8168_mac_ocp_write(tp, 0xF958, 0x77C0); - rtl8168_mac_ocp_write(tp, 0xF95A, 0x27F3); - rtl8168_mac_ocp_write(tp, 0xF95C, 0x23F3); - rtl8168_mac_ocp_write(tp, 0xF95E, 0x47FA); - rtl8168_mac_ocp_write(tp, 0xF960, 0x9FC0); - rtl8168_mac_ocp_write(tp, 0xF962, 0xB007); - rtl8168_mac_ocp_write(tp, 0xF964, 0xB006); - rtl8168_mac_ocp_write(tp, 0xF966, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xF968, 0xB405); - rtl8168_mac_ocp_write(tp, 0xF96A, 0xB407); - rtl8168_mac_ocp_write(tp, 0xF96C, 0xC7D8); - rtl8168_mac_ocp_write(tp, 0xF96E, 0x75E0); - rtl8168_mac_ocp_write(tp, 0xF970, 0x48D0); - rtl8168_mac_ocp_write(tp, 0xF972, 0x9DE0); - rtl8168_mac_ocp_write(tp, 0xF974, 0xB007); - rtl8168_mac_ocp_write(tp, 0xF976, 0xB005); - rtl8168_mac_ocp_write(tp, 0xF978, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xF97A, 0xB401); - rtl8168_mac_ocp_write(tp, 0xF97C, 0xC0EA); - rtl8168_mac_ocp_write(tp, 0xF97E, 0xC2DC); - rtl8168_mac_ocp_write(tp, 0xF980, 0xC3D8); - rtl8168_mac_ocp_write(tp, 0xF982, 0xE865); - rtl8168_mac_ocp_write(tp, 0xF984, 0xC0D3); - rtl8168_mac_ocp_write(tp, 0xF986, 0xC1E0); - rtl8168_mac_ocp_write(tp, 0xF988, 0xC2E3); - rtl8168_mac_ocp_write(tp, 0xF98A, 0xE861); - rtl8168_mac_ocp_write(tp, 0xF98C, 0xE817); - rtl8168_mac_ocp_write(tp, 0xF98E, 0xC0CD); - rtl8168_mac_ocp_write(tp, 0xF990, 0xC2CF); - rtl8168_mac_ocp_write(tp, 0xF992, 0xE85D); - rtl8168_mac_ocp_write(tp, 0xF994, 0xC0C9); - rtl8168_mac_ocp_write(tp, 0xF996, 0xC1D6); - rtl8168_mac_ocp_write(tp, 0xF998, 0xC2DB); - rtl8168_mac_ocp_write(tp, 0xF99A, 0xE859); - rtl8168_mac_ocp_write(tp, 0xF99C, 0xE80F); - rtl8168_mac_ocp_write(tp, 0xF99E, 0xC1C7); - rtl8168_mac_ocp_write(tp, 0xF9A0, 0xC2CE); - rtl8168_mac_ocp_write(tp, 0xF9A2, 0xE855); - rtl8168_mac_ocp_write(tp, 0xF9A4, 0xC0C0); - rtl8168_mac_ocp_write(tp, 0xF9A6, 0xC1D1); - rtl8168_mac_ocp_write(tp, 0xF9A8, 0xC2D3); - rtl8168_mac_ocp_write(tp, 0xF9AA, 0xE851); - rtl8168_mac_ocp_write(tp, 0xF9AC, 0xE807); - rtl8168_mac_ocp_write(tp, 0xF9AE, 0xC0BE); - rtl8168_mac_ocp_write(tp, 0xF9B0, 0xC2C2); - rtl8168_mac_ocp_write(tp, 0xF9B2, 0xE84D); - rtl8168_mac_ocp_write(tp, 0xF9B4, 0xE803); - rtl8168_mac_ocp_write(tp, 0xF9B6, 0xB001); - rtl8168_mac_ocp_write(tp, 0xF9B8, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xF9BA, 0xB402); - rtl8168_mac_ocp_write(tp, 0xF9BC, 0xC2C6); - rtl8168_mac_ocp_write(tp, 0xF9BE, 0xE859); - rtl8168_mac_ocp_write(tp, 0xF9C0, 0x499F); - rtl8168_mac_ocp_write(tp, 0xF9C2, 0xF1FE); - rtl8168_mac_ocp_write(tp, 0xF9C4, 0xB002); - rtl8168_mac_ocp_write(tp, 0xF9C6, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xF9C8, 0xB402); - rtl8168_mac_ocp_write(tp, 0xF9CA, 0xB403); - rtl8168_mac_ocp_write(tp, 0xF9CC, 0xB407); - rtl8168_mac_ocp_write(tp, 0xF9CE, 0xE821); - rtl8168_mac_ocp_write(tp, 0xF9D0, 0x8882); - rtl8168_mac_ocp_write(tp, 0xF9D2, 0x1980); - rtl8168_mac_ocp_write(tp, 0xF9D4, 0x8983); - rtl8168_mac_ocp_write(tp, 0xF9D6, 0xE81D); - rtl8168_mac_ocp_write(tp, 0xF9D8, 0x7180); - rtl8168_mac_ocp_write(tp, 0xF9DA, 0x218B); - rtl8168_mac_ocp_write(tp, 0xF9DC, 0x25BB); - rtl8168_mac_ocp_write(tp, 0xF9DE, 0x1310); - rtl8168_mac_ocp_write(tp, 0xF9E0, 0xF014); - rtl8168_mac_ocp_write(tp, 0xF9E2, 0x1310); - rtl8168_mac_ocp_write(tp, 0xF9E4, 0xFB03); - rtl8168_mac_ocp_write(tp, 0xF9E6, 0x1F20); - rtl8168_mac_ocp_write(tp, 0xF9E8, 0x38FB); - rtl8168_mac_ocp_write(tp, 0xF9EA, 0x3288); - rtl8168_mac_ocp_write(tp, 0xF9EC, 0x434B); - rtl8168_mac_ocp_write(tp, 0xF9EE, 0x2491); - rtl8168_mac_ocp_write(tp, 0xF9F0, 0x430B); - rtl8168_mac_ocp_write(tp, 0xF9F2, 0x1F0F); - rtl8168_mac_ocp_write(tp, 0xF9F4, 0x38FB); - rtl8168_mac_ocp_write(tp, 0xF9F6, 0x4313); - rtl8168_mac_ocp_write(tp, 0xF9F8, 0x2121); - rtl8168_mac_ocp_write(tp, 0xF9FA, 0x4353); - rtl8168_mac_ocp_write(tp, 0xF9FC, 0x2521); - rtl8168_mac_ocp_write(tp, 0xF9FE, 0x418A); - rtl8168_mac_ocp_write(tp, 0xFA00, 0x6282); - rtl8168_mac_ocp_write(tp, 0xFA02, 0x2527); - rtl8168_mac_ocp_write(tp, 0xFA04, 0x212F); - rtl8168_mac_ocp_write(tp, 0xFA06, 0x418A); - rtl8168_mac_ocp_write(tp, 0xFA08, 0xB007); - rtl8168_mac_ocp_write(tp, 0xFA0A, 0xB003); - rtl8168_mac_ocp_write(tp, 0xFA0C, 0xB002); - rtl8168_mac_ocp_write(tp, 0xFA0E, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xFA10, 0x6183); - rtl8168_mac_ocp_write(tp, 0xFA12, 0x2496); - rtl8168_mac_ocp_write(tp, 0xFA14, 0x1100); - rtl8168_mac_ocp_write(tp, 0xFA16, 0xF1FD); - rtl8168_mac_ocp_write(tp, 0xFA18, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xFA1A, 0x4800); - rtl8168_mac_ocp_write(tp, 0xFA1C, 0x4801); - rtl8168_mac_ocp_write(tp, 0xFA1E, 0xC213); - rtl8168_mac_ocp_write(tp, 0xFA20, 0xC313); - rtl8168_mac_ocp_write(tp, 0xFA22, 0xE815); - rtl8168_mac_ocp_write(tp, 0xFA24, 0x4860); - rtl8168_mac_ocp_write(tp, 0xFA26, 0x8EE0); - rtl8168_mac_ocp_write(tp, 0xFA28, 0xC210); - rtl8168_mac_ocp_write(tp, 0xFA2A, 0xC310); - rtl8168_mac_ocp_write(tp, 0xFA2C, 0xE822); - rtl8168_mac_ocp_write(tp, 0xFA2E, 0x481E); - rtl8168_mac_ocp_write(tp, 0xFA30, 0xC20C); - rtl8168_mac_ocp_write(tp, 0xFA32, 0xC30C); - rtl8168_mac_ocp_write(tp, 0xFA34, 0xE80C); - rtl8168_mac_ocp_write(tp, 0xFA36, 0xC206); - rtl8168_mac_ocp_write(tp, 0xFA38, 0x7358); - rtl8168_mac_ocp_write(tp, 0xFA3A, 0x483A); - rtl8168_mac_ocp_write(tp, 0xFA3C, 0x9B58); - rtl8168_mac_ocp_write(tp, 0xFA3E, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xFA40, 0xE8E0); - rtl8168_mac_ocp_write(tp, 0xFA42, 0xE000); - rtl8168_mac_ocp_write(tp, 0xFA44, 0x1008); - rtl8168_mac_ocp_write(tp, 0xFA46, 0x0F00); - rtl8168_mac_ocp_write(tp, 0xFA48, 0x800C); - rtl8168_mac_ocp_write(tp, 0xFA4A, 0x0F00); - rtl8168_mac_ocp_write(tp, 0xFA4C, 0xB407); - rtl8168_mac_ocp_write(tp, 0xFA4E, 0xB406); - rtl8168_mac_ocp_write(tp, 0xFA50, 0xB403); - rtl8168_mac_ocp_write(tp, 0xFA52, 0xC7F7); - rtl8168_mac_ocp_write(tp, 0xFA54, 0x98E0); - rtl8168_mac_ocp_write(tp, 0xFA56, 0x99E2); - rtl8168_mac_ocp_write(tp, 0xFA58, 0x9AE4); - rtl8168_mac_ocp_write(tp, 0xFA5A, 0x21B2); - rtl8168_mac_ocp_write(tp, 0xFA5C, 0x4831); - rtl8168_mac_ocp_write(tp, 0xFA5E, 0x483F); - rtl8168_mac_ocp_write(tp, 0xFA60, 0x9BE6); - rtl8168_mac_ocp_write(tp, 0xFA62, 0x66E7); - rtl8168_mac_ocp_write(tp, 0xFA64, 0x49E6); - rtl8168_mac_ocp_write(tp, 0xFA66, 0xF1FE); - rtl8168_mac_ocp_write(tp, 0xFA68, 0xB003); - rtl8168_mac_ocp_write(tp, 0xFA6A, 0xB006); - rtl8168_mac_ocp_write(tp, 0xFA6C, 0xB007); - rtl8168_mac_ocp_write(tp, 0xFA6E, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xFA70, 0xB407); - rtl8168_mac_ocp_write(tp, 0xFA72, 0xB406); - rtl8168_mac_ocp_write(tp, 0xFA74, 0xB403); - rtl8168_mac_ocp_write(tp, 0xFA76, 0xC7E5); - rtl8168_mac_ocp_write(tp, 0xFA78, 0x9AE4); - rtl8168_mac_ocp_write(tp, 0xFA7A, 0x21B2); - rtl8168_mac_ocp_write(tp, 0xFA7C, 0x4831); - rtl8168_mac_ocp_write(tp, 0xFA7E, 0x9BE6); - rtl8168_mac_ocp_write(tp, 0xFA80, 0x66E7); - rtl8168_mac_ocp_write(tp, 0xFA82, 0x49E6); - rtl8168_mac_ocp_write(tp, 0xFA84, 0xF1FE); - rtl8168_mac_ocp_write(tp, 0xFA86, 0x70E0); - rtl8168_mac_ocp_write(tp, 0xFA88, 0x71E2); - rtl8168_mac_ocp_write(tp, 0xFA8A, 0xB003); - rtl8168_mac_ocp_write(tp, 0xFA8C, 0xB006); - rtl8168_mac_ocp_write(tp, 0xFA8E, 0xB007); - rtl8168_mac_ocp_write(tp, 0xFA90, 0xFF80); - rtl8168_mac_ocp_write(tp, 0xFA92, 0x4882); - rtl8168_mac_ocp_write(tp, 0xFA94, 0xB406); - rtl8168_mac_ocp_write(tp, 0xFA96, 0xB405); - rtl8168_mac_ocp_write(tp, 0xFA98, 0xC71E); - rtl8168_mac_ocp_write(tp, 0xFA9A, 0x76E0); - rtl8168_mac_ocp_write(tp, 0xFA9C, 0x1D78); - rtl8168_mac_ocp_write(tp, 0xFA9E, 0x4175); - rtl8168_mac_ocp_write(tp, 0xFAA0, 0x1630); - rtl8168_mac_ocp_write(tp, 0xFAA2, 0xF10C); - rtl8168_mac_ocp_write(tp, 0xFAA4, 0xC715); - rtl8168_mac_ocp_write(tp, 0xFAA6, 0x76E0); - rtl8168_mac_ocp_write(tp, 0xFAA8, 0x4861); - rtl8168_mac_ocp_write(tp, 0xFAAA, 0x9EE0); - rtl8168_mac_ocp_write(tp, 0xFAAC, 0xC713); - rtl8168_mac_ocp_write(tp, 0xFAAE, 0x1EFF); - rtl8168_mac_ocp_write(tp, 0xFAB0, 0x9EE2); - rtl8168_mac_ocp_write(tp, 0xFAB2, 0x75E0); - rtl8168_mac_ocp_write(tp, 0xFAB4, 0x4850); - rtl8168_mac_ocp_write(tp, 0xFAB6, 0x9DE0); - rtl8168_mac_ocp_write(tp, 0xFAB8, 0xE005); - rtl8168_mac_ocp_write(tp, 0xFABA, 0xC70B); - rtl8168_mac_ocp_write(tp, 0xFABC, 0x76E0); - rtl8168_mac_ocp_write(tp, 0xFABE, 0x4865); - rtl8168_mac_ocp_write(tp, 0xFAC0, 0x9EE0); - rtl8168_mac_ocp_write(tp, 0xFAC2, 0xB005); - rtl8168_mac_ocp_write(tp, 0xFAC4, 0xB006); - rtl8168_mac_ocp_write(tp, 0xFAC6, 0xC708); - rtl8168_mac_ocp_write(tp, 0xFAC8, 0xC102); - rtl8168_mac_ocp_write(tp, 0xFACA, 0xB900); - rtl8168_mac_ocp_write(tp, 0xFACC, 0x279E); - rtl8168_mac_ocp_write(tp, 0xFACE, 0xEB16); - rtl8168_mac_ocp_write(tp, 0xFAD0, 0xEB00); - rtl8168_mac_ocp_write(tp, 0xFAD2, 0xE43C); - rtl8168_mac_ocp_write(tp, 0xFAD4, 0xDC00); - rtl8168_mac_ocp_write(tp, 0xFAD6, 0xD3EC); - rtl8168_mac_ocp_write(tp, 0xFAD8, 0xC602); - rtl8168_mac_ocp_write(tp, 0xFADA, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xFADC, 0x0000); - rtl8168_mac_ocp_write(tp, 0xFADE, 0xC602); - rtl8168_mac_ocp_write(tp, 0xFAE0, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xFAE2, 0x0000); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_8116as_2); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_8116as_2i); + } rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); - rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000); - rtl8168_mac_ocp_write(tp, 0xFC2A, 0x04B4); - rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000); - rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000); - rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000); - rtl8168_mac_ocp_write(tp, 0xFC32, 0x279C); - rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000); - rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000); + rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC); + rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14); + rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4); - rtl8168_mac_ocp_write(tp, 0xFC38, 0x0022); + rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007); } static void -rtl8168_set_mac_mcu_8168fp_3(struct net_device *dev) +_rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8168fp_2 = { + 0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE064, 0xE066, 0xE068, 0xC602, + 0xBE00, 0x0000, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0, + 0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403, + 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136, + 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E, + 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330, 0xE80E, 0xE018, 0xC126, + 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326, 0xE805, 0xC521, 0xC324, + 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x9D0A, 0x9A0C, 0x9B0E, + 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001, + 0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2, + 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007, + 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, 0xC602, 0xBE00, 0x0000, + 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000 + }; rtl8168_hw_disable_mac_mcu_bps(dev); - rtl8168_mac_ocp_write(tp, 0xF800, 0xE008); - rtl8168_mac_ocp_write(tp, 0xF802, 0xE00A); - rtl8168_mac_ocp_write(tp, 0xF804, 0xE00F); - rtl8168_mac_ocp_write(tp, 0xF806, 0xE014); - rtl8168_mac_ocp_write(tp, 0xF808, 0xE016); - rtl8168_mac_ocp_write(tp, 0xF80A, 0xE018); - rtl8168_mac_ocp_write(tp, 0xF80C, 0xE01A); - rtl8168_mac_ocp_write(tp, 0xF80E, 0xE01C); - rtl8168_mac_ocp_write(tp, 0xF810, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF812, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF814, 0x2AB2); - rtl8168_mac_ocp_write(tp, 0xF816, 0x1BC0); - rtl8168_mac_ocp_write(tp, 0xF818, 0x46EB); - rtl8168_mac_ocp_write(tp, 0xF81A, 0x1BFE); - rtl8168_mac_ocp_write(tp, 0xF81C, 0xC102); - rtl8168_mac_ocp_write(tp, 0xF81E, 0xB900); - rtl8168_mac_ocp_write(tp, 0xF820, 0x0B1A); - rtl8168_mac_ocp_write(tp, 0xF822, 0x1BC0); - rtl8168_mac_ocp_write(tp, 0xF824, 0x46EB); - rtl8168_mac_ocp_write(tp, 0xF826, 0x1B7E); - rtl8168_mac_ocp_write(tp, 0xF828, 0xC102); - rtl8168_mac_ocp_write(tp, 0xF82A, 0xB900); - rtl8168_mac_ocp_write(tp, 0xF82C, 0x0BEA); - rtl8168_mac_ocp_write(tp, 0xF82E, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF830, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF832, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF834, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF836, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF838, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF83A, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF83C, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF83E, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF840, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF842, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF844, 0x0000); - rtl8168_mac_ocp_write(tp, 0xF846, 0xC602); - rtl8168_mac_ocp_write(tp, 0xF848, 0xBE00); - rtl8168_mac_ocp_write(tp, 0xF84A, 0x0000); + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_2); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_2i); + } rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC); rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14); rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4); + rtl8168_mac_ocp_write(tp, 0xFC2E, 0x2A5C); + //rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0); - if (tp->HwSuppSerDesPhyVer == 1) { - rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007); - } else { + if (true == rtl8168_check_dash_other_fun_present(tp)) rtl8168_mac_ocp_write(tp, 0xFC38, 0x0006); - } + else + rtl8168_mac_ocp_write(tp, 0xFC38, 0x000E); +} + +static void +rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + + if (tp->HwSuppSerDesPhyVer == 1) rtl8168_set_mac_mcu_8168fp_8116as_2(dev); + else _rtl8168_set_mac_mcu_8168fp_2(dev); } static void -rtl8168_set_mac_mcu_8168fp_4(struct net_device *dev) +rtl8168_set_mac_mcu_8168fp_3(struct net_device *dev) { + struct rtl8168_private *tp = netdev_priv(dev); + u16 i; + static const u16 mcu_patch_code_8168fp_3 = { + 0xE008, 0xE053, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB400, + 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, + 0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, + 0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330, + 0xE80E, 0xE018, 0xC126, 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326, + 0xE805, 0xC521, 0xC324, 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908, + 0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, + 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000, + 0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, + 0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, + 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, + 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000 + }; + rtl8168_hw_disable_mac_mcu_bps(dev); + + for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_3); i++) { + rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_3i); + } + + rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000); + + rtl8168_mac_ocp_write(tp, 0xFC28, 0x2B14); + //rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0); + + if (true == rtl8168_check_dash_other_fun_present(tp)) + rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000); + else + rtl8168_mac_ocp_write(tp, 0xFC38, 0x0001); } static void @@ -9342,23 +9221,58 @@ rtl8168_set_mac_mcu_8168ep_2(dev); break; case CFG_METHOD_29: - case CFG_METHOD_30: rtl8168_set_mac_mcu_8168h_1(dev); break; + case CFG_METHOD_30: + rtl8168_set_mac_mcu_8168h_2(dev); + break; case CFG_METHOD_31: - if (tp->HwPkgDet == 0x00 || tp->HwPkgDet == 0x0F) - rtl8168_set_mac_mcu_8168fp_1(dev); - else if (tp->HwPkgDet == 0x06) - rtl8168_set_mac_mcu_8168fp_2(dev); + rtl8168_set_mac_mcu_8168fp_1(dev); break; case CFG_METHOD_32: - rtl8168_set_mac_mcu_8168fp_3(dev); + rtl8168_set_mac_mcu_8168fp_2(dev); break; case CFG_METHOD_33: - rtl8168_set_mac_mcu_8168fp_4(dev); + case CFG_METHOD_34: + rtl8168_set_mac_mcu_8168fp_3(dev); + break; + case CFG_METHOD_35: + rtl8168_set_mac_mcu_8168h_3(dev); break; } } +#endif + +#ifdef ENABLE_USE_FIRMWARE_FILE +static void rtl8168_release_firmware(struct rtl8168_private *tp) +{ + if (tp->rtl_fw) { + rtl8168_fw_release_firmware(tp->rtl_fw); + kfree(tp->rtl_fw); + tp->rtl_fw = NULL; + } +} + +void rtl8168_apply_firmware(struct rtl8168_private *tp) +{ + /* TODO: release firmware if rtl_fw_write_firmware signals failure. */ + if (tp->rtl_fw) { + rtl8168_fw_write_firmware(tp, tp->rtl_fw); + /* At least one firmware doesn't reset tp->ocp_base. */ + tp->ocp_base = OCP_STD_PHY_BASE; + + /* PHY soft reset may still be in progress */ + //phy_read_poll_timeout(tp->phydev, MII_BMCR, val, + // !(val & BMCR_RESET), + // 50000, 600000, true); + rtl8168_wait_phy_reset_complete(tp); + + tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp); + tp->sw_ram_code_ver = tp->hw_ram_code_ver; + tp->HwHasWrRamCodeToMicroP = TRUE; + } +} +#endif static void rtl8168_hw_init(struct net_device *dev) @@ -9366,45 +9280,16 @@ struct rtl8168_private *tp = netdev_priv(dev); u32 csi_tmp; - switch (tp->mcfg) { - case CFG_METHOD_14: - case CFG_METHOD_15: - case CFG_METHOD_16: - case CFG_METHOD_17: - case CFG_METHOD_18: - case CFG_METHOD_19: - case CFG_METHOD_20: - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + if (tp->HwSuppAspmClkIntrLock) { + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); rtl8168_enable_cfg9346_write(tp); - RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); - RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); + rtl8168_hw_aspm_clkreq_enable(tp, false); rtl8168_disable_cfg9346_write(tp); - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); - break; } //Disable UPS - switch (tp->mcfg) { - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + if (HW_SUPPORT_UPS_MODE(tp)) rtl8168_mac_ocp_write(tp, 0xD400, rtl8168_mac_ocp_read( tp, 0xD400) & ~(BIT_0)); - break; - } //Disable DMA Aggregation switch (tp->mcfg) { @@ -9413,6 +9298,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1)); rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) | (BIT_0)); rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_0)); @@ -9454,6 +9341,7 @@ case CFG_METHOD_22: case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: if (aspm) { if ((rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3) || (RTL_R8(tp, Config0) & 0x07)) { RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6); @@ -9466,14 +9354,18 @@ if (tp->mcfg == CFG_METHOD_10 || tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_2); - rtl8168_hw_mac_mcu_config(dev); +#ifndef ENABLE_USE_FIRMWARE_FILE + if (!tp->rtl_fw) + rtl8168_hw_mac_mcu_config(dev); +#endif /*disable ocp phy power saving*/ if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) if (!tp->dash_printer_enabled) rtl8168_disable_ocp_phy_power_saving(dev); @@ -9493,8 +9385,17 @@ break; } + rtl8168_set_pci_pme(tp, 0); + if (s0_magic_packet == 1) rtl8168_enable_magic_packet(dev); + +#ifdef ENABLE_USE_FIRMWARE_FILE + if (tp->rtl_fw && + !(HW_DASH_SUPPORT_TYPE_3(tp) && + tp->HwPkgDet == 0x06)) + rtl8168_apply_firmware(tp); +#endif } static void @@ -9802,12 +9703,17 @@ break; case CFG_METHOD_28: - rtl8168_ephy_write(tp, 0x00, 0x10A3); - rtl8168_ephy_write(tp, 0x19, 0x7C00); + rtl8168_ephy_write(tp, 0x00, 0x10AB); + rtl8168_ephy_write(tp, 0x19, 0xFC00); rtl8168_ephy_write(tp, 0x1E, 0x20EB); rtl8168_ephy_write(tp, 0x0D, 0x1666); ClearPCIePhyBit(tp, 0x0B, BIT_0); SetPCIePhyBit(tp, 0x1D, BIT_14); + ClearAndSetPCIePhyBit(tp, + 0x0C, + BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5, + BIT_9 | BIT_4 + ); break; case CFG_METHOD_29: @@ -9827,6 +9733,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: ClearAndSetPCIePhyBit(tp, 0x19, BIT_6, @@ -9843,6 +9750,12 @@ ClearPCIePhyBit(tp, 0x0B, BIT_0); break; + case CFG_METHOD_35: + rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0)); + + rtl8168_set_mcu_ocp_bit(tp, 0xDE38, (BIT_2)); + + break; } } @@ -9854,7 +9767,7 @@ int retval = TRUE; switch (tp->mcfg) { - case CFG_METHOD_21 ... CFG_METHOD_33: + case CFG_METHOD_21 ... CFG_METHOD_34: rtl8168_mdio_write(tp,0x1f, 0x0B82); rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4); @@ -9862,14 +9775,11 @@ WaitCnt = 0; do { PhyRegValue = rtl8168_mdio_read(tp, 0x10); - PhyRegValue &= 0x0040; udelay(100); WaitCnt++; - } while(PhyRegValue != 0x0040 && WaitCnt <1000); + } while (!(PhyRegValue & BIT_6) && (WaitCnt < 1000)); - if (WaitCnt == 1000) { - retval = FALSE; - } + if (!(PhyRegValue & BIT_6) && (WaitCnt == 1000)) retval = FALSE; rtl8168_mdio_write(tp,0x1f, 0x0000); break; @@ -9886,22 +9796,19 @@ int retval = TRUE; switch (tp->mcfg) { - case CFG_METHOD_21 ... CFG_METHOD_33: + case CFG_METHOD_21 ... CFG_METHOD_34: rtl8168_mdio_write(tp, 0x1f, 0x0B82); rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4); - rtl8168_mdio_write(tp,0x1f, 0x0A22); + rtl8168_mdio_write(tp,0x1f, 0x0B80); WaitCnt = 0; do { - PhyRegValue = rtl8168_mdio_read(tp, 0x12); - PhyRegValue &= 0x0010; + PhyRegValue = rtl8168_mdio_read(tp, 0x10); udelay(100); WaitCnt++; - } while(PhyRegValue != 0x0010 && WaitCnt <1000); + } while ((PhyRegValue & BIT_6) && (WaitCnt < 1000)); - if (WaitCnt == 1000) { - retval = FALSE; - } + if ((PhyRegValue & BIT_6) && (WaitCnt == 1000)) retval = FALSE; rtl8168_mdio_write(tp,0x1f, 0x0000); break; @@ -9910,18 +9817,17 @@ return retval; } -static int -rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev) +static u16 +rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp) { - struct rtl8168_private *tp = netdev_priv(dev); - int ram_code_ver_match = 0; + u16 hw_ram_code_ver = ~0; switch (tp->mcfg) { case CFG_METHOD_14: case CFG_METHOD_15: rtl8168_mdio_write(tp, 0x1F, 0x0005); rtl8168_mdio_write(tp, 0x05, 0x8B60); - tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06); + hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06); rtl8168_mdio_write(tp, 0x1F, 0x0000); break; case CFG_METHOD_16: @@ -9931,7 +9837,7 @@ case CFG_METHOD_20: rtl8168_mdio_write(tp, 0x1F, 0x0005); rtl8168_mdio_write(tp, 0x05, 0x8B30); - tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06); + hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06); rtl8168_mdio_write(tp, 0x1F, 0x0000); break; case CFG_METHOD_21: @@ -9947,9 +9853,11 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mdio_write(tp, 0x1F, 0x0A43); rtl8168_mdio_write(tp, 0x13, 0x801E); - tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14); + hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14); rtl8168_mdio_write(tp, 0x1F, 0x0000); break; default: @@ -9957,6 +9865,56 @@ break; } + return hw_ram_code_ver; +} + +#ifndef ENABLE_USE_FIRMWARE_FILE +static void +rtl8168_enable_phy_disable_mode(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + + switch (tp->HwSuppCheckPhyDisableModeVer) { + case 1: + rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) | BIT_1); + break; + case 2: + case 3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5); + break; + } + + dprintk("enable phy disable mode.\n"); +} + +static void +rtl8168_disable_phy_disable_mode(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + + switch (tp->HwSuppCheckPhyDisableModeVer) { + case 1: + rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) & ~BIT_1); + break; + case 2: + case 3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5); + break; + } + + mdelay(1); + + dprintk("disable phy disable mode.\n"); +} + +static int +rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + int ram_code_ver_match = 0; + + tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp); + if ( tp->hw_ram_code_ver == tp->sw_ram_code_ver) { ram_code_ver_match = 1; tp->HwHasWrRamCodeToMicroP = TRUE; @@ -10003,6 +9961,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: rtl8168_mdio_write(tp, 0x1F, 0x0A43); rtl8168_mdio_write(tp, 0x13, 0x801E); rtl8168_mdio_write(tp, 0x14, tp->sw_ram_code_ver); @@ -21257,6 +21217,536 @@ } static void +rtl8168_set_phy_mcu_8168h_3(struct net_device *dev) +{ + struct rtl8168_private *tp = netdev_priv(dev); + unsigned int gphy_val; + + rtl8168_set_phy_mcu_patch_request(tp); + + rtl8168_mdio_write(tp, 0x1f, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x8042); + rtl8168_mdio_write(tp, 0x14, 0x3800); + rtl8168_mdio_write(tp, 0x13, 0xB82E); + rtl8168_mdio_write(tp, 0x14, 0x0001); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0xB820); + rtl8168_mdio_write(tp, 0x14, 0x0090); + rtl8168_mdio_write(tp, 0x13, 0xA016); + rtl8168_mdio_write(tp, 0x14, 0x0000); + rtl8168_mdio_write(tp, 0x13, 0xA012); + rtl8168_mdio_write(tp, 0x14, 0x0000); + rtl8168_mdio_write(tp, 0x13, 0xA014); + rtl8168_mdio_write(tp, 0x14, 0x1800); + rtl8168_mdio_write(tp, 0x14, 0x8002); + rtl8168_mdio_write(tp, 0x14, 0x2b5d); + rtl8168_mdio_write(tp, 0x14, 0x0c68); + rtl8168_mdio_write(tp, 0x14, 0x1800); + rtl8168_mdio_write(tp, 0x14, 0x0b3c); + rtl8168_mdio_write(tp, 0x13, 0xA000); + rtl8168_mdio_write(tp, 0x14, 0x0b3a); + rtl8168_mdio_write(tp, 0x13, 0xA008); + rtl8168_mdio_write(tp, 0x14, 0x0100); + rtl8168_mdio_write(tp, 0x13, 0xB820); + rtl8168_mdio_write(tp, 0x14, 0x0010); + + + rtl8168_mdio_write(tp, 0x13, 0x83f3); + rtl8168_mdio_write(tp, 0x14, 0xaf84); + rtl8168_mdio_write(tp, 0x14, 0x0baf); + rtl8168_mdio_write(tp, 0x14, 0x8466); + rtl8168_mdio_write(tp, 0x14, 0xaf84); + rtl8168_mdio_write(tp, 0x14, 0xcdaf); + rtl8168_mdio_write(tp, 0x14, 0x8736); + rtl8168_mdio_write(tp, 0x14, 0xaf87); + rtl8168_mdio_write(tp, 0x14, 0x39af); + rtl8168_mdio_write(tp, 0x14, 0x8739); + rtl8168_mdio_write(tp, 0x14, 0xaf87); + rtl8168_mdio_write(tp, 0x14, 0x39af); + rtl8168_mdio_write(tp, 0x14, 0x8739); + rtl8168_mdio_write(tp, 0x14, 0xef79); + rtl8168_mdio_write(tp, 0x14, 0xfb89); + rtl8168_mdio_write(tp, 0x14, 0xe987); + rtl8168_mdio_write(tp, 0x14, 0xffd7); + rtl8168_mdio_write(tp, 0x14, 0x0017); + rtl8168_mdio_write(tp, 0x14, 0xd400); + rtl8168_mdio_write(tp, 0x14, 0x051c); + rtl8168_mdio_write(tp, 0x14, 0x421a); + rtl8168_mdio_write(tp, 0x14, 0x741b); + rtl8168_mdio_write(tp, 0x14, 0x97e9); + rtl8168_mdio_write(tp, 0x14, 0x87fe); + rtl8168_mdio_write(tp, 0x14, 0xffef); + rtl8168_mdio_write(tp, 0x14, 0x97e0); + rtl8168_mdio_write(tp, 0x14, 0x82aa); + rtl8168_mdio_write(tp, 0x14, 0xa000); + rtl8168_mdio_write(tp, 0x14, 0x08ef); + rtl8168_mdio_write(tp, 0x14, 0x46dc); + rtl8168_mdio_write(tp, 0x14, 0x19dd); + rtl8168_mdio_write(tp, 0x14, 0xaf1a); + rtl8168_mdio_write(tp, 0x14, 0x37a0); + rtl8168_mdio_write(tp, 0x14, 0x012d); + rtl8168_mdio_write(tp, 0x14, 0xe082); + rtl8168_mdio_write(tp, 0x14, 0xa7ac); + rtl8168_mdio_write(tp, 0x14, 0x2013); + rtl8168_mdio_write(tp, 0x14, 0xe087); + rtl8168_mdio_write(tp, 0x14, 0xffe1); + rtl8168_mdio_write(tp, 0x14, 0x87fe); + rtl8168_mdio_write(tp, 0x14, 0xac27); + rtl8168_mdio_write(tp, 0x14, 0x05a1); + rtl8168_mdio_write(tp, 0x14, 0x0807); + rtl8168_mdio_write(tp, 0x14, 0xae0f); + rtl8168_mdio_write(tp, 0x14, 0xa107); + rtl8168_mdio_write(tp, 0x14, 0x02ae); + rtl8168_mdio_write(tp, 0x14, 0x0aef); + rtl8168_mdio_write(tp, 0x14, 0x4619); + rtl8168_mdio_write(tp, 0x14, 0x19dc); + rtl8168_mdio_write(tp, 0x14, 0x19dd); + rtl8168_mdio_write(tp, 0x14, 0xaf1a); + rtl8168_mdio_write(tp, 0x14, 0x37d8); + rtl8168_mdio_write(tp, 0x14, 0x19d9); + rtl8168_mdio_write(tp, 0x14, 0x19dc); + rtl8168_mdio_write(tp, 0x14, 0x19dd); + rtl8168_mdio_write(tp, 0x14, 0xaf1a); + rtl8168_mdio_write(tp, 0x14, 0x3719); + rtl8168_mdio_write(tp, 0x14, 0x19ae); + rtl8168_mdio_write(tp, 0x14, 0xcfbf); + rtl8168_mdio_write(tp, 0x14, 0x8763); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdc3c); + rtl8168_mdio_write(tp, 0x14, 0x0005); + rtl8168_mdio_write(tp, 0x14, 0xaaf5); + rtl8168_mdio_write(tp, 0x14, 0x0249); + rtl8168_mdio_write(tp, 0x14, 0xcaef); + rtl8168_mdio_write(tp, 0x14, 0x67d7); + rtl8168_mdio_write(tp, 0x14, 0x0014); + rtl8168_mdio_write(tp, 0x14, 0x0249); + rtl8168_mdio_write(tp, 0x14, 0xe5ad); + rtl8168_mdio_write(tp, 0x14, 0x50f7); + rtl8168_mdio_write(tp, 0x14, 0xd400); + rtl8168_mdio_write(tp, 0x14, 0x01bf); + rtl8168_mdio_write(tp, 0x14, 0x46a7); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0x98bf); + rtl8168_mdio_write(tp, 0x14, 0x465c); + rtl8168_mdio_write(tp, 0x14, 0x024a); + rtl8168_mdio_write(tp, 0x14, 0x5fd4); + rtl8168_mdio_write(tp, 0x14, 0x0003); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x7502); + rtl8168_mdio_write(tp, 0x14, 0x4498); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x7202); + rtl8168_mdio_write(tp, 0x14, 0x4a5f); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x6602); + rtl8168_mdio_write(tp, 0x14, 0x4a5f); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x6902); + rtl8168_mdio_write(tp, 0x14, 0x44dc); + rtl8168_mdio_write(tp, 0x14, 0xad28); + rtl8168_mdio_write(tp, 0x14, 0xf7bf); + rtl8168_mdio_write(tp, 0x14, 0x876f); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdcad); + rtl8168_mdio_write(tp, 0x14, 0x28f7); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x6c02); + rtl8168_mdio_write(tp, 0x14, 0x4a5f); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x6c02); + rtl8168_mdio_write(tp, 0x14, 0x4a56); + rtl8168_mdio_write(tp, 0x14, 0xbf46); + rtl8168_mdio_write(tp, 0x14, 0x5c02); + rtl8168_mdio_write(tp, 0x14, 0x4a56); + rtl8168_mdio_write(tp, 0x14, 0xbf45); + rtl8168_mdio_write(tp, 0x14, 0x21af); + rtl8168_mdio_write(tp, 0x14, 0x020e); + rtl8168_mdio_write(tp, 0x14, 0xee82); + rtl8168_mdio_write(tp, 0x14, 0x5000); + rtl8168_mdio_write(tp, 0x14, 0x0284); + rtl8168_mdio_write(tp, 0x14, 0xdd02); + rtl8168_mdio_write(tp, 0x14, 0x8521); + rtl8168_mdio_write(tp, 0x14, 0x0285); + rtl8168_mdio_write(tp, 0x14, 0x36af); + rtl8168_mdio_write(tp, 0x14, 0x03d2); + rtl8168_mdio_write(tp, 0x14, 0xf8f9); + rtl8168_mdio_write(tp, 0x14, 0xfafb); + rtl8168_mdio_write(tp, 0x14, 0xef59); + rtl8168_mdio_write(tp, 0x14, 0xbf45); + rtl8168_mdio_write(tp, 0x14, 0x3002); + rtl8168_mdio_write(tp, 0x14, 0x44dc); + rtl8168_mdio_write(tp, 0x14, 0x3c00); + rtl8168_mdio_write(tp, 0x14, 0x03aa); + rtl8168_mdio_write(tp, 0x14, 0x2cbf); + rtl8168_mdio_write(tp, 0x14, 0x8769); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdcad); + rtl8168_mdio_write(tp, 0x14, 0x2823); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x6f02); + rtl8168_mdio_write(tp, 0x14, 0x44dc); + rtl8168_mdio_write(tp, 0x14, 0xad28); + rtl8168_mdio_write(tp, 0x14, 0x1a02); + rtl8168_mdio_write(tp, 0x14, 0x49ca); + rtl8168_mdio_write(tp, 0x14, 0xef67); + rtl8168_mdio_write(tp, 0x14, 0xd700); + rtl8168_mdio_write(tp, 0x14, 0x0202); + rtl8168_mdio_write(tp, 0x14, 0x49e5); + rtl8168_mdio_write(tp, 0x14, 0xad50); + rtl8168_mdio_write(tp, 0x14, 0xf7bf); + rtl8168_mdio_write(tp, 0x14, 0x876c); + rtl8168_mdio_write(tp, 0x14, 0x024a); + rtl8168_mdio_write(tp, 0x14, 0x5fbf); + rtl8168_mdio_write(tp, 0x14, 0x876c); + rtl8168_mdio_write(tp, 0x14, 0x024a); + rtl8168_mdio_write(tp, 0x14, 0x56ef); + rtl8168_mdio_write(tp, 0x14, 0x95ff); + rtl8168_mdio_write(tp, 0x14, 0xfefd); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8fa); + rtl8168_mdio_write(tp, 0x14, 0xef69); + rtl8168_mdio_write(tp, 0x14, 0xe080); + rtl8168_mdio_write(tp, 0x14, 0x15ad); + rtl8168_mdio_write(tp, 0x14, 0x2406); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x6002); + rtl8168_mdio_write(tp, 0x14, 0x4a56); + rtl8168_mdio_write(tp, 0x14, 0xef96); + rtl8168_mdio_write(tp, 0x14, 0xfefc); + rtl8168_mdio_write(tp, 0x14, 0x04f8); + rtl8168_mdio_write(tp, 0x14, 0xe087); + rtl8168_mdio_write(tp, 0x14, 0xf9e1); + rtl8168_mdio_write(tp, 0x14, 0x87fa); + rtl8168_mdio_write(tp, 0x14, 0x1b10); + rtl8168_mdio_write(tp, 0x14, 0x9f1e); + rtl8168_mdio_write(tp, 0x14, 0xee87); + rtl8168_mdio_write(tp, 0x14, 0xf900); + rtl8168_mdio_write(tp, 0x14, 0xe080); + rtl8168_mdio_write(tp, 0x14, 0x15ac); + rtl8168_mdio_write(tp, 0x14, 0x2606); + rtl8168_mdio_write(tp, 0x14, 0xee87); + rtl8168_mdio_write(tp, 0x14, 0xf700); + rtl8168_mdio_write(tp, 0x14, 0xae12); + rtl8168_mdio_write(tp, 0x14, 0x0286); + rtl8168_mdio_write(tp, 0x14, 0x9702); + rtl8168_mdio_write(tp, 0x14, 0x8565); + rtl8168_mdio_write(tp, 0x14, 0x0285); + rtl8168_mdio_write(tp, 0x14, 0x9d02); + rtl8168_mdio_write(tp, 0x14, 0x865a); + rtl8168_mdio_write(tp, 0x14, 0xae04); + rtl8168_mdio_write(tp, 0x14, 0x10e4); + rtl8168_mdio_write(tp, 0x14, 0x87f9); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8f9); + rtl8168_mdio_write(tp, 0x14, 0xfaef); + rtl8168_mdio_write(tp, 0x14, 0x69fa); + rtl8168_mdio_write(tp, 0x14, 0xbf45); + rtl8168_mdio_write(tp, 0x14, 0x3002); + rtl8168_mdio_write(tp, 0x14, 0x44dc); + rtl8168_mdio_write(tp, 0x14, 0xa103); + rtl8168_mdio_write(tp, 0x14, 0x22e0); + rtl8168_mdio_write(tp, 0x14, 0x87eb); + rtl8168_mdio_write(tp, 0x14, 0xe187); + rtl8168_mdio_write(tp, 0x14, 0xecef); + rtl8168_mdio_write(tp, 0x14, 0x64bf); + rtl8168_mdio_write(tp, 0x14, 0x8748); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdc1b); + rtl8168_mdio_write(tp, 0x14, 0x46aa); + rtl8168_mdio_write(tp, 0x14, 0x0abf); + rtl8168_mdio_write(tp, 0x14, 0x874b); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdc1b); + rtl8168_mdio_write(tp, 0x14, 0x46ab); + rtl8168_mdio_write(tp, 0x14, 0x06bf); + rtl8168_mdio_write(tp, 0x14, 0x8745); + rtl8168_mdio_write(tp, 0x14, 0x024a); + rtl8168_mdio_write(tp, 0x14, 0x5ffe); + rtl8168_mdio_write(tp, 0x14, 0xef96); + rtl8168_mdio_write(tp, 0x14, 0xfefd); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8f9); + rtl8168_mdio_write(tp, 0x14, 0xef59); + rtl8168_mdio_write(tp, 0x14, 0xf9bf); + rtl8168_mdio_write(tp, 0x14, 0x4530); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdca1); + rtl8168_mdio_write(tp, 0x14, 0x0310); + rtl8168_mdio_write(tp, 0x14, 0xe087); + rtl8168_mdio_write(tp, 0x14, 0xf7ac); + rtl8168_mdio_write(tp, 0x14, 0x2605); + rtl8168_mdio_write(tp, 0x14, 0x0285); + rtl8168_mdio_write(tp, 0x14, 0xc9ae); + rtl8168_mdio_write(tp, 0x14, 0x0d02); + rtl8168_mdio_write(tp, 0x14, 0x860d); + rtl8168_mdio_write(tp, 0x14, 0xae08); + rtl8168_mdio_write(tp, 0x14, 0xe287); + rtl8168_mdio_write(tp, 0x14, 0xf7f6); + rtl8168_mdio_write(tp, 0x14, 0x36e6); + rtl8168_mdio_write(tp, 0x14, 0x87f7); + rtl8168_mdio_write(tp, 0x14, 0xfdef); + rtl8168_mdio_write(tp, 0x14, 0x95fd); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8f9); + rtl8168_mdio_write(tp, 0x14, 0xfafb); + rtl8168_mdio_write(tp, 0x14, 0xef79); + rtl8168_mdio_write(tp, 0x14, 0xfbbf); + rtl8168_mdio_write(tp, 0x14, 0x8748); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdcef); + rtl8168_mdio_write(tp, 0x14, 0x64e2); + rtl8168_mdio_write(tp, 0x14, 0x87e9); + rtl8168_mdio_write(tp, 0x14, 0xe387); + rtl8168_mdio_write(tp, 0x14, 0xea1b); + rtl8168_mdio_write(tp, 0x14, 0x659e); + rtl8168_mdio_write(tp, 0x14, 0x10e4); + rtl8168_mdio_write(tp, 0x14, 0x87e9); + rtl8168_mdio_write(tp, 0x14, 0xe587); + rtl8168_mdio_write(tp, 0x14, 0xeae2); + rtl8168_mdio_write(tp, 0x14, 0x87f7); + rtl8168_mdio_write(tp, 0x14, 0xf636); + rtl8168_mdio_write(tp, 0x14, 0xe687); + rtl8168_mdio_write(tp, 0x14, 0xf7ae); + rtl8168_mdio_write(tp, 0x14, 0x13e2); + rtl8168_mdio_write(tp, 0x14, 0x87f7); + rtl8168_mdio_write(tp, 0x14, 0xf736); + rtl8168_mdio_write(tp, 0x14, 0xe687); + rtl8168_mdio_write(tp, 0x14, 0xf702); + rtl8168_mdio_write(tp, 0x14, 0x49ca); + rtl8168_mdio_write(tp, 0x14, 0xef57); + rtl8168_mdio_write(tp, 0x14, 0xe687); + rtl8168_mdio_write(tp, 0x14, 0xe7e7); + rtl8168_mdio_write(tp, 0x14, 0x87e8); + rtl8168_mdio_write(tp, 0x14, 0xffef); + rtl8168_mdio_write(tp, 0x14, 0x97ff); + rtl8168_mdio_write(tp, 0x14, 0xfefd); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8f9); + rtl8168_mdio_write(tp, 0x14, 0xfafb); + rtl8168_mdio_write(tp, 0x14, 0xef79); + rtl8168_mdio_write(tp, 0x14, 0xfbe2); + rtl8168_mdio_write(tp, 0x14, 0x87e7); + rtl8168_mdio_write(tp, 0x14, 0xe387); + rtl8168_mdio_write(tp, 0x14, 0xe8ef); + rtl8168_mdio_write(tp, 0x14, 0x65e2); + rtl8168_mdio_write(tp, 0x14, 0x87fb); + rtl8168_mdio_write(tp, 0x14, 0xe387); + rtl8168_mdio_write(tp, 0x14, 0xfcef); + rtl8168_mdio_write(tp, 0x14, 0x7502); + rtl8168_mdio_write(tp, 0x14, 0x49e5); + rtl8168_mdio_write(tp, 0x14, 0xac50); + rtl8168_mdio_write(tp, 0x14, 0x1abf); + rtl8168_mdio_write(tp, 0x14, 0x8748); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdcef); + rtl8168_mdio_write(tp, 0x14, 0x64e2); + rtl8168_mdio_write(tp, 0x14, 0x87e9); + rtl8168_mdio_write(tp, 0x14, 0xe387); + rtl8168_mdio_write(tp, 0x14, 0xea1b); + rtl8168_mdio_write(tp, 0x14, 0x659e); + rtl8168_mdio_write(tp, 0x14, 0x16e4); + rtl8168_mdio_write(tp, 0x14, 0x87e9); + rtl8168_mdio_write(tp, 0x14, 0xe587); + rtl8168_mdio_write(tp, 0x14, 0xeaae); + rtl8168_mdio_write(tp, 0x14, 0x06bf); + rtl8168_mdio_write(tp, 0x14, 0x8745); + rtl8168_mdio_write(tp, 0x14, 0x024a); + rtl8168_mdio_write(tp, 0x14, 0x5fe2); + rtl8168_mdio_write(tp, 0x14, 0x87f7); + rtl8168_mdio_write(tp, 0x14, 0xf636); + rtl8168_mdio_write(tp, 0x14, 0xe687); + rtl8168_mdio_write(tp, 0x14, 0xf7ff); + rtl8168_mdio_write(tp, 0x14, 0xef97); + rtl8168_mdio_write(tp, 0x14, 0xfffe); + rtl8168_mdio_write(tp, 0x14, 0xfdfc); + rtl8168_mdio_write(tp, 0x14, 0x04f8); + rtl8168_mdio_write(tp, 0x14, 0xf9fa); + rtl8168_mdio_write(tp, 0x14, 0xef69); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x3f02); + rtl8168_mdio_write(tp, 0x14, 0x44dc); + rtl8168_mdio_write(tp, 0x14, 0xad28); + rtl8168_mdio_write(tp, 0x14, 0x29bf); + rtl8168_mdio_write(tp, 0x14, 0x873c); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdcef); + rtl8168_mdio_write(tp, 0x14, 0x54bf); + rtl8168_mdio_write(tp, 0x14, 0x8739); + rtl8168_mdio_write(tp, 0x14, 0x0244); + rtl8168_mdio_write(tp, 0x14, 0xdcac); + rtl8168_mdio_write(tp, 0x14, 0x290d); + rtl8168_mdio_write(tp, 0x14, 0xac28); + rtl8168_mdio_write(tp, 0x14, 0x05a3); + rtl8168_mdio_write(tp, 0x14, 0x020c); + rtl8168_mdio_write(tp, 0x14, 0xae10); + rtl8168_mdio_write(tp, 0x14, 0xa303); + rtl8168_mdio_write(tp, 0x14, 0x07ae); + rtl8168_mdio_write(tp, 0x14, 0x0ba3); + rtl8168_mdio_write(tp, 0x14, 0x0402); + rtl8168_mdio_write(tp, 0x14, 0xae06); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x4502); + rtl8168_mdio_write(tp, 0x14, 0x4a5f); + rtl8168_mdio_write(tp, 0x14, 0xef96); + rtl8168_mdio_write(tp, 0x14, 0xfefd); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8f9); + rtl8168_mdio_write(tp, 0x14, 0xfafb); + rtl8168_mdio_write(tp, 0x14, 0xef69); + rtl8168_mdio_write(tp, 0x14, 0xfae0); + rtl8168_mdio_write(tp, 0x14, 0x8015); + rtl8168_mdio_write(tp, 0x14, 0xad25); + rtl8168_mdio_write(tp, 0x14, 0x41d2); + rtl8168_mdio_write(tp, 0x14, 0x0002); + rtl8168_mdio_write(tp, 0x14, 0x86ed); + rtl8168_mdio_write(tp, 0x14, 0xe087); + rtl8168_mdio_write(tp, 0x14, 0xebe1); + rtl8168_mdio_write(tp, 0x14, 0x87ec); + rtl8168_mdio_write(tp, 0x14, 0x1b46); + rtl8168_mdio_write(tp, 0x14, 0xab26); + rtl8168_mdio_write(tp, 0x14, 0xd40b); + rtl8168_mdio_write(tp, 0x14, 0xff1b); + rtl8168_mdio_write(tp, 0x14, 0x46aa); + rtl8168_mdio_write(tp, 0x14, 0x1fac); + rtl8168_mdio_write(tp, 0x14, 0x3204); + rtl8168_mdio_write(tp, 0x14, 0xef32); + rtl8168_mdio_write(tp, 0x14, 0xae02); + rtl8168_mdio_write(tp, 0x14, 0xd304); + rtl8168_mdio_write(tp, 0x14, 0x0c31); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0xeb1a); + rtl8168_mdio_write(tp, 0x14, 0x93d8); + rtl8168_mdio_write(tp, 0x14, 0x19d9); + rtl8168_mdio_write(tp, 0x14, 0x1b46); + rtl8168_mdio_write(tp, 0x14, 0xab0e); + rtl8168_mdio_write(tp, 0x14, 0x19d8); + rtl8168_mdio_write(tp, 0x14, 0x19d9); + rtl8168_mdio_write(tp, 0x14, 0x1b46); + rtl8168_mdio_write(tp, 0x14, 0xaa06); + rtl8168_mdio_write(tp, 0x14, 0x12a2); + rtl8168_mdio_write(tp, 0x14, 0x08c9); + rtl8168_mdio_write(tp, 0x14, 0xae06); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x4202); + rtl8168_mdio_write(tp, 0x14, 0x4a5f); + rtl8168_mdio_write(tp, 0x14, 0xfeef); + rtl8168_mdio_write(tp, 0x14, 0x96ff); + rtl8168_mdio_write(tp, 0x14, 0xfefd); + rtl8168_mdio_write(tp, 0x14, 0xfc04); + rtl8168_mdio_write(tp, 0x14, 0xf8fb); + rtl8168_mdio_write(tp, 0x14, 0xef79); + rtl8168_mdio_write(tp, 0x14, 0xa200); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x8748); + rtl8168_mdio_write(tp, 0x14, 0xae33); + rtl8168_mdio_write(tp, 0x14, 0xa201); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x874b); + rtl8168_mdio_write(tp, 0x14, 0xae2b); + rtl8168_mdio_write(tp, 0x14, 0xa202); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x874e); + rtl8168_mdio_write(tp, 0x14, 0xae23); + rtl8168_mdio_write(tp, 0x14, 0xa203); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x8751); + rtl8168_mdio_write(tp, 0x14, 0xae1b); + rtl8168_mdio_write(tp, 0x14, 0xa204); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x8754); + rtl8168_mdio_write(tp, 0x14, 0xae13); + rtl8168_mdio_write(tp, 0x14, 0xa205); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x8757); + rtl8168_mdio_write(tp, 0x14, 0xae0b); + rtl8168_mdio_write(tp, 0x14, 0xa206); + rtl8168_mdio_write(tp, 0x14, 0x05bf); + rtl8168_mdio_write(tp, 0x14, 0x875a); + rtl8168_mdio_write(tp, 0x14, 0xae03); + rtl8168_mdio_write(tp, 0x14, 0xbf87); + rtl8168_mdio_write(tp, 0x14, 0x5d02); + rtl8168_mdio_write(tp, 0x14, 0x44dc); + rtl8168_mdio_write(tp, 0x14, 0xef64); + rtl8168_mdio_write(tp, 0x14, 0xef97); + rtl8168_mdio_write(tp, 0x14, 0xfffc); + rtl8168_mdio_write(tp, 0x14, 0x04af); + rtl8168_mdio_write(tp, 0x14, 0x00ed); + rtl8168_mdio_write(tp, 0x14, 0x54a4); + rtl8168_mdio_write(tp, 0x14, 0x3474); + rtl8168_mdio_write(tp, 0x14, 0xa600); + rtl8168_mdio_write(tp, 0x14, 0x22a4); + rtl8168_mdio_write(tp, 0x14, 0x3411); + rtl8168_mdio_write(tp, 0x14, 0xb842); + rtl8168_mdio_write(tp, 0x14, 0x22b8); + rtl8168_mdio_write(tp, 0x14, 0x42f0); + rtl8168_mdio_write(tp, 0x14, 0xa200); + rtl8168_mdio_write(tp, 0x14, 0xf0a2); + rtl8168_mdio_write(tp, 0x14, 0x02f0); + rtl8168_mdio_write(tp, 0x14, 0xa204); + rtl8168_mdio_write(tp, 0x14, 0xf0a2); + rtl8168_mdio_write(tp, 0x14, 0x06f0); + rtl8168_mdio_write(tp, 0x14, 0xa208); + rtl8168_mdio_write(tp, 0x14, 0xf0a2); + rtl8168_mdio_write(tp, 0x14, 0x0af0); + rtl8168_mdio_write(tp, 0x14, 0xa20c); + rtl8168_mdio_write(tp, 0x14, 0xf0a2); + rtl8168_mdio_write(tp, 0x14, 0x0e55); + rtl8168_mdio_write(tp, 0x14, 0xb820); + rtl8168_mdio_write(tp, 0x14, 0xd9c6); + rtl8168_mdio_write(tp, 0x14, 0x08aa); + rtl8168_mdio_write(tp, 0x14, 0xc430); + rtl8168_mdio_write(tp, 0x14, 0x00c6); + rtl8168_mdio_write(tp, 0x14, 0x1433); + rtl8168_mdio_write(tp, 0x14, 0xc41a); + rtl8168_mdio_write(tp, 0x14, 0x88c4); + rtl8168_mdio_write(tp, 0x14, 0x2e22); + rtl8168_mdio_write(tp, 0x14, 0xc42e); + rtl8168_mdio_write(tp, 0x14, 0x54c4); + rtl8168_mdio_write(tp, 0x14, 0x1a00); + rtl8168_mdio_write(tp, 0x13, 0xb818); + rtl8168_mdio_write(tp, 0x14, 0x1a01); + rtl8168_mdio_write(tp, 0x13, 0xb81a); + rtl8168_mdio_write(tp, 0x14, 0x020b); + rtl8168_mdio_write(tp, 0x13, 0xb81c); + rtl8168_mdio_write(tp, 0x14, 0x03ce); + rtl8168_mdio_write(tp, 0x13, 0xb81e); + rtl8168_mdio_write(tp, 0x14, 0x00e7); + rtl8168_mdio_write(tp, 0x13, 0xb846); + rtl8168_mdio_write(tp, 0x14, 0xffff); + rtl8168_mdio_write(tp, 0x13, 0xb848); + rtl8168_mdio_write(tp, 0x14, 0xffff); + rtl8168_mdio_write(tp, 0x13, 0xb84a); + rtl8168_mdio_write(tp, 0x14, 0xffff); + rtl8168_mdio_write(tp, 0x13, 0xb84c); + rtl8168_mdio_write(tp, 0x14, 0xffff); + rtl8168_mdio_write(tp, 0x13, 0xb832); + rtl8168_mdio_write(tp, 0x14, 0x000f); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x0000); + rtl8168_mdio_write(tp, 0x14, 0x0000); + rtl8168_mdio_write(tp, 0x1f, 0x0B82); + gphy_val = rtl8168_mdio_read(tp, 0x17); + gphy_val &= ~(BIT_0); + rtl8168_mdio_write(tp, 0x17, gphy_val); + rtl8168_mdio_write(tp, 0x1f, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x8042); + rtl8168_mdio_write(tp, 0x14, 0x0000); + + rtl8168_clear_phy_mcu_patch_request(tp); + + if (tp->RequiredSecLanDonglePatch) { + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + gphy_val = rtl8168_mdio_read(tp, 0x11); + gphy_val &= ~BIT_6; + rtl8168_mdio_write(tp, 0x11, gphy_val); + } +} + +static void rtl8168_init_hw_phy_mcu(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); @@ -21316,6 +21806,9 @@ case CFG_METHOD_30: rtl8168_set_phy_mcu_8168h_2(dev); break; + case CFG_METHOD_35: + rtl8168_set_phy_mcu_8168h_3(dev); + break; } if (require_disable_phy_disable_mode) @@ -21327,6 +21820,7 @@ tp->HwHasWrRamCodeToMicroP = TRUE; } +#endif static void rtl8168_hw_phy_config(struct net_device *dev) @@ -21340,7 +21834,11 @@ if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) return; - rtl8168_init_hw_phy_mcu(dev); +#ifndef ENABLE_USE_FIRMWARE_FILE + if (!tp->rtl_fw) { + rtl8168_init_hw_phy_mcu(dev); + } +#endif if (tp->mcfg == CFG_METHOD_1) { rtl8168_mdio_write(tp, 0x1F, 0x0001); @@ -23644,7 +24142,7 @@ } } } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) { rtl8168_mdio_write(tp, 0x1F, 0x0A43); rtl8168_mdio_write(tp, 0x13, 0x808E); ClearAndSetEthPhyBit( tp, @@ -23798,11 +24296,134 @@ rtl8168_mdio_write(tp, 0x1F, 0x0000); } } + } else if (tp->mcfg == CFG_METHOD_35) { + rtl8168_mdio_write(tp, 0x1F, 0x0A44); + rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A4C); + rtl8168_clear_eth_phy_bit(tp, 0x15, (BIT_14 | BIT_13)); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x81B9); + rtl8168_mdio_write(tp, 0x14, 0x2000); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x81D4); + ClearAndSetEthPhyBit(tp, + 0x14, + 0xFF00, + 0x6600); + rtl8168_mdio_write(tp, 0x13, 0x81CB); + ClearAndSetEthPhyBit(tp, + 0x14, + 0xFF00, + 0x3500); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A80); + ClearAndSetEthPhyBit(tp, + 0x16, + 0x000F, + 0x0005); + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x8016); + rtl8168_set_eth_phy_bit(tp, 0x14, BIT_13); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x811E); + rtl8168_mdio_write(tp, 0x14, 0xDECA); + + rtl8168_mdio_write(tp, 0x13, 0x811C); + rtl8168_mdio_write(tp, 0x14, 0x8008); + rtl8168_mdio_write(tp, 0x13, 0x8118); + rtl8168_mdio_write(tp, 0x14, 0xF8B4); + rtl8168_mdio_write(tp, 0x13, 0x811A); + rtl8168_mdio_write(tp, 0x14, 0x1A04); + + rtl8168_mdio_write(tp, 0x13, 0x8134); + rtl8168_mdio_write(tp, 0x14, 0xDECA); + rtl8168_mdio_write(tp, 0x13, 0x8132); + rtl8168_mdio_write(tp, 0x14, 0xA008); + rtl8168_mdio_write(tp, 0x13, 0x812E); + rtl8168_mdio_write(tp, 0x14, 0x00B5); + rtl8168_mdio_write(tp, 0x13, 0x8130); + rtl8168_mdio_write(tp, 0x14, 0x1A04); + + rtl8168_mdio_write(tp, 0x13, 0x8112); + ClearAndSetEthPhyBit(tp, + 0x14, + 0xFF00, + 0x7300); + rtl8168_mdio_write(tp, 0x13, 0x8106); + rtl8168_mdio_write(tp, 0x14, 0xA209); + rtl8168_mdio_write(tp, 0x13, 0x8108); + rtl8168_mdio_write(tp, 0x14, 0x13B0); + rtl8168_mdio_write(tp, 0x13, 0x8103); + ClearAndSetEthPhyBit(tp, + 0x14, + 0xF800, + 0xB800); + rtl8168_mdio_write(tp, 0x13, 0x8105); + ClearAndSetEthPhyBit(tp, + 0x14, + 0xFF00, + 0x0A00); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x87EB); + rtl8168_mdio_write(tp, 0x14, 0x0018); + rtl8168_mdio_write(tp, 0x13, 0x87EB); + rtl8168_mdio_write(tp, 0x14, 0x0018); + rtl8168_mdio_write(tp, 0x13, 0x87ED); + rtl8168_mdio_write(tp, 0x14, 0x0733); + rtl8168_mdio_write(tp, 0x13, 0x87EF); + rtl8168_mdio_write(tp, 0x14, 0x08DC); + rtl8168_mdio_write(tp, 0x13, 0x87F1); + rtl8168_mdio_write(tp, 0x14, 0x08DF); + rtl8168_mdio_write(tp, 0x13, 0x87F3); + rtl8168_mdio_write(tp, 0x14, 0x0C79); + rtl8168_mdio_write(tp, 0x13, 0x87F5); + rtl8168_mdio_write(tp, 0x14, 0x0D93); + rtl8168_mdio_write(tp, 0x13, 0x87F9); + rtl8168_mdio_write(tp, 0x14, 0x0010); + rtl8168_mdio_write(tp, 0x13, 0x87FB); + rtl8168_mdio_write(tp, 0x14, 0x0800); + rtl8168_mdio_write(tp, 0x13, 0x8015); + ClearAndSetEthPhyBit(tp, + 0x14, + 0x7000, + 0x7000); + + + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_mdio_write(tp, 0x13, 0x8111); + ClearAndSetEthPhyBit(tp, + 0x14, + 0xFF00, + 0x7C00); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8168_mdio_write(tp, 0x1F, 0x0A43); + rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 ); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + } + } } #ifdef ENABLE_FIBER_SUPPORT if (HW_FIBER_MODE_ENABLED(tp)) - rtl8168_hw_fiber_phy_config(dev); + rtl8168_hw_fiber_phy_config(tp); #endif //ENABLE_FIBER_SUPPORT //EthPhyPPSW @@ -23822,7 +24443,8 @@ rtl8168_mdio_write(tp, 0x1F, 0x0000); } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { //enable EthPhyPPSW rtl8168_mdio_write(tp, 0x1F, 0x0A44); rtl8168_set_eth_phy_bit( tp, 0x11, BIT_7 ); @@ -23834,7 +24456,8 @@ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { if (aspm) rtl8168_enable_ocp_phy_power_saving(dev); } @@ -23937,6 +24560,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: tp->bios_setting = RTL_R32(tp, 0x8c); break; } @@ -23973,6 +24598,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: RTL_W32(tp, 0x8C, tp->bios_setting); break; } @@ -23986,6 +24613,9 @@ rtl8168_get_bios_setting(dev); + tp->num_rx_desc = NUM_RX_DESC; + tp->num_tx_desc = NUM_TX_DESC; + switch (tp->mcfg) { case CFG_METHOD_11: case CFG_METHOD_12: @@ -24000,6 +24630,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: tp->HwSuppDashVer = 3; break; default: @@ -24011,6 +24642,7 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: tp->HwPkgDet = rtl8168_mac_ocp_read(tp, 0xDC00); tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x0F; break; @@ -24033,6 +24665,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: tp->HwSuppNowIsOobVer = 1; break; } @@ -24051,14 +24685,29 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: tp->HwSuppPhyOcpVer = 1; break; } switch (tp->mcfg) { + case CFG_METHOD_29: + case CFG_METHOD_30: + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: + tp->HwSuppUpsVer = 1; + break; + } + + switch (tp->mcfg) { case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: tp->HwPcieSNOffset = 0x16C; break; case CFG_METHOD_DEFAULT: @@ -24069,6 +24718,36 @@ break; } + switch (tp->mcfg) { + case CFG_METHOD_14: + case CFG_METHOD_15: + case CFG_METHOD_16: + case CFG_METHOD_17: + case CFG_METHOD_18: + case CFG_METHOD_19: + case CFG_METHOD_20: + case CFG_METHOD_21: + case CFG_METHOD_22: + case CFG_METHOD_23: + case CFG_METHOD_24: + case CFG_METHOD_25: + case CFG_METHOD_26: + case CFG_METHOD_27: + case CFG_METHOD_28: + case CFG_METHOD_29: + case CFG_METHOD_30: + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: + tp->HwSuppAspmClkIntrLock = 1; + break; + } + + if (!aspm || !tp->HwSuppAspmClkIntrLock) + dynamic_aspm = 0; + #ifdef ENABLE_REALWOW_SUPPORT rtl8168_get_realwow_hw_version(dev); #endif //ENABLE_REALWOW_SUPPORT @@ -24102,6 +24781,8 @@ tp->mapped_cmac_ioaddr = cmac_ioaddr; } } + + eee_enable = 0; } #ifdef ENABLE_DASH_SUPPORT @@ -24163,6 +24844,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: tp->org_pci_offset_99 = rtl8168_csi_fun0_read_byte(tp, 0x99); tp->org_pci_offset_99 &= ~(BIT_5|BIT_6); break; @@ -24175,14 +24858,33 @@ case CFG_METHOD_28: case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x180); break; case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214); break; } + + switch (tp->mcfg) { + case CFG_METHOD_21: + case CFG_METHOD_22: + case CFG_METHOD_23: + case CFG_METHOD_24: + case CFG_METHOD_25: + case CFG_METHOD_27: + case CFG_METHOD_28: + case CFG_METHOD_31: + case CFG_METHOD_32: + case CFG_METHOD_33: + case CFG_METHOD_34: + if (tp->org_pci_offset_99 & BIT_2) + tp->issue_offset_99_event = TRUE; + break; + } } pci_read_config_byte(pdev, 0x80, &tp->org_pci_offset_80); @@ -24262,7 +24964,8 @@ case CFG_METHOD_30: case CFG_METHOD_31: case CFG_METHOD_32: - case CFG_METHOD_33: { + case CFG_METHOD_33: + case CFG_METHOD_34: { u16 rg_saw_cnt; rtl8168_mdio_write(tp, 0x1F, 0x0C42); @@ -24270,7 +24973,7 @@ rg_saw_cnt &= ~(BIT_15|BIT_14); rtl8168_mdio_write(tp, 0x1F, 0x0000); - if ( rg_saw_cnt > 0) { + if (rg_saw_cnt > 0) { tp->SwrCnt1msIni = 16000000/rg_saw_cnt; tp->SwrCnt1msIni &= 0x0FFF; @@ -24281,12 +24984,13 @@ } #ifdef ENABLE_FIBER_SUPPORT - rtl8168_check_hw_fiber_mode_support(dev); + rtl8168_check_hw_fiber_mode_support(tp); #endif //ENABLE_FIBER_SUPPORT switch(tp->mcfg) { case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: if (tp->HwPkgDet == 0x06) { u8 tmpUchar = rtl8168_eri_read(tp, 0xE6, 1, ERIAR_ExGMAC); if (tmpUchar == 0x02) @@ -24304,6 +25008,10 @@ hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE; } +#ifdef CONFIG_CTAP_SHORT_OFF + hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE; +#endif //CONFIG_CTAP_SHORT_OFF + if (hwoptimize & HW_PATCH_SAMSUNG_LAN_DONGLE) { switch (tp->mcfg) { case CFG_METHOD_14: @@ -24337,6 +25045,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V2; break; case CFG_METHOD_DEFAULT: @@ -24348,6 +25058,31 @@ } switch (tp->mcfg) { + case CFG_METHOD_29: + case CFG_METHOD_30: + tp->HwSuppEsdVer = 2; + break; + case CFG_METHOD_35: + tp->HwSuppEsdVer = 3; + break; + default: + tp->HwSuppEsdVer = 1; + break; + } + + if (tp->HwSuppEsdVer == 2 || + tp->HwSuppEsdVer == 3) { + rtl8168_mdio_write(tp, 0x1F, 0x0A46); + tp->BackupPhyFuseDout_15_0 = rtl8168_mdio_read(tp, 0x10); + tp->BackupPhyFuseDout_31_16 = rtl8168_mdio_read(tp, 0x11); + tp->BackupPhyFuseDout_47_32 = rtl8168_mdio_read(tp, 0x12); + tp->BackupPhyFuseDout_63_48 = rtl8168_mdio_read(tp, 0x13); + rtl8168_mdio_write(tp, 0x1F, 0x0000); + + tp->TestPhyOcpReg = TRUE; + } + + switch (tp->mcfg) { case CFG_METHOD_16: case CFG_METHOD_17: tp->HwSuppCheckPhyDisableModeVer = 1; @@ -24361,6 +25096,7 @@ case CFG_METHOD_26: case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: tp->HwSuppCheckPhyDisableModeVer = 2; break; case CFG_METHOD_23: @@ -24369,29 +25105,12 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: tp->HwSuppCheckPhyDisableModeVer = 3; break; } switch (tp->mcfg) { - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: - tp->HwSuppGigaForceMode = TRUE; - break; - } - - switch (tp->mcfg) { case CFG_METHOD_14: case CFG_METHOD_15: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_14; @@ -24432,8 +25151,12 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31; break; + case CFG_METHOD_35: + tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_35; + break; } if (tp->HwIcVerUnknown) { @@ -24451,11 +25174,12 @@ tp->speed = speed_mode; tp->duplex = duplex_mode; tp->advertising = advertising_mode; + tp->fcpause = rtl8168_fc_full; tp->max_jumbo_frame_size = rtl_chip_infotp->chipset.jumbo_frame_sz; #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) /* MTU range: 60 - hw-specific max */ - dev->min_mtu = ETH_ZLEN; + dev->min_mtu = ETH_MIN_MTU; dev->max_mtu = tp->max_jumbo_frame_size; #endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) tp->eee_enabled = eee_enable; @@ -24463,7 +25187,7 @@ #ifdef ENABLE_FIBER_SUPPORT if (HW_FIBER_MODE_ENABLED(tp)) - rtl8168_set_fiber_mode_software_variable(dev); + rtl8168_set_fiber_mode_software_variable(tp); #endif //ENABLE_FIBER_SUPPORT } @@ -24491,10 +25215,21 @@ iounmap(ioaddr); pci_release_regions(pdev); + pci_clear_mwi(pdev); pci_disable_device(pdev); free_netdev(dev); } +static void +rtl8168_hw_address_set(struct net_device *dev, u8 mac_addrMAC_ADDR_LEN) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) + eth_hw_addr_set(dev, mac_addr); +#else + memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN); +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +} + static int rtl8168_get_mac_address(struct net_device *dev) { @@ -24520,7 +25255,9 @@ tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || + tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { *(u32*)&mac_addr0 = rtl8168_eri_read(tp, 0xE0, 4, ERIAR_ExGMAC); *(u16*)&mac_addr4 = rtl8168_eri_read(tp, 0xE4, 2, ERIAR_ExGMAC); } else { @@ -24544,7 +25281,9 @@ tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || + tp->mcfg == CFG_METHOD_34 || + tp->mcfg == CFG_METHOD_35) { *pUshort++ = rtl8168_eeprom_read_sc(tp, 1); *pUshort++ = rtl8168_eeprom_read_sc(tp, 2); *pUshort = rtl8168_eeprom_read_sc(tp, 3); @@ -24559,24 +25298,21 @@ if (!is_valid_ether_addr(mac_addr)) { netif_err(tp, probe, dev, "Invalid ether addr %pM\n", mac_addr); - eth_hw_addr_random(dev); - ether_addr_copy(mac_addr, dev->dev_addr); + eth_random_addr(mac_addr); + dev->addr_assign_type = NET_ADDR_RANDOM; netif_info(tp, probe, dev, "Random ether addr %pM\n", mac_addr); tp->random_mac = 1; } + rtl8168_hw_address_set(dev, mac_addr); rtl8168_rar_set(tp, mac_addr); - for (i = 0; i < MAC_ADDR_LEN; i++) { - dev->dev_addri = RTL_R8(tp, MAC0 + i); - tp->org_mac_addri = dev->dev_addri; /* keep the original MAC address */ - } + /* keep the original MAC address */ + memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN); #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); #endif -// memcpy(dev->dev_addr, dev->dev_addr, dev->addr_len); - return 0; } @@ -24600,7 +25336,7 @@ spin_lock_irqsave(&tp->lock, flags); - memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); + rtl8168_hw_address_set(dev, addr->sa_data); rtl8168_rar_set(tp, dev->dev_addr); @@ -24617,7 +25353,7 @@ *****************************************************************************/ void rtl8168_rar_set(struct rtl8168_private *tp, - uint8_t *addr) + const u8 *addr) { uint32_t rar_low = 0; uint32_t rar_high = 0; @@ -25310,6 +26046,72 @@ } #endif //ETHTOOL_OPS_COMPAT +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0) +static int rtl8168_siocdevprivate(struct net_device *dev, struct ifreq *ifr, + void __user *data, int cmd) +{ + struct rtl8168_private *tp = netdev_priv(dev); + int ret = 0; + + switch (cmd) { + case SIOCDEVPRIVATE_RTLASF: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + + ret = rtl8168_asf_ioctl(dev, ifr); + break; + +#ifdef ENABLE_DASH_SUPPORT + case SIOCDEVPRIVATE_RTLDASH: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8168_dash_ioctl(dev, ifr); + break; +#endif + +#ifdef ENABLE_REALWOW_SUPPORT + case SIOCDEVPRIVATE_RTLREALWOW: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8168_realwow_ioctl(dev, ifr); + break; +#endif + + case SIOCRTLTOOL: + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8168_tool_ioctl(tp, ifr); + break; + + default: + ret = -EOPNOTSUPP; + } + + return ret; +} +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0) + static int rtl8168_do_ioctl(struct net_device *dev, struct ifreq *ifr, @@ -25378,11 +26180,21 @@ break; } + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + ret = rtl8168_realwow_ioctl(dev, ifr); break; #endif case SIOCRTLTOOL: + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + ret = rtl8168_tool_ioctl(tp, ifr); break; @@ -25432,15 +26244,8 @@ } //wait ups resume (phy state 3) - switch (tp->mcfg) { - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: - rtl8168_wait_phy_ups_resume(dev, 3); - break; - }; + if (HW_SUPPORT_UPS_MODE(tp)) + rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_LAN_ON); } static void @@ -25482,6 +26287,7 @@ case CFG_METHOD_15: case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN); break; case CFG_METHOD_21: @@ -25526,11 +26332,12 @@ tp->dev = dev; tp->msg_enable = netif_msg_init(debug.msg_enable, R8168_MSG_DEFAULT); + if (!aspm || tp->mcfg == CFG_METHOD_9) { #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) - if (!aspm || tp->mcfg == CFG_METHOD_9) pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); #endif + } /* enable device (incl. PCI PM wakeup and hotplug setup) */ rc = pci_enable_device(pdev); @@ -25542,9 +26349,12 @@ goto err_out_free_dev; } - rc = pci_set_mwi(pdev); - if (rc < 0) - goto err_out_disable; + if (pci_set_mwi(pdev) < 0) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_drv(&debug)) + dev_info(&pdev->dev, "Mem-Wr-Inval unavailable.\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + } /* save power state before pci_enable_device overwrites it */ pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); @@ -25607,8 +26417,6 @@ } } - pci_set_master(pdev); - /* ioremap MMIO region */ ioaddr = ioremap(pci_resource_start(pdev, 2), R8168_REGS_SIZE); if (ioaddr == NULL) { @@ -25652,13 +26460,9 @@ err_out_free_res: pci_release_regions(pdev); - err_out_mwi: pci_clear_mwi(pdev); - -err_out_disable: pci_disable_device(pdev); - err_out_free_dev: free_netdev(dev); err_out: @@ -25711,6 +26515,12 @@ printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd); pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd); tp->esd_flag |= BIT_0; + + pci_read_config_byte(pdev, PCI_COMMAND, &cmd); + if (cmd == 0xff) { + printk(KERN_ERR "%s: pci link is down \n.", dev->name); + goto out_unlock; + } } pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l); @@ -25813,6 +26623,9 @@ } } + if (tp->TestPhyOcpReg && rtl8168_test_phy_ocp(tp)) + tp->esd_flag |= BIT_15; + if (tp->esd_flag != 0) { printk(KERN_ERR "%s: esd_flag = 0x%04x\n.\n", dev->name, tp->esd_flag); netif_stop_queue(dev); @@ -25829,6 +26642,8 @@ rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); tp->esd_flag = 0; } + +out_unlock: spin_unlock_irqrestore(&tp->lock, flags); mod_timer(timer, jiffies + timeout); @@ -25907,7 +26722,12 @@ .ndo_tx_timeout = rtl8168_tx_timeout, .ndo_change_mtu = rtl8168_change_mtu, .ndo_set_mac_address = rtl8168_set_mac_address, +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0) .ndo_do_ioctl = rtl8168_do_ioctl, +#else + .ndo_siocdevprivate = rtl8168_siocdevprivate, + .ndo_eth_ioctl = rtl8168_do_ioctl, +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0) #if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) .ndo_set_multicast_list = rtl8168_set_rx_mode, #else @@ -25985,19 +26805,24 @@ } #endif + /* There has been a number of reports that using SG/TSO results in + * tx timeouts. However for a lot of people SG/TSO works fine. + * Therefore disable both features by default, but allow users to + * enable them. Use at own risk! + */ tp->cp_cmd |= RTL_R16(tp, CPlusCmd); if (tp->mcfg != CFG_METHOD_DEFAULT) { dev->features |= NETIF_F_IP_CSUM; #if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) tp->cp_cmd |= RxChkSum; #else - dev->features |= NETIF_F_RXCSUM | NETIF_F_SG; + dev->features |= NETIF_F_RXCSUM; dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_HIGHDMA; if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) { - dev->features |= NETIF_F_TSO; + //dev->features |= NETIF_F_TSO; dev->hw_features |= NETIF_F_TSO; dev->vlan_features |= NETIF_F_TSO; } @@ -26021,7 +26846,7 @@ dev->features |= NETIF_F_IPV6_CSUM; if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) { dev->hw_features |= NETIF_F_TSO6; - dev->features |= NETIF_F_TSO6; + //dev->features |= NETIF_F_TSO6; } netif_set_gso_max_size(dev, LSO_64K); #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0) @@ -26055,7 +26880,8 @@ /* Get production from EEPROM */ if (((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_29 || - tp->mcfg == CFG_METHOD_30) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) || + tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35) && + (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) || ((tp->mcfg == CFG_METHOD_26) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_4))) tp->eeprom_type = EEPROM_TYPE_NONE; else @@ -26066,6 +26892,8 @@ rtl8168_get_mac_address(dev); + tp->fw_name = rtl_chip_fw_infostp->mcfg.fw_name; + #if defined(ENABLE_DASH_PRINTER_SUPPORT) init_completion(&tp->fw_host_ok); init_completion(&tp->fw_ack); @@ -26142,6 +26970,11 @@ } rtl8168_release_board(pdev, dev); + +#ifdef ENABLE_USE_FIRMWARE_FILE + rtl8168_release_firmware(tp); +#endif + pci_set_drvdata(pdev, NULL); } @@ -26154,6 +26987,33 @@ tp->rx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 + 1 : RX_BUF_SIZE; } +#ifdef ENABLE_USE_FIRMWARE_FILE +static void rtl8168_request_firmware(struct rtl8168_private *tp) +{ + struct rtl8168_fw *rtl_fw; + + /* firmware loaded already or no firmware available */ + if (tp->rtl_fw || !tp->fw_name) + return; + + rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL); + if (!rtl_fw) + return; + + rtl_fw->phy_write = rtl8168_mdio_write; + rtl_fw->phy_read = rtl8168_mdio_read; + rtl_fw->mac_mcu_write = mac_mcu_write; + rtl_fw->mac_mcu_read = mac_mcu_read; + rtl_fw->fw_name = tp->fw_name; + rtl_fw->dev = tp_to_dev(tp); + + if (rtl8168_fw_request_firmware(rtl_fw)) + kfree(rtl_fw); + else + tp->rtl_fw = rtl_fw; +} +#endif + static int rtl8168_open(struct net_device *dev) { struct rtl8168_private *tp = netdev_priv(dev); @@ -26168,32 +27028,29 @@ #endif rtl8168_set_rxbufsize(tp, dev); /* - * Rx and Tx descriptors needs 256 bytes alignment. - * pci_alloc_consistent provides more. - */ - tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8168_TX_RING_BYTES, + * Rx and Tx descriptors needs 256 bytes alignment. + * pci_alloc_consistent provides more. + */ + tp->TxDescArray = dma_alloc_coherent(&pdev->dev, + (tp->num_tx_desc * sizeof(struct TxDesc)), &tp->TxPhyAddr, GFP_KERNEL); if (!tp->TxDescArray) goto err_free_all_allocated_mem; - tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8168_RX_RING_BYTES, + tp->RxDescArray = dma_alloc_coherent(&pdev->dev, + (tp->num_rx_desc * sizeof(struct RxDesc)), &tp->RxPhyAddr, GFP_KERNEL); if (!tp->RxDescArray) goto err_free_all_allocated_mem; - if (tp->UseSwPaddingShortPkt) { - tp->ShortPacketEmptyBuffer = dma_alloc_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE, - &tp->ShortPacketEmptyBufferPhy, GFP_KERNEL); - if (!tp->ShortPacketEmptyBuffer) - goto err_free_all_allocated_mem; - - memset(tp->ShortPacketEmptyBuffer, 0x0, SHORT_PACKET_PADDING_BUF_SIZE); - } - retval = rtl8168_init_ring(dev); if (retval < 0) goto err_free_all_allocated_mem; + retval = request_irq(dev->irq, rtl8168_interrupt, (tp->features & RTL_FEATURE_MSI) ? 0 : SA_SHIRQ, dev->name, dev); + if (retval<0) + goto err_free_all_allocated_mem; + if (netif_msg_probe(tp)) { printk(KERN_INFO "%s: 0x%lx, " "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " @@ -26205,12 +27062,18 @@ dev->dev_addr4, dev->dev_addr5, dev->irq); } +#ifdef ENABLE_USE_FIRMWARE_FILE + rtl8168_request_firmware(tp); +#endif + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) - INIT_WORK(&tp->task, NULL, dev); + INIT_WORK(&tp->task, rtl8168_reset_task, dev); #else - INIT_DELAYED_WORK(&tp->task, NULL); + INIT_DELAYED_WORK(&tp->task, rtl8168_reset_task); #endif + pci_set_master(pdev); + #ifdef CONFIG_R8168_NAPI #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) RTL_NAPI_ENABLE(dev, &tp->napi); @@ -26238,10 +27101,6 @@ spin_unlock_irqrestore(&tp->lock, flags); - retval = request_irq(dev->irq, rtl8168_interrupt, (tp->features & RTL_FEATURE_MSI) ? 0 : SA_SHIRQ, dev->name, dev); - if (retval<0) - goto err_free_all_allocated_mem; - if (tp->esd_flag == 0) rtl8168_request_esd_timer(dev); @@ -26253,23 +27112,21 @@ err_free_all_allocated_mem: if (tp->RxDescArray != NULL) { - dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray, + dma_free_coherent(&pdev->dev, + (tp->num_rx_desc * sizeof(struct RxDesc)), + tp->RxDescArray, tp->RxPhyAddr); tp->RxDescArray = NULL; } if (tp->TxDescArray != NULL) { - dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray, + dma_free_coherent(&pdev->dev, + (tp->num_tx_desc * sizeof(struct TxDesc)), + tp->TxDescArray, tp->TxPhyAddr); tp->TxDescArray = NULL; } - if (tp->ShortPacketEmptyBuffer != NULL) { - dma_free_coherent(&pdev->dev, ETH_ZLEN, tp->ShortPacketEmptyBuffer, - tp->ShortPacketEmptyBufferPhy); - tp->ShortPacketEmptyBuffer = NULL; - } - goto out; } @@ -26449,31 +27306,9 @@ rtl8168_hw_reset(dev); rtl8168_enable_cfg9346_write(tp); - switch (tp->mcfg) { - case CFG_METHOD_14: - case CFG_METHOD_15: - case CFG_METHOD_16: - case CFG_METHOD_17: - case CFG_METHOD_18: - case CFG_METHOD_19: - case CFG_METHOD_20: - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: + if (tp->HwSuppAspmClkIntrLock) { RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); - RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); - RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); - break; + rtl8168_hw_aspm_clkreq_enable(tp, false); } //clear io_rdy_l23 @@ -26492,6 +27327,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1); break; } @@ -26516,6 +27353,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC); csi_tmp &= BIT_0; rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC); @@ -26772,8 +27611,10 @@ RTL_W8(tp, TDFNR, 0x8); + /* if (aspm) - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + */ RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_3); @@ -26788,9 +27629,6 @@ rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC); - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); csi_tmp = rtl8168_eri_read(tp, 0x1D0, 4, ERIAR_ExGMAC); csi_tmp |= BIT_1; rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC); @@ -26844,8 +27682,10 @@ csi_tmp |= BIT_0; rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC); + /* if (aspm) - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + */ if (dev->mtu > ETH_DATA_LEN) RTL_W8(tp, MTPS, 0x27); @@ -26857,9 +27697,6 @@ rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC); - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); RTL_W8(tp, 0x1B,RTL_R8(tp, 0x1B) & ~0x07); csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC); @@ -26884,8 +27721,10 @@ csi_tmp |= BIT_0; rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC); + /* if (aspm) - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + */ if (dev->mtu > ETH_DATA_LEN) RTL_W8(tp, MTPS, 0x27); @@ -26896,9 +27735,6 @@ RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6); rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC); - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= BIT_10 | BIT_11; - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC); csi_tmp |= BIT_4; @@ -26911,7 +27747,7 @@ } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_29 || - tp->mcfg == CFG_METHOD_30) { + tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35) { set_offset70F(tp, 0x27); set_offset79(tp, 0x50); if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22) @@ -26930,10 +27766,13 @@ csi_tmp |= BIT_0; rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC); + if (tp->mcfg == CFG_METHOD_35) + rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0)); + if (tp->mcfg == CFG_METHOD_26) { mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0); mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0); - mac_ocp_data |= 0x03A9; + mac_ocp_data |= 0x0FFF; rtl8168_mac_ocp_write(tp, 0xD3C0, mac_ocp_data); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C2); mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0); @@ -26941,7 +27780,8 @@ mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C4); mac_ocp_data |= BIT_0; rtl8168_mac_ocp_write(tp, 0xD3C4, mac_ocp_data); - } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { + } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || + tp->mcfg == CFG_METHOD_35) { if (tp->RequireAdjustUpsTxLinkPulseTiming) { mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412); @@ -26952,18 +27792,18 @@ mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056); mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4); - mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4); + //mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4); rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052); - mac_ocp_data &= ~( BIT_14 | BIT_13); + mac_ocp_data &= ~(BIT_15 | BIT_14 | BIT_13 | BIT_3); mac_ocp_data |= BIT_15; - mac_ocp_data |= BIT_3; + //mac_ocp_data |= BIT_3; rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420); mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0); - mac_ocp_data |= 0x47F; + mac_ocp_data |= 0x45F; rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE0D6); @@ -26980,8 +27820,10 @@ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En); + /* if (aspm) - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + */ if (dev->mtu > ETH_DATA_LEN) RTL_W8(tp, MTPS, 0x27); @@ -26994,29 +27836,27 @@ rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC); rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC); - if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) - rtl8168_mac_ocp_write(tp, 0xE054, 0xFC01); - - rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC); + if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || + tp->mcfg == CFG_METHOD_35) { + rtl8168_mac_ocp_write(tp, 0xE054, 0x0000); - if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC); + } else { + rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC); + } + if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || + tp->mcfg == CFG_METHOD_35) { csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC); csi_tmp |= (BIT_2 | BIT_3 | BIT_4); rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC); - } else { - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); } if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25) { rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF); - } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { + } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || + tp->mcfg == CFG_METHOD_35) { rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF); rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF); } @@ -27025,7 +27865,8 @@ csi_tmp &= ~BIT_12; rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC); - if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { + if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 || + tp->mcfg == CFG_METHOD_35) { csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC); csi_tmp &= ~(BIT_2); rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC); @@ -27070,8 +27911,10 @@ RTL_W8(tp, TDFNR, 0x4); + /* if (aspm) - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + */ csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC); csi_tmp &= ~BIT_12; @@ -27079,7 +27922,7 @@ csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC); csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2); - csi_tmp |= BIT_0; + csi_tmp |= (BIT_0 | BIT_1); rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC); csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC); @@ -27095,17 +27938,13 @@ rtl8168_oob_mutex_unlock(tp); } - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= ( BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12 ); - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); - rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF); rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF); if (tp->mcfg == CFG_METHOD_28) { mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E2); mac_ocp_data &= 0xF000; - mac_ocp_data |= 0x3A9; + mac_ocp_data |= 0xAFD; rtl8168_mac_ocp_write(tp, 0xD3E2, mac_ocp_data); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E4); @@ -27117,7 +27956,7 @@ rtl8168_mac_ocp_write(tp, 0xE860, mac_ocp_data); } } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 || - tp->mcfg == CFG_METHOD_33) { + tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) { set_offset70F(tp, 0x27); set_offset79(tp, 0x50); @@ -27143,10 +27982,10 @@ mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056); mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4); - if (FALSE == HW_SUPP_SERDES_PHY(tp)) + if (tp->HwPkgDet == 0x0F) mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4); rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data); - if (FALSE == HW_SUPP_SERDES_PHY(tp)) + if (tp->HwPkgDet == 0x0F) rtl8168_mac_ocp_write(tp, 0xEA80, 0x0003); else rtl8168_mac_ocp_write(tp, 0xEA80, 0x0000); @@ -27154,17 +27993,14 @@ rtl8168_oob_mutex_lock(tp); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052); mac_ocp_data &= ~(BIT_3 | BIT_0); - if (FALSE == HW_SUPP_SERDES_PHY(tp)) { + if (tp->HwPkgDet == 0x0F) mac_ocp_data |= BIT_0; - if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) - mac_ocp_data |= BIT_3; - } rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data); rtl8168_oob_mutex_unlock(tp); mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420); mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0); - mac_ocp_data |= 0x47F; + mac_ocp_data |= 0x45F; rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data); RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); @@ -27175,8 +28011,10 @@ RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En); + /* if (aspm) - RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + */ if (dev->mtu > ETH_DATA_LEN) RTL_W8(tp, MTPS, 0x27); @@ -27195,17 +28033,18 @@ rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC); rtl8168_oob_mutex_lock(tp); - if (FALSE == HW_SUPP_SERDES_PHY(tp)) - rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC); + if (tp->HwPkgDet == 0x0F) + rtl8168_eri_write(tp, 0x5F0, 2, 0x4F00, ERIAR_ExGMAC); else - rtl8168_eri_write(tp, 0x5F0, 2, 0x4080, ERIAR_ExGMAC); + rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC); rtl8168_oob_mutex_unlock(tp); - csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); - csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12); - if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33) - csi_tmp|= BIT_4; - rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 || + tp->mcfg == CFG_METHOD_34) { + csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC); + csi_tmp |= BIT_4; + rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC); + } rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF); rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF); @@ -27317,6 +28156,8 @@ rtl8168_hw_clear_timer_int(dev); + rtl8168_enable_exit_l1_mask(tp); + switch (tp->mcfg) { case CFG_METHOD_25: rtl8168_mac_ocp_write(tp, 0xD3C0, 0x0B00); @@ -27324,11 +28165,13 @@ break; case CFG_METHOD_29: case CFG_METHOD_30: + case CFG_METHOD_35: rtl8168_mac_ocp_write(tp, 0xE098, 0x0AA2); break; case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: rtl8168_mac_ocp_write(tp, 0xE098, 0xC302); break; } @@ -27347,6 +28190,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: if (aspm) { rtl8168_init_pci_offset_99(tp); } @@ -27363,6 +28208,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: if (aspm) { rtl8168_init_pci_offset_180(tp); } @@ -27397,7 +28244,9 @@ case CFG_METHOD_30: case CFG_METHOD_31: case CFG_METHOD_32: - case CFG_METHOD_33: { + case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: { int timeout; for (timeout = 0; timeout < 10; timeout++) { if ((rtl8168_eri_read(tp, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0) @@ -27448,36 +28297,8 @@ NICChkTypeEnableDashInterrupt(tp); #endif - switch (tp->mcfg) { - case CFG_METHOD_14: - case CFG_METHOD_15: - case CFG_METHOD_16: - case CFG_METHOD_17: - case CFG_METHOD_18: - case CFG_METHOD_19: - case CFG_METHOD_20: - case CFG_METHOD_21: - case CFG_METHOD_22: - case CFG_METHOD_23: - case CFG_METHOD_24: - case CFG_METHOD_25: - case CFG_METHOD_26: - case CFG_METHOD_27: - case CFG_METHOD_28: - case CFG_METHOD_29: - case CFG_METHOD_30: - case CFG_METHOD_31: - case CFG_METHOD_32: - case CFG_METHOD_33: - if (aspm) { - RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0); - RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7); - } else { - RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); - RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); - } - break; - } + if (tp->HwSuppAspmClkIntrLock) + rtl8168_hw_aspm_clkreq_enable(tp, true); rtl8168_disable_cfg9346_write(tp); @@ -27494,7 +28315,6 @@ rtl8168_enable_hw_interrupt(tp); } - static int rtl8168_change_mtu(struct net_device *dev, int new_mtu) @@ -27504,7 +28324,7 @@ unsigned long flags; #if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0) - if (new_mtu < ETH_ZLEN) + if (new_mtu < ETH_MIN_MTU) return -EINVAL; else if (new_mtu > tp->max_jumbo_frame_size) new_mtu = tp->max_jumbo_frame_size; @@ -27539,10 +28359,11 @@ netif_stop_queue(dev); netif_carrier_off(dev); rtl8168_hw_config(dev); - spin_unlock_irqrestore(&tp->lock, flags); rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + spin_unlock_irqrestore(&tp->lock, flags); + mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT); mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT); out: @@ -27615,9 +28436,9 @@ skb_reserve(skb, RTK_RX_ALIGN); - mapping = dma_map_single(&tp->pci_dev->dev, skb->data, rx_buf_sz, + mapping = dma_map_single(tp_to_dev(tp), skb->data, rx_buf_sz, DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { + if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) { if (unlikely(net_ratelimit())) netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n"); goto err_out; @@ -27641,7 +28462,7 @@ { int i; - for (i = 0; i < NUM_RX_DESC; i++) { + for (i = 0; i < tp->num_rx_desc; i++) { if (tp->Rx_skbuffi) rtl8168_free_rx_skb(tp, tp->Rx_skbuff + i, tp->RxDescArray + i); @@ -27658,7 +28479,7 @@ u32 cur; for (cur = start; end - cur > 0; cur++) { - int ret, i = cur % NUM_RX_DESC; + int ret, i = cur % tp->num_rx_desc; if (tp->Rx_skbuffi) continue; @@ -27696,10 +28517,10 @@ { int i = 0; - memset(tp->TxDescArray, 0x0, NUM_TX_DESC * sizeof(struct TxDesc)); + memset(tp->TxDescArray, 0x0, tp->num_tx_desc * sizeof(struct TxDesc)); - for (i = 0; i < NUM_TX_DESC; i++) { - if (i == (NUM_TX_DESC - 1)) + for (i = 0; i < tp->num_tx_desc; i++) { + if (i == (tp->num_tx_desc - 1)) tp->TxDescArrayi.opts1 = cpu_to_le32(RingEnd); } } @@ -27710,11 +28531,13 @@ int i = 0; int ownbit = 0; + if (tp->RxDescArray == NULL) return; + if (own) ownbit = DescOwn; - for (i = 0; i < NUM_RX_DESC; i++) { - if (i == (NUM_RX_DESC - 1)) + for (i = 0; i < tp->num_rx_desc; i++) { + if (i == (tp->num_rx_desc - 1)) tp->RxDescArrayi.opts1 = cpu_to_le32((ownbit | RingEnd) | (unsigned long)tp->rx_buf_sz); else tp->RxDescArrayi.opts1 = cpu_to_le32(ownbit | (unsigned long)tp->rx_buf_sz); @@ -27724,7 +28547,7 @@ static void rtl8168_rx_desc_init(struct rtl8168_private *tp) { - memset(tp->RxDescArray, 0x0, NUM_RX_DESC * sizeof(struct RxDesc)); + memset(tp->RxDescArray, 0x0, tp->num_rx_desc * sizeof(struct RxDesc)); } static int @@ -27734,16 +28557,16 @@ rtl8168_init_ring_indexes(tp); - memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info)); - memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *)); + memset(tp->tx_skb, 0x0, sizeof(tp->tx_skb)); + memset(tp->Rx_skbuff, 0x0, sizeof(tp->Rx_skbuff)); rtl8168_tx_desc_init(tp); rtl8168_rx_desc_init(tp); - if (rtl8168_rx_fill(tp, dev, 0, NUM_RX_DESC, 0) != NUM_RX_DESC) + if (rtl8168_rx_fill(tp, dev, 0, tp->num_rx_desc, 0) != tp->num_rx_desc) goto err_out; - rtl8168_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1); + rtl8168_mark_as_last_descriptor(tp->RxDescArray + tp->num_rx_desc - 1); return 0; @@ -27776,7 +28599,7 @@ #endif for (i = 0; i < n; i++) { - unsigned int entry = (start + i) % NUM_TX_DESC; + unsigned int entry = (start + i) % tp->num_tx_desc; struct ring_info *tx_skb = tp->tx_skb + entry; unsigned int len = tx_skb->len; @@ -27797,7 +28620,7 @@ static void rtl8168_tx_clear(struct rtl8168_private *tp) { - rtl8168_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC); + rtl8168_tx_clear_range(tp, tp->dirty_tx, tp->num_tx_desc); tp->cur_tx = tp->dirty_tx = 0; } @@ -27834,29 +28657,6 @@ } #endif -static void -rtl8168_wait_for_quiescence(struct net_device *dev) -{ - struct rtl8168_private *tp = netdev_priv(dev); - - synchronize_irq(dev->irq); - - /* Wait for any pending NAPI task to complete */ -#ifdef CONFIG_R8168_NAPI -#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) - RTL_NAPI_DISABLE(dev, &tp->napi); -#endif -#endif//CONFIG_R8168_NAPI - - rtl8168_irq_mask_and_ack(tp); - -#ifdef CONFIG_R8168_NAPI -#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) - RTL_NAPI_ENABLE(dev, &tp->napi); -#endif -#endif//CONFIG_R8168_NAPI -} - #if 0 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) static void rtl8168_reinit_task(void *_data) @@ -27965,11 +28765,14 @@ } static u32 -rtl8168_get_txd_opts1(u32 opts1, u32 len, unsigned int entry) +rtl8168_get_txd_opts1(struct rtl8168_private *tp, + u32 opts1, + u32 len, + unsigned int entry) { u32 status = opts1 | len; - if (entry == NUM_TX_DESC - 1) + if (entry == tp->num_tx_desc - 1) status |= RingEnd; return status; @@ -27978,8 +28781,7 @@ static int rtl8168_xmit_frags(struct rtl8168_private *tp, struct sk_buff *skb, - u32 opts1, - u32 opts2) + const u32 *opts) { struct skb_shared_info *info = skb_shinfo(skb); unsigned int cur_frag, entry; @@ -27993,7 +28795,7 @@ u32 status, len; void *addr; - entry = (entry + 1) % NUM_TX_DESC; + entry = (entry + 1) % tp->num_tx_desc; txd = tp->TxDescArray + entry; #if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) @@ -28003,9 +28805,9 @@ len = skb_frag_size(frag); addr = skb_frag_address(frag); #endif - mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE); + mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { + if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) { if (unlikely(net_ratelimit())) netif_err(tp, drv, tp->dev, "Failed to map TX fragments DMA!\n"); @@ -28013,7 +28815,7 @@ } /* anti gcc 2.95.3 bugware (sic) */ - status = rtl8168_get_txd_opts1(opts1, len, entry); + status = rtl8168_get_txd_opts1(tp, opts0, len, entry); if (cur_frag == (nr_frags - 1)) { tp->tx_skbentry.skb = skb; status |= LastFrag; @@ -28023,7 +28825,7 @@ tp->tx_skbentry.len = len; - txd->opts2 = cpu_to_le32(opts2); + txd->opts2 = cpu_to_le32(opts1); wmb(); txd->opts1 = cpu_to_le32(status); } @@ -28038,6 +28840,9 @@ static inline __be16 get_protocol(struct sk_buff *skb) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37) + return vlan_get_protocol(skb); +#else __be16 protocol; if (skb->protocol == htons(ETH_P_8021Q)) @@ -28046,11 +28851,25 @@ protocol = skb->protocol; return protocol; +#endif } -static inline u32 +static bool rtl8168_skb_pad(struct sk_buff *skb) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) + if (skb_padto(skb, ETH_ZLEN)) + return false; + skb_put(skb, ETH_ZLEN - skb->len); + return true; +#else + return !eth_skb_pad(skb); +#endif +} + +static inline bool rtl8168_tx_csum(struct sk_buff *skb, - struct net_device *dev) + struct net_device *dev, + u32 *opts) { struct rtl8168_private *tp = netdev_priv(dev); u32 csum_cmd = 0; @@ -28107,8 +28926,22 @@ } } - if (tp->ShortPacketSwChecksum && skb->len < 60 && csum_cmd != 0) - sw_calc_csum = TRUE; + if (csum_cmd != 0) { + if (tp->ShortPacketSwChecksum && skb->len < ETH_ZLEN) { + sw_calc_csum = TRUE; + if (!rtl8168_skb_pad(skb)) + return false; + } else { + if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) + opts0 |= csum_cmd; + else + opts1 |= csum_cmd; + } + } + + if (tp->UseSwPaddingShortPkt && skb->len < ETH_ZLEN) + if (!rtl8168_skb_pad(skb)) + return false; if (sw_calc_csum) { #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7) @@ -28118,58 +28951,14 @@ #else skb_checksum_help(skb); #endif - csum_cmd = 0; - } - - return csum_cmd; -} - -static int -rtl8168_sw_padding_short_pkt(struct rtl8168_private *tp, - struct sk_buff *skb, - u32 opts1, - u32 opts2) -{ - unsigned int entry; - dma_addr_t mapping; - u32 status, len; - void *addr; - struct TxDesc *txd = NULL; - int ret = 0; - - if (skb->len >= ETH_ZLEN) - goto out; - - entry = tp->cur_tx; - - entry = (entry + 1) % NUM_TX_DESC; - - txd = tp->TxDescArray + entry; - len = ETH_ZLEN - skb->len; - addr = tp->ShortPacketEmptyBuffer; - mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { - if (unlikely(net_ratelimit())) - netif_err(tp, drv, tp->dev, - "Failed to map Short Packet Buffer DMA!\n"); - ret = -ENOMEM; - goto out; } - status = rtl8168_get_txd_opts1(opts1, len, entry); - status |= LastFrag; - - txd->addr = cpu_to_le64(mapping); - txd->opts2 = cpu_to_le32(opts2); - wmb(); - txd->opts1 = cpu_to_le32(status); -out: - return ret; + return true; } #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0) /* r8169_csum_workaround() - * The hw limites the value the transport offset. When the offset is out of the + * The hw limits the value the transport offset. When the offset is out of the * range, calculate the checksum by sw. */ static void r8168_csum_workaround(struct rtl8168_private *tp, @@ -28234,13 +29023,13 @@ static bool rtl8168_tx_slots_avail(struct rtl8168_private *tp, unsigned int nr_frags) { - unsigned int slots_avail = tp->dirty_tx + NUM_TX_DESC - tp->cur_tx; + unsigned int slots_avail = tp->dirty_tx + tp->num_tx_desc - tp->cur_tx; /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */ return slots_avail > nr_frags; } -static int +static netdev_tx_t rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev) { @@ -28249,9 +29038,8 @@ struct TxDesc *txd; dma_addr_t mapping; u32 len; - u32 opts1; - u32 opts2; - int ret = NETDEV_TX_OK; + u32 opts2; + netdev_tx_t ret = NETDEV_TX_OK; unsigned long flags, large_send; int frags; @@ -28266,7 +29054,7 @@ goto err_stop; } - entry = tp->cur_tx % NUM_TX_DESC; + entry = tp->cur_tx % tp->num_tx_desc; txd = tp->TxDescArray + entry; if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) { @@ -28278,8 +29066,8 @@ goto err_stop; } - opts1 = DescOwn; - opts2 = rtl8168_tx_vlan_tag(tp, skb); + opts0 = DescOwn; + opts1 = rtl8168_tx_vlan_tag(tp, skb); large_send = 0; #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) @@ -28295,16 +29083,16 @@ if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) { - opts1 |= LargeSend | (min(mss, MSS_MAX) << 16); + opts0 |= LargeSend | (min(mss, MSS_MAX) << 16); large_send = 1; } else { u32 transport_offset = (u32)skb_transport_offset(skb); switch (get_protocol(skb)) { case __constant_htons(ETH_P_IP): - if (transport_offset <= 128) { - opts1 |= GiantSendv4; - opts1 |= transport_offset << GTTCPHO_SHIFT; - opts2 |= min(mss, MSS_MAX) << 18; + if (transport_offset <= GTTCPHO_MAX) { + opts0 |= GiantSendv4; + opts0 |= transport_offset << GTTCPHO_SHIFT; + opts1 |= min(mss, MSS_MAX) << 18; large_send = 1; } break; @@ -28316,10 +29104,10 @@ goto out; } #endif - if (transport_offset <= 128) { - opts1 |= GiantSendv6; - opts1 |= transport_offset << GTTCPHO_SHIFT; - opts2 |= min(mss, MSS_MAX) << 18; + if (transport_offset <= GTTCPHO_MAX) { + opts0 |= GiantSendv6; + opts0 |= transport_offset << GTTCPHO_SHIFT; + opts1 |= min(mss, MSS_MAX) << 18; large_send = 1; } break; @@ -28337,47 +29125,36 @@ #endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) if (large_send == 0) { - if (skb->ip_summed == CHECKSUM_PARTIAL) { - if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) - opts1 |= rtl8168_tx_csum(skb, dev); - else - opts2 |= rtl8168_tx_csum(skb, dev); - } + if (unlikely(!rtl8168_tx_csum(skb, dev, opts))) + goto err_dma_0; } - frags = rtl8168_xmit_frags(tp, skb, opts1, opts2); + frags = rtl8168_xmit_frags(tp, skb, opts); if (unlikely(frags < 0)) goto err_dma_0; if (frags) { len = skb_headlen(skb); - opts1 |= FirstFrag; + opts0 |= FirstFrag; } else { len = skb->len; tp->tx_skbentry.skb = skb; - if (tp->UseSwPaddingShortPkt && len < 60) { - if (unlikely(rtl8168_sw_padding_short_pkt(tp, skb, opts1, opts2))) - goto err_dma_1; - opts1 |= FirstFrag; - frags++; - } else { - opts1 |= FirstFrag | LastFrag; - } + opts0 |= FirstFrag | LastFrag; } - opts1 = rtl8168_get_txd_opts1(opts1, len, entry); - mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) { + opts0 = rtl8168_get_txd_opts1(tp, opts0, len, entry); + mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) { if (unlikely(net_ratelimit())) netif_err(tp, drv, dev, "Failed to map TX DMA!\n"); goto err_dma_1; } tp->tx_skbentry.len = len; txd->addr = cpu_to_le64(mapping); - txd->opts2 = cpu_to_le32(opts2); + txd->opts2 = cpu_to_le32(opts1); wmb(); - txd->opts1 = cpu_to_le32(opts1); + txd->opts1 = cpu_to_le32(opts0); #if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) dev->trans_start = jiffies; @@ -28431,9 +29208,10 @@ dirty_tx = tp->dirty_tx; smp_rmb(); tx_left = tp->cur_tx - dirty_tx; + tp->dynamic_aspm_packet_count += tx_left; while (tx_left > 0) { - unsigned int entry = dirty_tx % NUM_TX_DESC; + unsigned int entry = dirty_tx % tp->num_tx_desc; struct ring_info *tx_skb = tp->tx_skb + entry; u32 len = tx_skb->len; u32 status; @@ -28462,6 +29240,8 @@ tx_left--; } + tp->dynamic_aspm_packet_count -= tx_left; + if (tp->dirty_tx != dirty_tx) { tp->dirty_tx = dirty_tx; smp_wmb(); @@ -28573,14 +29353,14 @@ assert(dev != NULL); assert(tp != NULL); - if ((tp->RxDescArray == NULL) || (tp->Rx_skbuff == NULL)) + if (tp->RxDescArray == NULL) goto rx_out; rx_quota = RTL_RX_QUOTA(budget); cur_rx = tp->cur_rx; - entry = cur_rx % NUM_RX_DESC; + entry = cur_rx % tp->num_rx_desc; desc = tp->RxDescArray + entry; - rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx; + rx_left = tp->num_rx_desc + tp->dirty_rx - cur_rx; rx_left = rtl8168_rx_quota(rx_left, (u32)rx_quota); for (; rx_left > 0; rx_left--) { @@ -28629,17 +29409,17 @@ skb = tp->Rx_skbuffentry; - dma_sync_single_for_cpu(&tp->pci_dev->dev, + dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(desc->addr), tp->rx_buf_sz, DMA_FROM_DEVICE); if (rtl8168_try_rx_copy(tp, &skb, pkt_size, desc, tp->rx_buf_sz)) { tp->Rx_skbuffentry = NULL; - dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr), + dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), tp->rx_buf_sz, DMA_FROM_DEVICE); } else { - dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(desc->addr), + dma_sync_single_for_device(tp_to_dev(tp), le64_to_cpu(desc->addr), tp->rx_buf_sz, DMA_FROM_DEVICE); } @@ -28663,7 +29443,7 @@ } cur_rx++; - entry = cur_rx % NUM_RX_DESC; + entry = cur_rx % tp->num_rx_desc; desc = tp->RxDescArray + entry; #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) prefetch(desc); @@ -28678,6 +29458,8 @@ printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name); tp->dirty_rx += delta; + tp->dynamic_aspm_packet_count += delta; + /* * FIXME: until there is periodic timer to try and refill the ring, * a temporary shortage may definitely kill the Rx process. @@ -28685,7 +29467,7 @@ * after refill ? * - how do others driver handle this condition (Uh oh...). */ - if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp)) + if ((tp->dirty_rx + tp->num_rx_desc == tp->cur_rx) && netif_msg_intr(tp)) printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name); rx_out: @@ -28749,6 +29531,8 @@ case CFG_METHOD_31: case CFG_METHOD_32: case CFG_METHOD_33: + case CFG_METHOD_34: + case CFG_METHOD_35: /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/ RTL_W16(tp, IntrStatus, status&~RxFIFOOver); break; @@ -28826,12 +29610,14 @@ if (status & tp->intr_mask) tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; + + rtl8168_tx_interrupt(dev, tp); + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) rtl8168_rx_interrupt(dev, tp, &budget); #else rtl8168_rx_interrupt(dev, tp, budget); #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) - rtl8168_tx_interrupt(dev, tp); #ifdef ENABLE_DASH_SUPPORT if ( tp->DASH ) { @@ -28862,12 +29648,12 @@ unsigned int work_done; unsigned long flags; - work_done = rtl8168_rx_interrupt(dev, tp, budget); - spin_lock_irqsave(&tp->lock, flags); rtl8168_tx_interrupt(dev, tp); spin_unlock_irqrestore(&tp->lock, flags); + work_done = rtl8168_rx_interrupt(dev, tp, budget); + RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget); if (work_done < work_to_do) { @@ -28905,6 +29691,8 @@ { struct rtl8168_private *tp = netdev_priv(dev); + if (tp->wol_enabled != WOL_ENABLED) return; + if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2)) { RTL_W8(tp, ChipCmd, CmdReset); rtl8168_rx_desc_offset0_init(tp, 0); @@ -28955,8 +29743,6 @@ rtl8168_rx_clear(tp); - rtl8168_sleep_rx_enable(dev); - spin_unlock_irqrestore(&tp->lock, flags); } @@ -28971,28 +29757,30 @@ rtl8168_down(dev); + pci_clear_master(tp->pci_dev); + spin_lock_irqsave(&tp->lock, flags); rtl8168_hw_d3_para(dev); rtl8168_powerdown_pll(dev); + rtl8168_sleep_rx_enable(dev); + spin_unlock_irqrestore(&tp->lock, flags); free_irq(dev->irq, dev); - dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray, + dma_free_coherent(&pdev->dev, + (tp->num_rx_desc * sizeof(struct RxDesc)), + tp->RxDescArray, tp->RxPhyAddr); - dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray, + dma_free_coherent(&pdev->dev, + (tp->num_tx_desc * sizeof(struct TxDesc)), + tp->TxDescArray, tp->TxPhyAddr); tp->TxDescArray = NULL; tp->RxDescArray = NULL; - - if (tp->ShortPacketEmptyBuffer != NULL) { - dma_free_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer, - tp->ShortPacketEmptyBufferPhy); - tp->ShortPacketEmptyBuffer = NULL; - } } else { spin_lock_irqsave(&tp->lock, flags); @@ -29020,7 +29808,7 @@ rtl8168_rar_set(tp, tp->org_mac_addr); #ifdef ENABLE_FIBER_SUPPORT - rtl8168_hw_fiber_nic_d3_para(dev); + rtl8168_hw_fiber_nic_d3_para(tp); #endif //ENABLE_FIBER_SUPPORT if (s5wol == 0) @@ -29028,6 +29816,13 @@ rtl8168_close(dev); rtl8168_disable_msi(pdev, tp); + + if (system_state == SYSTEM_POWER_OFF) { + pci_clear_master(tp->pci_dev); + rtl8168_sleep_rx_enable(dev); + pci_wake_from_d3(pdev, tp->wol_enabled); + pci_set_power_state(pdev, PCI_D3hot); + } } #endif @@ -29089,16 +29884,18 @@ rtl8168_hw_reset(dev); - rtl8168_sleep_rx_enable(dev); + pci_clear_master(pdev); rtl8168_hw_d3_para(dev); #ifdef ENABLE_FIBER_SUPPORT - rtl8168_hw_fiber_nic_d3_para(dev); + rtl8168_hw_fiber_nic_d3_para(tp); #endif //ENABLE_FIBER_SUPPORT rtl8168_powerdown_pll(dev); + rtl8168_sleep_rx_enable(dev); + spin_unlock_irqrestore(&tp->lock, flags); out: @@ -29153,6 +29950,8 @@ goto out; } + pci_set_master(pdev); + spin_lock_irqsave(&tp->lock, flags); rtl8168_exit_oob(dev); @@ -29167,6 +29966,8 @@ rtl8168_hw_phy_config(dev); + rtl8168_hw_config(dev); + spin_unlock_irqrestore(&tp->lock, flags); rtl8168_schedule_work(dev, rtl8168_reset_task);
View file
r8168-8.048.03.tar.gz/src/r8168_realwow.h -> r8168-8.050.00.tar.gz/src/r8168_realwow.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
View file
r8168-8.048.03.tar.gz/src/rtl_eeprom.c -> r8168-8.050.00.tar.gz/src/rtl_eeprom.c
Changed
@@ -1,10 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
View file
r8168-8.048.03.tar.gz/src/rtl_eeprom.h -> r8168-8.050.00.tar.gz/src/rtl_eeprom.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
View file
r8168-8.048.03.tar.gz/src/rtltool.c -> r8168-8.050.00.tar.gz/src/rtltool.c
Changed
@@ -1,10 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free @@ -55,9 +56,6 @@ ret = 0; switch (my_cmd.cmd) { case RTLTOOL_READ_MAC: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if (my_cmd.len==1) my_cmd.data = readb(tp->mmio_addr+my_cmd.offset); else if (my_cmd.len==2) @@ -76,9 +74,6 @@ break; case RTLTOOL_WRITE_MAC: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if (my_cmd.len==1) writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset); else if (my_cmd.len==2) @@ -93,9 +88,6 @@ break; case RTLTOOL_READ_PHY: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); my_cmd.data = rtl8168_mdio_prot_read(tp, my_cmd.offset); spin_unlock_irqrestore(&tp->lock, flags); @@ -108,18 +100,12 @@ break; case RTLTOOL_WRITE_PHY: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); rtl8168_mdio_prot_write(tp, my_cmd.offset, my_cmd.data); spin_unlock_irqrestore(&tp->lock, flags); break; case RTLTOOL_READ_EPHY: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset); spin_unlock_irqrestore(&tp->lock, flags); @@ -132,9 +118,6 @@ break; case RTLTOOL_WRITE_EPHY: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); rtl8168_ephy_write(tp, my_cmd.offset, my_cmd.data); spin_unlock_irqrestore(&tp->lock, flags); @@ -159,12 +142,6 @@ break; case RTLTOOL_WRITE_ERI: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) { spin_lock_irqsave(&tp->lock, flags); rtl8168_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC); @@ -176,9 +153,6 @@ break; case RTLTOOL_READ_PCI: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - my_cmd.data = 0; if (my_cmd.len==1) pci_read_config_byte(tp->pci_dev, my_cmd.offset, @@ -201,9 +175,6 @@ break; case RTLTOOL_WRITE_PCI: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if (my_cmd.len==1) pci_write_config_byte(tp->pci_dev, my_cmd.offset, my_cmd.data); @@ -221,9 +192,6 @@ break; case RTLTOOL_READ_EEPROM: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); my_cmd.data = rtl8168_eeprom_read_sc(tp, my_cmd.offset); spin_unlock_irqrestore(&tp->lock, flags); @@ -236,18 +204,12 @@ break; case RTLTOOL_WRITE_EEPROM: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); rtl8168_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data); spin_unlock_irqrestore(&tp->lock, flags); break; case RTL_READ_OOB_MAC: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); rtl8168_oob_mutex_lock(tp); my_cmd.data = rtl8168_ocp_read(tp, my_cmd.offset, 4); @@ -261,9 +223,6 @@ break; case RTL_WRITE_OOB_MAC: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if (my_cmd.len == 0 || my_cmd.len > 4) return -EOPNOTSUPP; @@ -275,9 +234,6 @@ break; case RTL_ENABLE_PCI_DIAG: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); tp->rtk_enable_diag = 1; spin_unlock_irqrestore(&tp->lock, flags); @@ -286,9 +242,6 @@ break; case RTL_DISABLE_PCI_DIAG: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); tp->rtk_enable_diag = 0; spin_unlock_irqrestore(&tp->lock, flags); @@ -297,9 +250,6 @@ break; case RTL_READ_MAC_OCP: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if (my_cmd.offset % 2) return -EOPNOTSUPP; @@ -314,9 +264,6 @@ break; case RTL_WRITE_MAC_OCP: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - if ((my_cmd.offset % 2) || (my_cmd.len != 2)) return -EOPNOTSUPP; @@ -326,9 +273,6 @@ break; case RTL_DIRECT_READ_PHY_OCP: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); my_cmd.data = rtl8168_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset); spin_unlock_irqrestore(&tp->lock, flags); @@ -341,9 +285,6 @@ break; case RTL_DIRECT_WRITE_PHY_OCP: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - spin_lock_irqsave(&tp->lock, flags); rtl8168_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data); spin_unlock_irqrestore(&tp->lock, flags);
View file
r8168-8.048.03.tar.gz/src/rtltool.h -> r8168-8.050.00.tar.gz/src/rtltool.h
Changed
@@ -1,10 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* ################################################################################ # # r8168 is the Linux device driver released for Realtek Gigabit Ethernet # controllers with PCI-Express interface. # -# Copyright(c) 2020 Realtek Semiconductor Corp. All rights reserved. +# Copyright(c) 2022 Realtek Semiconductor Corp. All rights reserved. # # This program is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the Free
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