Request 4992 (accepted)

Overview

Request 4992 (accepted)

- Update to new version 8.048.00
- Modify patch r8168-kernel_version.patch as upstream now supports 5.4

- Modify patch r8168-kernel_version.patch to let it build with 5.4

Created by bitstreamout almost 5 years ago
In state accepted
Package maintainer: bitstreamout

Submit r8168

Submit package home:bitstreamout:Essentials / r8168 to package Essentials / r8168

r8168.changes Changed

r8168.spec Changed

r8168-kernel_version.patch Changed

@@ -1,10 +1,10 @@
 ---
  src/r8168.h   |    4 ++++
- src/r8168_n.c |    4 ++--
- 2 files changed, 6 insertions(+), 2 deletions(-)
+ src/r8168_n.c |    2 +-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
 
 --- src/r8168.h
-+++ src/r8168.h	2019-11-26 10:20:59.180216676 +0000
++++ src/r8168.h	2020-02-10 11:32:37.788832833 +0000
 @@ -116,6 +116,10 @@ do { \
  } while (0)
  #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
@@ -17,17 +17,8 @@
  #if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present)
  #define vlan_tx_tag_present skb_vlan_tag_present
 --- src/r8168_n.c
-+++ src/r8168_n.c	2019-11-26 10:22:05.270987378 +0000
-@@ -56,7 +56,7 @@
- #include <linux/rtnetlink.h>
- #include <linux/completion.h>
- 
--#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
-+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0))
- #include <linux/pci-aspm.h>
- #endif
- #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
-@@ -28476,7 +28476,7 @@ process_pkt:
++++ src/r8168_n.c	2020-02-10 11:32:37.788832833 +0000
+@@ -28535,7 +28535,7 @@ process_pkt:
  
                          if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
                                  rtl8168_rx_skb(tp, skb);

r8168-8.047.05.tar.bz2/src/Makefile -> r8168-8.048.00.tar.bz2/src/Makefile Changed

r8168-8.047.05.tar.bz2/src/r8168.h -> r8168-8.048.00.tar.bz2/src/r8168.h Changed

@@ -250,6 +250,14 @@
 #define SUPPORTED_Asym_Pause  (1 << 14)
 #endif
 
+#ifndef  MDIO_EEE_100TX
+#define  MDIO_EEE_100TX  0x0002
+#endif
+
+#ifndef  MDIO_EEE_1000T
+#define  MDIO_EEE_1000T  0x0004
+#endif
+
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
 #ifdef CONFIG_NET_POLL_CONTROLLER
 #define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8168_netpoll
@@ -327,7 +335,7 @@
 #define DASH_SUFFIX ""
 #endif
 
-#define RTL8168_VERSION "8.047.05" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
+#define RTL8168_VERSION "8.048.00" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
 #define MODULENAME "r8168"
 #define PFX MODULENAME ": "
 
@@ -430,12 +438,12 @@
 #define SHORT_PACKET_PADDING_BUF_SIZE 256
 
 /* write/read MMIO register */
-#define RTL_W8(reg, val8)   writeb ((val8), ioaddr + (reg))
-#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
-#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
-#define RTL_R8(reg)     readb (ioaddr + (reg))
-#define RTL_R16(reg)        readw (ioaddr + (reg))
-#define RTL_R32(reg)        ((unsigned long) readl (ioaddr + (reg)))
+#define RTL_W8(tp, reg, val8)	writeb((val8), tp->mmio_addr + (reg))
+#define RTL_W16(tp, reg, val16)	writew((val16), tp->mmio_addr + (reg))
+#define RTL_W32(tp, reg, val32)	writel((val32), tp->mmio_addr + (reg))
+#define RTL_R8(tp, reg)		readb(tp->mmio_addr + (reg))
+#define RTL_R16(tp, reg)		readw(tp->mmio_addr + (reg))
+#define RTL_R32(tp, reg)		((unsigned long) readl(tp->mmio_addr + (reg)))
 
 #ifndef DMA_64BIT_MASK
 #define DMA_64BIT_MASK  0xffffffffffffffffULL
@@ -1564,6 +1572,8 @@
         u32 HwFiberStat;
         u8 HwSwitchMdiToFiber;
 
+        u8 HwSuppPhyOcpVer;
+
         u16 NicCustLedValue;
 
         u8 HwSuppMagicPktVer;
@@ -1716,6 +1726,7 @@
         CFG_METHOD_30,
         CFG_METHOD_31,
         CFG_METHOD_32,
+        CFG_METHOD_33,
         CFG_METHOD_MAX,
         CFG_METHOD_DEFAULT = 0xFF
 };
@@ -1767,7 +1778,7 @@
 u32 rtl8168_mdio_read(struct rtl8168_private *tp, u32 RegAddr);
 u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp, u32 RegAddr);
 u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp, u32 RegAddr);
-void rtl8168_ephy_write(void __iomem *ioaddr, int RegAddr, int value);
+void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value);
 void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value);
 u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr);
 void rtl8168_clear_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask);
@@ -1775,16 +1786,16 @@
 void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 data);
 void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd);
 void rtl8168_init_ring_indexes(struct rtl8168_private *tp);
-int rtl8168_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type);
+int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type);
 void rtl8168_oob_mutex_lock(struct rtl8168_private *tp);
 u32 rtl8168_mdio_read(struct rtl8168_private *tp, u32 RegAddr);
 u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len);
 u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 base_address);
 u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
-u32 rtl8168_eri_read(void __iomem *ioaddr, int addr, int len, int type);
-u32 rtl8168_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, u32 base_address);
-int rtl8168_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, u32 base_address);
-u16 rtl8168_ephy_read(void __iomem *ioaddr, int RegAddr);
+u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type);
+u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, u32 base_address);
+int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, u32 base_address);
+u16 rtl8168_ephy_read(struct rtl8168_private *tp, int RegAddr);
 void rtl8168_wait_txrx_fifo_empty(struct net_device *dev);
 void rtl8168_wait_ll_share_fifo_ready(struct net_device *dev);
 void rtl8168_enable_now_is_oob(struct rtl8168_private *tp);

r8168-8.047.05.tar.bz2/src/r8168_asf.c -> r8168-8.048.00.tar.bz2/src/r8168_asf.c Changed

@@ -57,7 +57,6 @@
                       struct ifreq *ifr)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         void *user_data = ifr->ifr_data;
         struct asf_ioctl_struct asf_usrdata;
         unsigned long flags;
@@ -72,126 +71,127 @@
 
         switch (asf_usrdata.offset) {
         case HBPeriod:
-                rtl8168_asf_hbperiod(ioaddr, asf_usrdata.arg, asf_usrdata.u.data);
+                rtl8168_asf_hbperiod(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case WD8Timer:
                 break;
         case WD16Rst:
-                rtl8168_asf_wd16rst(ioaddr, asf_usrdata.arg, asf_usrdata.u.data);
+                rtl8168_asf_wd16rst(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case WD8Rst:
-                rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, WD8Rst, asf_usrdata.u.data);
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, WD8Rst, asf_usrdata.u.data);
                 break;
         case LSnsrPollCycle:
-                rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, LSnsrPollCycle, asf_usrdata.u.data);
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, LSnsrPollCycle, asf_usrdata.u.data);
                 break;
         case ASFSnsrPollPrd:
-                rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, ASFSnsrPollPrd, asf_usrdata.u.data);
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, ASFSnsrPollPrd, asf_usrdata.u.data);
                 break;
         case AlertReSendItvl:
-                rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, AlertReSendItvl, asf_usrdata.u.data);
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, AlertReSendItvl, asf_usrdata.u.data);
                 break;
         case SMBAddr:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, SMBAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, SMBAddr, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case ASFConfigR0:
-                rtl8168_asf_config_regs(ioaddr, asf_usrdata.arg, ASFConfigR0, asf_usrdata.u.data);
+                rtl8168_asf_config_regs(tp, asf_usrdata.arg, ASFConfigR0, asf_usrdata.u.data);
                 break;
         case ASFConfigR1:
-                rtl8168_asf_config_regs(ioaddr, asf_usrdata.arg, ASFConfigR1, asf_usrdata.u.data);
+                rtl8168_asf_config_regs(tp, asf_usrdata.arg, ASFConfigR1, asf_usrdata.u.data);
                 break;
         case ConsoleMA:
                 rtl8168_asf_console_mac(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case ConsoleIP:
-                rtl8168_asf_ip_address(ioaddr, asf_usrdata.arg, ConsoleIP, asf_usrdata.u.data);
+                rtl8168_asf_ip_address(tp, asf_usrdata.arg, ConsoleIP, asf_usrdata.u.data);
                 break;
         case IPAddr:
                 rtl8168_asf_ip_address(tp, asf_usrdata.arg, IPAddr, asf_usrdata.u.data);
                 break;
         case UUID:
-                rtl8168_asf_rw_uuid(ioaddr, asf_usrdata.arg, asf_usrdata.u.data);
+                rtl8168_asf_rw_uuid(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case IANA:
-                rtl8168_asf_rw_iana(ioaddr, asf_usrdata.arg, asf_usrdata.u.data);
+                rtl8168_asf_rw_iana(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case SysID:
-                rtl8168_asf_rw_systemid(ioaddr, asf_usrdata.arg, asf_usrdata.u.data);
+                rtl8168_asf_rw_systemid(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case Community:
-                rtl8168_asf_community_string(ioaddr, asf_usrdata.arg, asf_usrdata.u.string);
+                rtl8168_asf_community_string(tp, asf_usrdata.arg, asf_usrdata.u.string);
                 break;
         case StringLength:
-                rtl8168_asf_community_string_len(ioaddr, asf_usrdata.arg, asf_usrdata.u.data);
+                rtl8168_asf_community_string_len(tp, asf_usrdata.arg, asf_usrdata.u.data);
                 break;
         case FmCapMsk:
-                rtl8168_asf_capability_masks(ioaddr, asf_usrdata.arg, FmCapMsk, asf_usrdata.u.data);
+                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, FmCapMsk, asf_usrdata.u.data);
                 break;
         case SpCMDMsk:
-                rtl8168_asf_capability_masks(ioaddr, asf_usrdata.arg, SpCMDMsk, asf_usrdata.u.data);
+                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, SpCMDMsk, asf_usrdata.u.data);
                 break;
         case SysCapMsk:
-                rtl8168_asf_capability_masks(ioaddr, asf_usrdata.arg, SysCapMsk, asf_usrdata.u.data);
+                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, SysCapMsk, asf_usrdata.u.data);
                 break;
         case RmtRstAddr:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtRstAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstAddr, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtRstCmd:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtRstCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstCmd, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtRstData:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtRstData, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstData, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPwrOffAddr:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOffAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffAddr, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPwrOffCmd:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOffCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffCmd, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPwrOffData:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOffData, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffData, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPwrOnAddr:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOnAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnAddr, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPwrOnCmd:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOnCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnCmd, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPwrOnData:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOnData, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnData, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPCRAddr:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPCRAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRAddr, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPCRCmd:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPCRCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRCmd, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case RmtPCRData:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPCRData, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRData, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case ASFSnsr0Addr:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, ASFSnsr0Addr, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, ASFSnsr0Addr, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case LSnsrAddr0:
-                rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, LSnsrAddr0, RW_ONE_BYTE, asf_usrdata.u.data);
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, LSnsrAddr0, RW_ONE_BYTE, asf_usrdata.u.data);
                 break;
         case KO:
                 /* Get/Set Key Operation */
-                rtl8168_asf_key_access(ioaddr, asf_usrdata.arg, KO, asf_usrdata.u.data);
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KO, asf_usrdata.u.data);
                 break;
         case KA:
                 /* Get/Set Key Administrator */
-                rtl8168_asf_key_access(ioaddr, asf_usrdata.arg, KA, asf_usrdata.u.data);
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KA, asf_usrdata.u.data);
                 break;
         case KG:
                 /* Get/Set Key Generation */
-                rtl8168_asf_key_access(ioaddr, asf_usrdata.arg, KG, asf_usrdata.u.data);
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KG, asf_usrdata.u.data);
                 break;
         case KR:
                 /* Get/Set Key Random */
                 rtl8168_asf_key_access(tp, asf_usrdata.arg, KR, asf_usrdata.u.data);
                 break;
         default:
+                spin_unlock_irqrestore(&tp->lock, flags);
                 return -EOPNOTSUPP;
         }
 
@@ -203,32 +203,31 @@
         return 0;
 }
 
-void rtl8168_asf_hbperiod(void __iomem *ioaddr, int arg, unsigned int *data)
+void rtl8168_asf_hbperiod(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
         if (arg == ASF_GET)
-                data[ASFHBPERIOD] = rtl8168_eri_read(ioaddr, HBPeriod, RW_TWO_BYTES, ERIAR_ASF);
+                data[ASFHBPERIOD] = rtl8168_eri_read(tp, HBPeriod, RW_TWO_BYTES, ERIAR_ASF);
         else if (arg == ASF_SET) {
-                rtl8168_eri_write(ioaddr, HBPeriod, RW_TWO_BYTES, data[ASFHBPERIOD], ERIAR_ASF);
-                rtl8168_eri_write(ioaddr, 0x1EC, RW_ONE_BYTE, 0x07, ERIAR_ASF);
+                rtl8168_eri_write(tp, HBPeriod, RW_TWO_BYTES, data[ASFHBPERIOD], ERIAR_ASF);
+                rtl8168_eri_write(tp, 0x1EC, RW_ONE_BYTE, 0x07, ERIAR_ASF);
         }
 }
 
-void rtl8168_asf_wd16rst(void __iomem *ioaddr, int arg, unsigned int *data)
+void rtl8168_asf_wd16rst(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
-        data[ASFWD16RST] = rtl8168_eri_read(ioaddr, WD16Rst, RW_TWO_BYTES, ERIAR_ASF);
+        data[ASFWD16RST] = rtl8168_eri_read(tp, WD16Rst, RW_TWO_BYTES, ERIAR_ASF);
 }
 
 void rtl8168_asf_console_mac(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
-        void __iomem *ioaddr=tp->mmio_addr;
         int i;
 
         if (arg == ASF_GET) {
                 for (i = 0; i < 6; i++)
-                        data[i] = rtl8168_eri_read(ioaddr, ConsoleMA + i, RW_ONE_BYTE, ERIAR_ASF);
+                        data[i] = rtl8168_eri_read(tp, ConsoleMA + i, RW_ONE_BYTE, ERIAR_ASF);
         } else if (arg == ASF_SET) {
                 for (i = 0; i < 6; i++)
-                        rtl8168_eri_write(ioaddr, ConsoleMA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+                        rtl8168_eri_write(tp, ConsoleMA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
 
                 /* write the new console MAC address to EEPROM */
                 rtl8168_eeprom_write_sc(tp, 70, (data[1] << 8) | data[0]);
@@ -239,16 +238,15 @@
 
 void rtl8168_asf_ip_address(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
 {
-        void __iomem *ioaddr=tp->mmio_addr;
         int i;
         int eeprom_off = 0;
 
         if (arg == ASF_GET) {
                 for (i = 0; i < 4; i++)
-                        data[i] = rtl8168_eri_read(ioaddr, offset + i, RW_ONE_BYTE, ERIAR_ASF);
+                        data[i] = rtl8168_eri_read(tp, offset + i, RW_ONE_BYTE, ERIAR_ASF);
         } else if (arg == ASF_SET) {
                 for (i = 0; i < 4; i++)
-                        rtl8168_eri_write(ioaddr, offset + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+                        rtl8168_eri_write(tp, offset + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
 
                 if (offset == ConsoleIP)
                         eeprom_off = 73;
@@ -262,25 +260,25 @@
         }
 }
 
-void rtl8168_asf_config_regs(void __iomem *ioaddr, int arg, int offset, unsigned int *data)
+void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
 {
         unsigned int value;
 
         if (arg == ASF_GET) {
-                data[ASFCAPABILITY] = (rtl8168_eri_read(ioaddr, offset, RW_ONE_BYTE, ERIAR_ASF) & data[ASFCONFIG]) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
+                data[ASFCAPABILITY] = (rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF) & data[ASFCONFIG]) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
         } else if (arg == ASF_SET) {
-                value = rtl8168_eri_read(ioaddr, offset, RW_ONE_BYTE, ERIAR_ASF);
+                value = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF);
 
                 if (data[ASFCAPABILITY] == FUNCTION_ENABLE)
                         value |= data[ASFCONFIG];
                 else if (data[ASFCAPABILITY] == FUNCTION_DISABLE)
                         value &= ~data[ASFCONFIG];
 
-                rtl8168_eri_write(ioaddr, offset, RW_ONE_BYTE, value, ERIAR_ASF);
+                rtl8168_eri_write(tp, offset, RW_ONE_BYTE, value, ERIAR_ASF);
         }
 }
 
-void rtl8168_asf_capability_masks(void __iomem *ioaddr, int arg, int offset, unsigned int *data)
+void rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
 {
         unsigned int len, bit_mask;
 
@@ -304,33 +302,33 @@
         }
 
         if (arg == ASF_GET)
-                data[ASFCAPMASK] = rtl8168_eri_read(ioaddr, offset, len, ERIAR_ASF) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
+                data[ASFCAPMASK] = rtl8168_eri_read(tp, offset, len, ERIAR_ASF) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
         else /* arg == ASF_SET */
-                rtl8168_eri_write(ioaddr, offset, len, bit_mask, ERIAR_ASF);
+                rtl8168_eri_write(tp, offset, len, bit_mask, ERIAR_ASF);
 }
 
-void rtl8168_asf_community_string(void __iomem *ioaddr, int arg, char *string)
+void rtl8168_asf_community_string(struct rtl8168_private *tp, int arg, char *string)
 {
         int i;
 
         if (arg == ASF_GET) {
                 for (i = 0; i < COMMU_STR_MAX_LEN; i++)
-                        string[i] = rtl8168_eri_read(ioaddr, Community + i, RW_ONE_BYTE, ERIAR_ASF);
+                        string[i] = rtl8168_eri_read(tp, Community + i, RW_ONE_BYTE, ERIAR_ASF);
         } else { /* arg == ASF_SET */
                 for (i = 0; i < COMMU_STR_MAX_LEN; i++)
-                        rtl8168_eri_write(ioaddr, Community + i, RW_ONE_BYTE, string[i], ERIAR_ASF);
+                        rtl8168_eri_write(tp, Community + i, RW_ONE_BYTE, string[i], ERIAR_ASF);
         }
 }
 
-void rtl8168_asf_community_string_len(void __iomem *ioaddr, int arg, unsigned int *data)
+void rtl8168_asf_community_string_len(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
         if (arg == ASF_GET)
-                data[ASFCOMMULEN] = rtl8168_eri_read(ioaddr, StringLength, RW_ONE_BYTE, ERIAR_ASF);
+                data[ASFCOMMULEN] = rtl8168_eri_read(tp, StringLength, RW_ONE_BYTE, ERIAR_ASF);
         else /* arg == ASF_SET */
-                rtl8168_eri_write(ioaddr, StringLength, RW_ONE_BYTE, data[ASFCOMMULEN], ERIAR_ASF);
+                rtl8168_eri_write(tp, StringLength, RW_ONE_BYTE, data[ASFCOMMULEN], ERIAR_ASF);
 }
 
-void rtl8168_asf_time_period(void __iomem *ioaddr, int arg, int offset, unsigned int *data)
+void rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
 {
         int pos = 0;
 
@@ -344,21 +342,20 @@
                 pos = ASFALERTRESND;
 
         if (arg == ASF_GET)
-                data[pos] = rtl8168_eri_read(ioaddr, offset, RW_ONE_BYTE, ERIAR_ASF);
+                data[pos] = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF);
         else /* arg == ASF_SET */
-                rtl8168_eri_write(ioaddr, offset, RW_ONE_BYTE, data[pos], ERIAR_ASF);
+                rtl8168_eri_write(tp, offset, RW_ONE_BYTE, data[pos], ERIAR_ASF);
 
 }
 
 void rtl8168_asf_key_access(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
 {
-        void __iomem *ioaddr=tp->mmio_addr;
         int i, j;
         int key_off = 0;
 
         if (arg == ASF_GET) {
                 for (i = 0; i < KEY_LEN; i++)
-                        data[i] = rtl8168_eri_read(ioaddr, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, ERIAR_ASF);
+                        data[i] = rtl8168_eri_read(tp, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, ERIAR_ASF);
         } else {
                 if (offset == KO)
                         key_off = 162;
@@ -371,7 +368,7 @@
 
                 /* arg == ASF_SET */
                 for (i = 0; i < KEY_LEN; i++)
-                        rtl8168_eri_write(ioaddr, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, data[i], ERIAR_ASF);
+                        rtl8168_eri_write(tp, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, data[i], ERIAR_ASF);
 
                 /* write the new key to EEPROM */
                 for (i = 0, j = 19; i < 10; i++, j = j - 2)
@@ -379,46 +376,46 @@
         }
 }
 
-void rtl8168_asf_rw_hexadecimal(void __iomem *ioaddr, int arg, int offset, int len, unsigned int *data)
+void rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data)
 {
         if (arg == ASF_GET)
-                data[ASFRWHEXNUM] = rtl8168_eri_read(ioaddr, offset, len, ERIAR_ASF);
+                data[ASFRWHEXNUM] = rtl8168_eri_read(tp, offset, len, ERIAR_ASF);
         else /* arg == ASF_SET */
-                rtl8168_eri_write(ioaddr, offset, len, data[ASFRWHEXNUM], ERIAR_ASF);
+                rtl8168_eri_write(tp, offset, len, data[ASFRWHEXNUM], ERIAR_ASF);
 }
 
-void rtl8168_asf_rw_systemid(void __iomem *ioaddr, int arg, unsigned int *data)
+void rtl8168_asf_rw_systemid(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
         int i;
 
         if (arg == ASF_GET)
                 for (i = 0; i < SYSID_LEN ; i++)
-                        data[i] = rtl8168_eri_read(ioaddr, SysID + i, RW_ONE_BYTE, ERIAR_ASF);
+                        data[i] = rtl8168_eri_read(tp, SysID + i, RW_ONE_BYTE, ERIAR_ASF);
         else /* arg == ASF_SET */
                 for (i = 0; i < SYSID_LEN ; i++)
-                        rtl8168_eri_write(ioaddr, SysID + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+                        rtl8168_eri_write(tp, SysID + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
 }
 
-void rtl8168_asf_rw_iana(void __iomem *ioaddr, int arg, unsigned int *data)
+void rtl8168_asf_rw_iana(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
         int i;
 
         if (arg == ASF_GET)
                 for (i = 0; i < RW_FOUR_BYTES; i++)
-                        data[i] = rtl8168_eri_read(ioaddr, IANA + i, RW_ONE_BYTE, ERIAR_ASF);
+                        data[i] = rtl8168_eri_read(tp, IANA + i, RW_ONE_BYTE, ERIAR_ASF);
         else /* arg == ASF_SET */
                 for (i = 0; i < RW_FOUR_BYTES; i++)
-                        rtl8168_eri_write(ioaddr, IANA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+                        rtl8168_eri_write(tp, IANA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
 }
 
-void rtl8168_asf_rw_uuid(void __iomem *ioaddr, int arg, unsigned int *data)
+void rtl8168_asf_rw_uuid(struct rtl8168_private *tp, int arg, unsigned int *data)
 {
         int i, j;
 
         if (arg == ASF_GET)
                 for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++)
-                        data[j] = rtl8168_eri_read(ioaddr, UUID + i, RW_ONE_BYTE, ERIAR_ASF);
+                        data[j] = rtl8168_eri_read(tp, UUID + i, RW_ONE_BYTE, ERIAR_ASF);
         else /* arg == ASF_SET */
                 for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++)
-                        rtl8168_eri_write(ioaddr, UUID + i, RW_ONE_BYTE, data[j], ERIAR_ASF);
+                        rtl8168_eri_write(tp, UUID + i, RW_ONE_BYTE, data[j], ERIAR_ASF);
 }

r8168-8.047.05.tar.bz2/src/r8168_asf.h -> r8168-8.048.00.tar.bz2/src/r8168_asf.h Changed

@@ -277,18 +277,18 @@
 };
 
 int rtl8168_asf_ioctl(struct net_device *dev, struct ifreq *ifr);
-void rtl8168_asf_hbperiod(void __iomem *ioaddr, int arg, unsigned int *data);
-void rtl8168_asf_wd16rst(void __iomem *ioaddr, int arg, unsigned int *data);
+void rtl8168_asf_hbperiod(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_wd16rst(struct rtl8168_private *tp, int arg, unsigned int *data);
 void rtl8168_asf_console_mac(struct rtl8168_private *, int arg, unsigned int *data);
 void rtl8168_asf_ip_address(struct rtl8168_private *, int arg, int offset, unsigned int *data);
-void rtl8168_asf_config_regs(void __iomem *ioaddr, int arg, int offset, unsigned int *data);
-void rtl8168_asf_capability_masks(void __iomem *ioaddr, int arg, int offset, unsigned int *data);
-void rtl8168_asf_community_string(void __iomem *ioaddr, int arg, char *string);
-void rtl8168_asf_community_string_len(void __iomem *ioaddr, int arg, unsigned int *data);
-void rtl8168_asf_alert_resend_interval(void __iomem *ioaddr, int arg, unsigned int *data);
-void rtl8168_asf_time_period(void __iomem *ioaddr, int arg, int offset, unsigned int *data);
+void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
+void rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
+void rtl8168_asf_community_string(struct rtl8168_private *tp, int arg, char *string);
+void rtl8168_asf_community_string_len(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_alert_resend_interval(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
 void rtl8168_asf_key_access(struct rtl8168_private *, int arg, int offset, unsigned int *data);
-void rtl8168_asf_rw_hexadecimal(void __iomem *ioaddr, int arg, int offset, int len, unsigned int *data);
-void rtl8168_asf_rw_iana(void __iomem *ioaddr, int arg, unsigned int *data);
-void rtl8168_asf_rw_uuid(void __iomem *ioaddr, int arg, unsigned int *data);
-void rtl8168_asf_rw_systemid(void __iomem *ioaddr, int arg, unsigned int *data);
+void rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data);
+void rtl8168_asf_rw_iana(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_rw_uuid(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_rw_systemid(struct rtl8168_private *tp, int arg, unsigned int *data);

r8168-8.047.05.tar.bz2/src/r8168_dash.h -> r8168-8.048.00.tar.bz2/src/r8168_dash.h Changed

@@ -172,10 +172,10 @@
 #define OCP_REG_CONFIG0_DRV_WAIT_OOB     BIT_8
 #define OCP_REG_CONFIG0_TLSEN            BIT_7
 
-#define HW_DASH_SUPPORT_DASH(_M)        ((_M)->HwSuppDashVer > 0 )
-#define HW_DASH_SUPPORT_TYPE_1(_M)        ((_M)->HwSuppDashVer == 1 )
-#define HW_DASH_SUPPORT_TYPE_2(_M)        ((_M)->HwSuppDashVer == 2 )
-#define HW_DASH_SUPPORT_TYPE_3(_M)        ((_M)->HwSuppDashVer == 3 )
+#define HW_DASH_SUPPORT_DASH(_M)        ((_M)->HwSuppDashVer > 0)
+#define HW_DASH_SUPPORT_TYPE_1(_M)        ((_M)->HwSuppDashVer == 1)
+#define HW_DASH_SUPPORT_TYPE_2(_M)        ((_M)->HwSuppDashVer == 2)
+#define HW_DASH_SUPPORT_TYPE_3(_M)        ((_M)->HwSuppDashVer == 3)
 
 #define RECV_FROM_FW_BUF_SIZE (1520)
 #define SEND_TO_FW_BUF_SIZE (1520)
@@ -241,12 +241,12 @@
 #define CMAC_TXDESC_OFFSET 0x98    //TX: 0x98 - 0x9F
 
 /* cmac write/read MMIO register */
-#define RTL_CMAC_W8(reg, val8)   writeb ((val8), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_W16(reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_W32(reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R8(reg)     readb (tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R16(reg)        readw (tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R32(reg)        ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
+#define RTL_CMAC_W8(tp, reg, val8)   writeb ((val8), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R8(tp, reg)     readb (tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R16(tp, reg)        readw (tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R32(tp, reg)        ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
 
 int rtl8168_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
 void HandleDashInterrupt(struct net_device *dev);

r8168-8.047.05.tar.bz2/src/r8168_n.c -> r8168-8.048.00.tar.bz2/src/r8168_n.c Changed

@@ -35,6 +35,10 @@
  * This driver is modified from r8169.c in Linux kernel 2.6.18
  */
 
+/* In Linux 5.4 asm_inline was introduced, but it's not supported by clang.
+ * Redefine it to just asm to enable successful compilation.
+ */
+
 #include <linux/module.h>
 #include <linux/version.h>
 #include <linux/pci.h>
@@ -57,8 +61,10 @@
 #include <linux/completion.h>
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)
 #include <linux/pci-aspm.h>
 #endif
+#endif
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
 #include <linux/prefetch.h>
 #endif
@@ -293,6 +299,12 @@
         0xff7e5880,
         Jumbo_Frame_9k),
 
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_33,
+        RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
         _R("Unknown",
         CFG_METHOD_DEFAULT,
         (RX_DMA_BURST << RxCfgDMAShift),
@@ -446,7 +458,7 @@
 static void rtl8168_set_rx_mode(struct net_device *dev);
 static void rtl8168_tx_timeout(struct net_device *dev);
 static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
-static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, void __iomem *, napi_budget);
+static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, napi_budget);
 static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
 static void rtl8168_down(struct net_device *dev);
 
@@ -882,7 +894,7 @@
         seq_printf(m, "aspm\t0x%x\n", aspm);
         seq_printf(m, "s5wol\t0x%x\n", s5wol);
         seq_printf(m, "s5_keep_curr_mac\t0x%x\n", s5_keep_curr_mac);
-        seq_printf(m, "eee_enable\t0x%x\n", eee_enable);
+        seq_printf(m, "eee_enable\t0x%x\n", tp->eee_enabled);
         seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize);
         seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num);
         seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet);
@@ -906,7 +918,6 @@
 {
         struct net_device *dev = m->private;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         struct rtl8168_counters *counters;
         dma_addr_t paddr;
         u32 cmd;
@@ -925,13 +936,13 @@
         }
 
         spin_lock_irqsave(&tp->lock, flags);
-        RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
+        RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
         cmd = (u64)paddr & DMA_BIT_MASK(32);
-        RTL_W32(CounterAddrLow, cmd);
-        RTL_W32(CounterAddrLow, cmd | CounterDump);
+        RTL_W32(tp, CounterAddrLow, cmd);
+        RTL_W32(tp, CounterAddrLow, cmd | CounterDump);
 
         WaitCnt = 0;
-        while (RTL_R32(CounterAddrLow) & CounterDump) {
+        while (RTL_R32(tp, CounterAddrLow) & CounterDump) {
                 udelay(10);
 
                 WaitCnt++;
@@ -991,7 +1002,6 @@
         int i, n, max = R8168_EPHY_REGS_SIZE/2;
         u16 word_rd;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned long flags;
 
         seq_puts(m, "\nDump PCIE PHY\n");
@@ -1002,7 +1012,7 @@
                 seq_printf(m, "\n0x%02x:\t", n);
 
                 for (i = 0; i < 8 && n < max; i++, n++) {
-                        word_rd = rtl8168_ephy_read(ioaddr, n);
+                        word_rd = rtl8168_ephy_read(tp, n);
                         seq_printf(m, "%04x ", word_rd);
                 }
         }
@@ -1046,7 +1056,6 @@
         int i, n, max = R8168_ERI_REGS_SIZE;
         u32 dword_rd;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned long flags;
 
         switch (tp->mcfg) {
@@ -1066,7 +1075,7 @@
                 seq_printf(m, "\n0x%02x:\t", n);
 
                 for (i = 0; i < 4 && n < max; i++, n+=4) {
-                        dword_rd = rtl8168_eri_read(ioaddr, n, 4, ERIAR_ExGMAC);
+                        dword_rd = rtl8168_eri_read(tp, n, 4, ERIAR_ExGMAC);
                         seq_printf(m, "%08x ", dword_rd);
                 }
         }
@@ -1274,7 +1283,7 @@
                         aspm,
                         s5wol,
                         s5_keep_curr_mac,
-                        eee_enable,
+                        tp->eee_enabled,
                         hwoptimize,
                         proc_init_num,
                         s0_magic_packet,
@@ -1303,7 +1312,6 @@
 {
         struct net_device *dev = data;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         struct rtl8168_counters *counters;
         dma_addr_t paddr;
         u32 cmd;
@@ -1325,13 +1333,13 @@
         }
 
         spin_lock_irqsave(&tp->lock, flags);
-        RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
+        RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
         cmd = (u64)paddr & DMA_BIT_MASK(32);
-        RTL_W32(CounterAddrLow, cmd);
-        RTL_W32(CounterAddrLow, cmd | CounterDump);
+        RTL_W32(tp, CounterAddrLow, cmd);
+        RTL_W32(tp, CounterAddrLow, cmd | CounterDump);
 
         WaitCnt = 0;
-        while (RTL_R32(CounterAddrLow) & CounterDump) {
+        while (RTL_R32(tp, CounterAddrLow) & CounterDump) {
                 udelay(10);
 
                 WaitCnt++;
@@ -1421,7 +1429,6 @@
         int i, n, max = R8168_EPHY_REGS_SIZE/2;
         u16 word_rd;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned long flags;
         int len = 0;
 
@@ -1436,7 +1443,7 @@
                                 n);
 
                 for (i = 0; i < 8 && n < max; i++, n++) {
-                        word_rd = rtl8168_ephy_read(ioaddr, n);
+                        word_rd = rtl8168_ephy_read(tp, n);
                         len += snprintf(page + len, count - len,
                                         "%04x ",
                                         word_rd);
@@ -1497,7 +1504,6 @@
         int i, n, max = R8168_ERI_REGS_SIZE;
         u32 dword_rd;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned long flags;
         int len = 0;
 
@@ -1523,7 +1529,7 @@
                                 n);
 
                 for (i = 0; i < 4 && n < max; i++, n+=4) {
-                        dword_rd = rtl8168_eri_read(ioaddr, n, 4, ERIAR_ExGMAC);
+                        dword_rd = rtl8168_eri_read(tp, n, 4, ERIAR_ExGMAC);
                         len += snprintf(page + len, count - len,
                                         "%08x ",
                                         dword_rd);
@@ -1750,10 +1756,11 @@
                 u32 RegAddr,
                 u32 value)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 data32;
         int i;
 
+        if (tp->HwSuppPhyOcpVer == 0) goto out;
+
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
         WARN_ON_ONCE(RegAddr % 2);
 #endif
@@ -1761,13 +1768,15 @@
         data32 <<= OCPR_Addr_Reg_shift;
         data32 |= OCPR_Write | value;
 
-        RTL_W32(PHYOCP, data32);
+        RTL_W32(tp, PHYOCP, data32);
         for (i = 0; i < 100; i++) {
                 udelay(1);
 
-                if (!(RTL_R32(PHYOCP) & OCPR_Flag))
+                if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag))
                         break;
         }
+out:
+        return;
 }
 
 static void mdio_direct_write_phy_ocp(struct rtl8168_private *tp,
@@ -1809,7 +1818,6 @@
                             u32 RegAddr,
                             u32 value)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         int i;
 
         if (RegAddr == 0x1F) {
@@ -1817,47 +1825,44 @@
         }
 
         if (tp->mcfg == CFG_METHOD_11) {
-                RTL_W32(OCPDR, OCPDR_Write |
+                RTL_W32(tp, OCPDR, OCPDR_Write |
                         (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift |
                         (value & OCPDR_Data_Mask));
-                RTL_W32(OCPAR, OCPAR_GPHY_Write);
-                RTL_W32(EPHY_RXER_NUM, 0);
+                RTL_W32(tp, OCPAR, OCPAR_GPHY_Write);
+                RTL_W32(tp, EPHY_RXER_NUM, 0);
 
                 for (i = 0; i < 100; i++) {
                         mdelay(1);
-                        if (!(RTL_R32(OCPAR) & OCPAR_Flag))
+                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
                                 break;
                 }
-        } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-                   tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
-                   tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-                   tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-                   tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                   tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
-                if (RegAddr == 0x1F) {
-                        return;
-                }
-                rtl8168_mdio_real_write_phy_ocp(tp, tp->cur_page, RegAddr, value);
         } else {
-                if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                        RTL_W32(0xD0, RTL_R32(0xD0) & ~0x00020000);
-
-                RTL_W32(PHYAR, PHYAR_Write |
-                        (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift |
-                        (value & PHYAR_Data_Mask));
-
-                for (i = 0; i < 10; i++) {
-                        udelay(100);
+                if (tp->HwSuppPhyOcpVer > 0) {
+                        if (RegAddr == 0x1F) {
+                                return;
+                        }
+                        rtl8168_mdio_real_write_phy_ocp(tp, tp->cur_page, RegAddr, value);
+                } else {
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) & ~0x00020000);
 
-                        /* Check if the RTL8168 has completed writing to the specified MII register */
-                        if (!(RTL_R32(PHYAR) & PHYAR_Flag)) {
-                                udelay(20);
-                                break;
+                        RTL_W32(tp, PHYAR, PHYAR_Write |
+                                (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift |
+                                (value & PHYAR_Data_Mask));
+
+                        for (i = 0; i < 10; i++) {
+                                udelay(100);
+
+                                /* Check if the RTL8168 has completed writing to the specified MII register */
+                                if (!(RTL_R32(tp, PHYAR) & PHYAR_Flag)) {
+                                        udelay(20);
+                                        break;
+                                }
                         }
-                }
 
-                if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                        RTL_W32(0xD0, RTL_R32(0xD0) | 0x00020000);
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
+                }
         }
 }
 
@@ -1887,25 +1892,27 @@
 static u32 mdio_real_direct_read_phy_ocp(struct rtl8168_private *tp,
                 u32 RegAddr)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 data32;
         int i, value = 0;
 
+        if (tp->HwSuppPhyOcpVer == 0) goto out;
+
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
         WARN_ON_ONCE(RegAddr % 2);
 #endif
         data32 = RegAddr/2;
         data32 <<= OCPR_Addr_Reg_shift;
 
-        RTL_W32(PHYOCP, data32);
+        RTL_W32(tp, PHYOCP, data32);
         for (i = 0; i < 100; i++) {
                 udelay(1);
 
-                if (RTL_R32(PHYOCP) & OCPR_Flag)
+                if (RTL_R32(tp, PHYOCP) & OCPR_Flag)
                         break;
         }
-        value = RTL_R32(PHYOCP) & OCPDR_Data_Mask;
+        value = RTL_R32(tp, PHYOCP) & OCPDR_Data_Mask;
 
+out:
         return value;
 }
 
@@ -1944,59 +1951,55 @@
 u32 mdio_real_read(struct rtl8168_private *tp,
                    u32 RegAddr)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         int i, value = 0;
 
         if (tp->mcfg==CFG_METHOD_11) {
-                RTL_W32(OCPDR, OCPDR_Read |
+                RTL_W32(tp, OCPDR, OCPDR_Read |
                         (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift);
-                RTL_W32(OCPAR, OCPAR_GPHY_Write);
-                RTL_W32(EPHY_RXER_NUM, 0);
+                RTL_W32(tp, OCPAR, OCPAR_GPHY_Write);
+                RTL_W32(tp, EPHY_RXER_NUM, 0);
 
                 for (i = 0; i < 100; i++) {
                         mdelay(1);
-                        if (!(RTL_R32(OCPAR) & OCPAR_Flag))
+                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
                                 break;
                 }
 
                 mdelay(1);
-                RTL_W32(OCPAR, OCPAR_GPHY_Read);
-                RTL_W32(EPHY_RXER_NUM, 0);
+                RTL_W32(tp, OCPAR, OCPAR_GPHY_Read);
+                RTL_W32(tp, EPHY_RXER_NUM, 0);
 
                 for (i = 0; i < 100; i++) {
                         mdelay(1);
-                        if (RTL_R32(OCPAR) & OCPAR_Flag)
+                        if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
                                 break;
                 }
 
-                value = RTL_R32(OCPDR) & OCPDR_Data_Mask;
-        } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-                   tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
-                   tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-                   tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-                   tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                   tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
-                value = rtl8168_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr);
+                value = RTL_R32(tp, OCPDR) & OCPDR_Data_Mask;
         } else {
-                if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                        RTL_W32(0xD0, RTL_R32(0xD0) & ~0x00020000);
+                if (tp->HwSuppPhyOcpVer > 0) {
+                        value = rtl8168_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr);
+                } else {
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) & ~0x00020000);
 
-                RTL_W32(PHYAR,
-                        PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift);
+                        RTL_W32(tp, PHYAR,
+                                PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift);
 
-                for (i = 0; i < 10; i++) {
-                        udelay(100);
+                        for (i = 0; i < 10; i++) {
+                                udelay(100);
 
-                        /* Check if the RTL8168 has completed retrieving data from the specified MII register */
-                        if (RTL_R32(PHYAR) & PHYAR_Flag) {
-                                value = RTL_R32(PHYAR) & PHYAR_Data_Mask;
-                                udelay(20);
-                                break;
+                                /* Check if the RTL8168 has completed retrieving data from the specified MII register */
+                                if (RTL_R32(tp, PHYAR) & PHYAR_Flag) {
+                                        value = RTL_R32(tp, PHYAR) & PHYAR_Data_Mask;
+                                        udelay(20);
+                                        break;
+                                }
                         }
-                }
 
-                if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                        RTL_W32(0xD0, RTL_R32(0xD0) | 0x00020000);
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
+                }
         }
 
         return value;
@@ -2053,7 +2056,6 @@
 
 void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 data32;
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
@@ -2065,12 +2067,11 @@
         data32 += value;
         data32 |= OCPR_Write;
 
-        RTL_W32(MACOCP, data32);
+        RTL_W32(tp, MACOCP, data32);
 }
 
 u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 data32;
         u16 data16 = 0;
 
@@ -2081,15 +2082,14 @@
         data32 = reg_addr/2;
         data32 <<= OCPR_Addr_Reg_shift;
 
-        RTL_W32(MACOCP, data32);
-        data16 = (u16)RTL_R32(MACOCP);
+        RTL_W32(tp, MACOCP, data32);
+        data16 = (u16)RTL_R32(tp, MACOCP);
 
         return data16;
 }
 
 static u32 real_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         int i, val_shift, shift = 0;
         u32 value1 = 0, value2 = 0, mask;
 
@@ -2100,11 +2100,11 @@
                 val_shift = addr % 4;
                 addr = addr & ~0x3;
 
-                RTL_W32(OCPAR, (0x0F<<12) | (addr&0xFFF));
+                RTL_W32(tp, OCPAR, (0x0F<<12) | (addr&0xFFF));
 
                 for (i = 0; i < 20; i++) {
                         udelay(100);
-                        if (RTL_R32(OCPAR) & OCPAR_Flag)
+                        if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
                                 break;
                 }
 
@@ -2113,7 +2113,7 @@
                 else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
                 else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
 
-                value1 = RTL_R32(OCPDR) & mask;
+                value1 = RTL_R32(tp, OCPDR) & mask;
                 value2 |= (value1 >> val_shift * 8) << shift * 8;
 
                 if (len <= 4 - val_shift) {
@@ -2132,9 +2132,7 @@
 
 u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, const u32 base_address)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        return rtl8168_eri_read_with_oob_base_address(ioaddr, addr, len, ERIAR_OOB, base_address);
+        return rtl8168_eri_read_with_oob_base_address(tp, addr, len, ERIAR_OOB, base_address);
 }
 
 u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len)
@@ -2153,7 +2151,6 @@
 
 static int real_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         int i, val_shift, shift = 0;
         u32 value1 = 0, mask;
 
@@ -2172,14 +2169,14 @@
                 value1 = rtl8168_ocp_read(tp, addr, 4) & ~mask;
                 value1 |= ((value << val_shift * 8) >> shift * 8);
 
-                RTL_W32(OCPDR, value1);
-                RTL_W32(OCPAR, OCPAR_Flag | (0x0F<<12) | (addr&0xFFF));
+                RTL_W32(tp, OCPDR, value1);
+                RTL_W32(tp, OCPAR, OCPAR_Flag | (0x0F<<12) | (addr&0xFFF));
 
                 for (i = 0; i < 10; i++) {
                         udelay(100);
 
                         /* Check if the RTL8168 has completed ERI write */
-                        if (!(RTL_R32(OCPAR) & OCPAR_Flag))
+                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
                                 break;
                 }
 
@@ -2199,9 +2196,7 @@
 
 u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, const u32 base_address)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        return rtl8168_eri_write_with_oob_base_address(ioaddr, addr, len, value, ERIAR_OOB, base_address);
+        return rtl8168_eri_write_with_oob_base_address(tp, addr, len, value, ERIAR_OOB, base_address);
 }
 
 void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value)
@@ -2241,6 +2236,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
         default:
                 ocp_reg_mutex_oob = 0x110;
                 ocp_reg_mutex_ib = 0x114;
@@ -2302,6 +2298,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
         default:
                 ocp_reg_mutex_oob = 0x110;
                 ocp_reg_mutex_ib = 0x114;
@@ -2315,9 +2312,7 @@
 
 void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        rtl8168_eri_write(ioaddr, 0xE8, 1, cmd, ERIAR_ExGMAC);
+        rtl8168_eri_write(tp, 0xE8, 1, cmd, ERIAR_ExGMAC);
 
         rtl8168_ocp_write(tp, 0x30, 1, 0x01);
 }
@@ -2353,12 +2348,12 @@
                 u8 TmpUchar;
 
                 //Disable oob Tx
-                RTL_CMAC_W8(CMAC_IBCR2, RTL_CMAC_R8(CMAC_IBCR2) & ~( BIT_0 ));
+                RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) & ~( BIT_0 ));
                 WaitCnt = 0;
 
                 //wait oob tx disable
                 do {
-                        TmpUchar = RTL_CMAC_R8(CMAC_IBISR0);
+                        TmpUchar = RTL_CMAC_R8(tp, CMAC_IBISR0);
 
                         if ( TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE ) {
                                 break;
@@ -2369,7 +2364,7 @@
                 } while(WaitCnt < 2000);
 
                 //Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE
-                RTL_CMAC_W8(CMAC_IBISR0, RTL_CMAC_R8(CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
+                RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
         }
 }
 
@@ -2378,7 +2373,7 @@
         if (!tp->DASH) return;
 
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(CMAC_IBCR2, RTL_CMAC_R8(CMAC_IBCR2) | BIT_0);
+                RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0);
         }
 }
 
@@ -2387,7 +2382,7 @@
         if (!tp->DASH) return;
 
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(CMAC_IBCR0, RTL_CMAC_R8(CMAC_IBCR0) & ~( BIT_0 ));
+                RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~( BIT_0 ));
         }
 }
 
@@ -2396,7 +2391,7 @@
         if (!tp->DASH) return;
 
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(CMAC_IBCR0, RTL_CMAC_R8(CMAC_IBCR0) | BIT_0);
+                RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0);
         }
 }
 
@@ -2410,102 +2405,11 @@
         }
 }
 
-static void rtl8168_driver_start(struct rtl8168_private *tp)
-{
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                int timeout;
-                u32 tmp_value;
-
-                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START);
-                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
-                tmp_value |= BIT_0;
-                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
-
-                for (timeout = 0; timeout < 10; timeout++) {
-                        mdelay(10);
-                        if (rtl8168_ocp_read(tp, 0x124, 1) & BIT_0)
-                                break;
-                }
-        } else {
-                int timeout;
-                u32 reg;
-
-                if (tp->mcfg == CFG_METHOD_13) {
-                        RTL_W8(TwiCmdReg, RTL_R8(TwiCmdReg) | ( BIT_7 ));
-                }
-
-                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
-
-                if (tp->mcfg == CFG_METHOD_13)
-                        reg = 0xB8;
-                else
-                        reg = 0x10;
-
-                for (timeout = 0; timeout < 10; timeout++) {
-                        mdelay(10);
-                        if (rtl8168_ocp_read(tp, reg, 2) & BIT_11)
-                                break;
-                }
-        }
-}
-
-static void rtl8168_driver_stop(struct rtl8168_private *tp)
-{
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                struct net_device *dev = tp->dev;
-                int timeout;
-                u32 tmp_value;
-
-                rtl8168_dash2_disable_txrx(dev);
-
-                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP);
-                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
-                tmp_value |= BIT_0;
-                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
-
-                for (timeout = 0; timeout < 10; timeout++) {
-                        mdelay(10);
-                        if (!(rtl8168_ocp_read(tp, 0x124, 1) & BIT_0))
-                                break;
-                }
-        } else {
-                int timeout;
-                u32 reg;
-
-                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
-
-                if (tp->mcfg == CFG_METHOD_13)
-                        reg = 0xB8;
-                else
-                        reg = 0x10;
-
-                for (timeout = 0; timeout < 10; timeout++) {
-                        mdelay(10);
-                        if ((rtl8168_ocp_read(tp, reg, 2) & BIT_11) == 0)
-                                break;
-                }
-
-                if (tp->mcfg == CFG_METHOD_13) {
-                        RTL_W8(TwiCmdReg, RTL_R8(TwiCmdReg) & ~( BIT_7 ));
-                }
-        }
-}
-
-void rtl8168_ephy_write(void __iomem *ioaddr, int RegAddr, int value)
+void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value)
 {
         int i;
 
-        RTL_W32(EPHYAR,
+        RTL_W32(tp, EPHYAR,
                 EPHYAR_Write |
                 (RegAddr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift |
                 (value & EPHYAR_Data_Mask));
@@ -2514,27 +2418,27 @@
                 udelay(100);
 
                 /* Check if the RTL8168 has completed EPHY write */
-                if (!(RTL_R32(EPHYAR) & EPHYAR_Flag))
+                if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag))
                         break;
         }
 
         udelay(20);
 }
 
-u16 rtl8168_ephy_read(void __iomem *ioaddr, int RegAddr)
+u16 rtl8168_ephy_read(struct rtl8168_private *tp, int RegAddr)
 {
         int i;
         u16 value = 0xffff;
 
-        RTL_W32(EPHYAR,
+        RTL_W32(tp, EPHYAR,
                 EPHYAR_Read | (RegAddr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift);
 
         for (i = 0; i < 10; i++) {
                 udelay(100);
 
                 /* Check if the RTL8168 has completed EPHY read */
-                if (RTL_R32(EPHYAR) & EPHYAR_Flag) {
-                        value = (u16) (RTL_R32(EPHYAR) & EPHYAR_Data_Mask);
+                if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) {
+                        value = (u16) (RTL_R32(tp, EPHYAR) & EPHYAR_Data_Mask);
                         break;
                 }
         }
@@ -2546,13 +2450,12 @@
 
 static void ClearAndSetPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 clearmask, u16 setmask)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u16 EphyValue;
 
-        EphyValue = rtl8168_ephy_read( ioaddr, addr );
+        EphyValue = rtl8168_ephy_read(tp, addr);
         EphyValue &= ~clearmask;
         EphyValue |= setmask;
-        rtl8168_ephy_write( ioaddr, addr, EphyValue);
+        rtl8168_ephy_write(tp, addr, EphyValue);
 }
 
 static void ClearPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 mask)
@@ -2578,7 +2481,6 @@
                            u8 multi_fun_sel_bit,
                            u32 addr)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 cmd;
         int i;
         u32 value = 0;
@@ -2588,7 +2490,7 @@
         if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
             tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
             tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32) {
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) {
                 multi_fun_sel_bit = 0;
         }
 
@@ -2598,14 +2500,14 @@
 
         cmd |= multi_fun_sel_bit << 16;
 
-        RTL_W32(CSIAR, cmd);
+        RTL_W32(tp, CSIAR, cmd);
 
         for (i = 0; i < 10; i++) {
                 udelay(100);
 
                 /* Check if the RTL8168 has completed CSI read */
-                if (RTL_R32(CSIAR) & CSIAR_Flag) {
-                        value = (u32)RTL_R32(CSIDR);
+                if (RTL_R32(tp, CSIAR) & CSIAR_Flag) {
+                        value = (u32)RTL_R32(tp, CSIDR);
                         break;
                 }
         }
@@ -2621,16 +2523,15 @@
                             u32 addr,
                             u32 value)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 cmd;
         int i;
 
-        RTL_W32(CSIDR, value);
+        RTL_W32(tp, CSIDR, value);
         cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
         if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
             tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
             tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32) {
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33) {
                 multi_fun_sel_bit = 0;
         }
 
@@ -2640,13 +2541,13 @@
 
         cmd |= multi_fun_sel_bit << 16;
 
-        RTL_W32(CSIAR, cmd);
+        RTL_W32(tp, CSIAR, cmd);
 
         for (i = 0; i < 10; i++) {
                 udelay(100);
 
                 /* Check if the RTL8168 has completed CSI write */
-                if (!(RTL_R32(CSIAR) & CSIAR_Flag))
+                if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag))
                         break;
         }
 
@@ -2662,7 +2563,7 @@
         if (tp->mcfg == CFG_METHOD_20)
                 multi_fun_sel_bit = 2;
         else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32)
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
                 multi_fun_sel_bit = 1;
         else
                 multi_fun_sel_bit = 0;
@@ -2680,7 +2581,7 @@
         if (tp->mcfg == CFG_METHOD_20)
                 multi_fun_sel_bit = 2;
         else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32)
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
                 multi_fun_sel_bit = 1;
         else
                 multi_fun_sel_bit = 0;
@@ -2695,7 +2596,8 @@
         u8 RetVal = 0;
 
         if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
                 u32 TmpUlong;
                 u16 RegAlignAddr;
                 u8 ShiftByte;
@@ -2722,7 +2624,8 @@
                             u8 value)
 {
         if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
                 u32 TmpUlong;
                 u16 RegAlignAddr;
                 u8 ShiftByte;
@@ -2783,6 +2686,7 @@
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 FunBit = 1;
                 for (i = 0; i < 8; i++) {
                         if (FunBit & multi_fun_sel_bit) {
@@ -2877,7 +2781,7 @@
         rtl8168_other_fun_dev_pci_setting(tp, 0x04, clearmask, setmask, multi_fun_sel_bit);
 }
 
-u32 rtl8168_eri_read_with_oob_base_address(void __iomem *ioaddr, int addr, int len, int type, const u32 base_address)
+u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, const u32 base_address)
 {
         int i, val_shift, shift = 0;
         u32 value1 = 0, value2 = 0, mask;
@@ -2904,13 +2808,13 @@
                         eri_cmd |= (tmp << 20) & 0x00F00000;
                 }
 
-                RTL_W32(ERIAR, eri_cmd);
+                RTL_W32(tp, ERIAR, eri_cmd);
 
                 for (i = 0; i < 10; i++) {
                         udelay(100);
 
                         /* Check if the RTL8168 has completed ERI read */
-                        if (RTL_R32(ERIAR) & ERIAR_Flag)
+                        if (RTL_R32(tp, ERIAR) & ERIAR_Flag)
                                 break;
                 }
 
@@ -2919,7 +2823,7 @@
                 else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
                 else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
 
-                value1 = RTL_R32(ERIDR) & mask;
+                value1 = RTL_R32(tp, ERIDR) & mask;
                 value2 |= (value1 >> val_shift * 8) << shift * 8;
 
                 if (len <= 4 - val_shift) {
@@ -2936,12 +2840,12 @@
         return value2;
 }
 
-u32 rtl8168_eri_read(void __iomem *ioaddr, int addr, int len, int type)
+u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type)
 {
-        return rtl8168_eri_read_with_oob_base_address(ioaddr, addr, len, type, 0);
+        return rtl8168_eri_read_with_oob_base_address(tp, addr, len, type, 0);
 }
 
-int rtl8168_eri_write_with_oob_base_address(void __iomem *ioaddr, int addr, int len, u32 value, int type, const u32 base_address)
+int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, const u32 base_address)
 {
         int i, val_shift, shift = 0;
         u32 value1 = 0, mask;
@@ -2960,10 +2864,10 @@
                 else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
                 else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
 
-                value1 = rtl8168_eri_read_with_oob_base_address(ioaddr, addr, 4, type, base_address) & ~mask;
+                value1 = rtl8168_eri_read_with_oob_base_address(tp, addr, 4, type, base_address) & ~mask;
                 value1 |= ((value << val_shift * 8) >> shift * 8);
 
-                RTL_W32(ERIDR, value1);
+                RTL_W32(tp, ERIDR, value1);
 
                 eri_cmd = ERIAR_Write |
                           transformed_base_address |
@@ -2978,13 +2882,13 @@
                         eri_cmd |= (tmp << 20) & 0x00F00000;
                 }
 
-                RTL_W32(ERIAR, eri_cmd);
+                RTL_W32(tp, ERIAR, eri_cmd);
 
                 for (i = 0; i < 10; i++) {
                         udelay(100);
 
                         /* Check if the RTL8168 has completed ERI write */
-                        if (!(RTL_R32(ERIAR) & ERIAR_Flag))
+                        if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag))
                                 break;
                 }
 
@@ -3002,16 +2906,15 @@
         return 0;
 }
 
-int rtl8168_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type)
+int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type)
 {
-        return rtl8168_eri_write_with_oob_base_address(ioaddr, addr, len, value, type, NO_BASE_ADDRESS);
+        return rtl8168_eri_write_with_oob_base_address(tp, addr, len, value, type, NO_BASE_ADDRESS);
 }
 
 static void
 rtl8168_enable_rxdvgate(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->mcfg) {
         case CFG_METHOD_21:
@@ -3026,7 +2929,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_3);
+        case CFG_METHOD_33:
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3);
                 mdelay(2);
                 break;
         }
@@ -3036,7 +2940,6 @@
 rtl8168_disable_rxdvgate(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->mcfg) {
         case CFG_METHOD_21:
@@ -3051,7 +2954,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_3);
+        case CFG_METHOD_33:
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3);
                 mdelay(2);
                 break;
         }
@@ -3085,7 +2989,6 @@
 rtl8168_is_phy_disable_mode_enabled(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u8 phy_disable_mode_enabled = FALSE;
 
         switch (tp->HwSuppCheckPhyDisableModeVer) {
@@ -3095,7 +2998,7 @@
                 break;
         case 2:
         case 3:
-                if (RTL_R8(0xF2) & BIT_5)
+                if (RTL_R8(tp, 0xF2) & BIT_5)
                         phy_disable_mode_enabled = TRUE;
                 break;
         }
@@ -3124,7 +3027,6 @@
 rtl8168_enable_phy_disable_mode(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->HwSuppCheckPhyDisableModeVer) {
         case 1:
@@ -3132,7 +3034,7 @@
                 break;
         case 2:
         case 3:
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_5);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5);
                 break;
         }
 
@@ -3143,7 +3045,6 @@
 rtl8168_disable_phy_disable_mode(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->HwSuppCheckPhyDisableModeVer) {
         case 1:
@@ -3151,7 +3052,7 @@
                 break;
         case 2:
         case 3:
-                RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_5);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5);
                 break;
         }
 
@@ -3164,7 +3065,6 @@
 rtl8168_wait_txrx_fifo_empty(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int i;
 
         switch (tp->mcfg) {
@@ -3180,18 +3080,144 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 for (i = 0; i < 10; i++) {
                         udelay(100);
-                        if (RTL_R32(TxConfig) & BIT_11)
+                        if (RTL_R32(tp, TxConfig) & BIT_11)
                                 break;
                 }
 
                 for (i = 0; i < 10; i++) {
                         udelay(100);
-                        if ((RTL_R8(MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
+                        if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
+                                break;
+
+                }
+                break;
+        }
+}
+
+static void rtl8168_driver_start(struct rtl8168_private *tp)
+{
+        //change other device state to D0.
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x0E);
+                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x0E);
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x0E);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 2, 1, 0xED);
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x78);
+                if (tp->DASH) {
+                        rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x85);
+                        rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x85);
+                } else {
+                        rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x85);
+                }
+                break;
+        }
+
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                int timeout;
+                u32 tmp_value;
+
+                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START);
+                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
+                tmp_value |= BIT_0;
+                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
+
+                for (timeout = 0; timeout < 10; timeout++) {
+                        mdelay(10);
+                        if (rtl8168_ocp_read(tp, 0x124, 1) & BIT_0)
+                                break;
+                }
+        } else {
+                int timeout;
+                u32 reg;
+
+                if (tp->mcfg == CFG_METHOD_13) {
+                        RTL_W8(tp, TwiCmdReg, RTL_R8(tp, TwiCmdReg) | ( BIT_7 ));
+                }
+
+                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
+
+                if (tp->mcfg == CFG_METHOD_13)
+                        reg = 0xB8;
+                else
+                        reg = 0x10;
+
+                for (timeout = 0; timeout < 10; timeout++) {
+                        mdelay(10);
+                        if (rtl8168_ocp_read(tp, reg, 2) & BIT_11)
+                                break;
+                }
+        }
+}
+
+static void rtl8168_driver_stop(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                goto update_device_state;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                struct net_device *dev = tp->dev;
+                int timeout;
+                u32 tmp_value;
+
+                rtl8168_dash2_disable_txrx(dev);
+
+                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP);
+                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
+                tmp_value |= BIT_0;
+                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
+
+                for (timeout = 0; timeout < 10; timeout++) {
+                        mdelay(10);
+                        if (!(rtl8168_ocp_read(tp, 0x124, 1) & BIT_0))
                                 break;
+                }
+        } else {
+                int timeout;
+                u32 reg;
+
+                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
 
+                if (tp->mcfg == CFG_METHOD_13)
+                        reg = 0xB8;
+                else
+                        reg = 0x10;
+
+                for (timeout = 0; timeout < 10; timeout++) {
+                        mdelay(10);
+                        if ((rtl8168_ocp_read(tp, reg, 2) & BIT_11) == 0)
+                                break;
                 }
+
+                if (tp->mcfg == CFG_METHOD_13) {
+                        RTL_W8(tp, TwiCmdReg, RTL_R8(tp, TwiCmdReg) & ~( BIT_7 ));
+                }
+        }
+
+update_device_state:
+        //change other device state to D3.
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x0E);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD);
                 break;
         }
 }
@@ -3199,93 +3225,93 @@
 #ifdef ENABLE_DASH_SUPPORT
 
 inline void
-rtl8168_enable_dash2_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_enable_dash2_interrupt(struct rtl8168_private *tp)
 {
         if (!tp->DASH) return;
 
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
+                RTL_CMAC_W8(tp, CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
         }
 }
 
 static inline void
-rtl8168_disable_dash2_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_disable_dash2_interrupt(struct rtl8168_private *tp)
 {
         if (!tp->DASH) return;
 
         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(CMAC_IBIMR0, 0);
+                RTL_CMAC_W8(tp, CMAC_IBIMR0, 0);
         }
 }
 #endif
 
 static inline void
-rtl8168_enable_hw_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_enable_hw_interrupt(struct rtl8168_private *tp)
 {
-        RTL_W16(IntrMask, tp->intr_mask);
+        RTL_W16(tp, IntrMask, tp->intr_mask);
 
 #ifdef ENABLE_DASH_SUPPORT
         if (tp->DASH)
-                rtl8168_enable_dash2_interrupt(tp, ioaddr);
+                rtl8168_enable_dash2_interrupt(tp);
 #endif
 }
 
 static inline void
-rtl8168_disable_hw_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_disable_hw_interrupt(struct rtl8168_private *tp)
 {
-        RTL_W16(IntrMask, 0x0000);
+        RTL_W16(tp, IntrMask, 0x0000);
 
 #ifdef ENABLE_DASH_SUPPORT
         if (tp->DASH)
-                rtl8168_disable_dash2_interrupt(tp, ioaddr);
+                rtl8168_disable_dash2_interrupt(tp);
 #endif
 }
 
 
 static inline void
-rtl8168_switch_to_hw_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_switch_to_hw_interrupt(struct rtl8168_private *tp)
 {
-        RTL_W32(TimeInt0, 0x0000);
+        RTL_W32(tp, TimeInt0, 0x0000);
 
-        rtl8168_enable_hw_interrupt(tp, ioaddr);
+        rtl8168_enable_hw_interrupt(tp);
 }
 
 static inline void
-rtl8168_switch_to_timer_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_switch_to_timer_interrupt(struct rtl8168_private *tp)
 {
         if (tp->use_timer_interrrupt) {
-                RTL_W32(TimeInt0, timer_count);
-                RTL_W32(TCTR, timer_count);
-                RTL_W16(IntrMask, tp->timer_intr_mask);
+                RTL_W32(tp, TimeInt0, timer_count);
+                RTL_W32(tp, TCTR, timer_count);
+                RTL_W16(tp, IntrMask, tp->timer_intr_mask);
 
 #ifdef ENABLE_DASH_SUPPORT
                 if (tp->DASH)
-                        rtl8168_enable_dash2_interrupt(tp, ioaddr);
+                        rtl8168_enable_dash2_interrupt(tp);
 #endif
         } else {
-                rtl8168_switch_to_hw_interrupt(tp, ioaddr);
+                rtl8168_switch_to_hw_interrupt(tp);
         }
 }
 
 static void
-rtl8168_irq_mask_and_ack(struct rtl8168_private *tp, void __iomem *ioaddr)
+rtl8168_irq_mask_and_ack(struct rtl8168_private *tp)
 {
-        rtl8168_disable_hw_interrupt(tp, ioaddr);
+        rtl8168_disable_hw_interrupt(tp);
 #ifdef ENABLE_DASH_SUPPORT
         if (tp->DASH) {
                 if (tp->dash_printer_enabled) {
-                        RTL_W16(IntrStatus, RTL_R16(IntrStatus) &
+                        RTL_W16(tp, IntrStatus, RTL_R16(tp, IntrStatus) &
                                 ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
                 } else {
                         if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                                RTL_CMAC_W8(CMAC_IBISR0, RTL_CMAC_R8(CMAC_IBISR0));
+                                RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0));
                         }
                 }
         } else {
-                RTL_W16(IntrStatus, RTL_R16(IntrStatus));
+                RTL_W16(tp, IntrStatus, RTL_R16(tp, IntrStatus));
         }
 #else
-        RTL_W16(IntrStatus, RTL_R16(IntrStatus));
+        RTL_W16(tp, IntrStatus, RTL_R16(tp, IntrStatus));
 #endif
 }
 
@@ -3293,10 +3319,9 @@
 rtl8168_nic_reset(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int i;
 
-        RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
+        RTL_W32(tp, RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
 
         rtl8168_enable_rxdvgate(dev);
 
@@ -3317,14 +3342,14 @@
         case CFG_METHOD_10:
         case CFG_METHOD_14:
         case CFG_METHOD_15:
-                RTL_W8(ChipCmd, StopReq | CmdRxEnb | CmdTxEnb);
+                RTL_W8(tp, ChipCmd, StopReq | CmdRxEnb | CmdTxEnb);
                 udelay(100);
                 break;
         case CFG_METHOD_11:
         case CFG_METHOD_12:
         case CFG_METHOD_13:
                 for (i = 0; i < 2000; i++) {
-                        if (!(RTL_R8(TxPoll) & NPQ)) break;
+                        if (!(RTL_R8(tp, TxPoll) & NPQ)) break;
                         udelay(100);
                 }
                 break;
@@ -3340,6 +3365,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 mdelay(2);
                 break;
         default:
@@ -3348,12 +3374,12 @@
         }
 
         /* Soft reset the chip. */
-        RTL_W8(ChipCmd, CmdReset);
+        RTL_W8(tp, ChipCmd, CmdReset);
 
         /* Check that the chip has finished the reset. */
         for (i = 100; i > 0; i--) {
                 udelay(100);
-                if ((RTL_R8(ChipCmd) & CmdReset) == 0)
+                if ((RTL_R8(tp, ChipCmd) & CmdReset) == 0)
                         break;
         }
 
@@ -3383,9 +3409,8 @@
 rtl8168_hw_clear_timer_int(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
-        RTL_W32(TimeInt0, 0x0000);
+        RTL_W32(tp, TimeInt0, 0x0000);
 
         switch (tp->mcfg) {
         case CFG_METHOD_4:
@@ -3393,7 +3418,7 @@
         case CFG_METHOD_6:
         case CFG_METHOD_7:
         case CFG_METHOD_8:
-                RTL_W32(TimeInt1, 0x0000);
+                RTL_W32(tp, TimeInt1, 0x0000);
                 break;
         case CFG_METHOD_9:
         case CFG_METHOD_10:
@@ -3419,9 +3444,10 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W32(TimeInt1, 0x0000);
-                RTL_W32(TimeInt2, 0x0000);
-                RTL_W32(TimeInt3, 0x0000);
+        case CFG_METHOD_33:
+                RTL_W32(tp, TimeInt1, 0x0000);
+                RTL_W32(tp, TimeInt2, 0x0000);
+                RTL_W32(tp, TimeInt3, 0x0000);
                 break;
         }
 }
@@ -3430,10 +3456,9 @@
 rtl8168_hw_reset(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         /* Disable interrupts */
-        rtl8168_irq_mask_and_ack(tp, ioaddr);
+        rtl8168_irq_mask_and_ack(tp);
 
         rtl8168_hw_clear_timer_int(dev);
 
@@ -3442,7 +3467,7 @@
 
 static void rtl8168_mac_loopback_test(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
+        struct pci_dev *pdev = tp->pci_dev;
         struct net_device *dev = tp->dev;
         struct sk_buff *skb, *rx_skb;
         dma_addr_t mapping;
@@ -3463,7 +3488,7 @@
         txd = tp->TxDescArray;
         rxd = tp->RxDescArray;
         rx_skb = tp->Rx_skbuff[0];
-        RTL_W32(TxConfig, (RTL_R32(TxConfig) & ~0x00060000) | 0x00020000);
+        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~0x00060000) | 0x00020000);
 
         do {
                 skb = dev_alloc_skb(len + RTK_RX_ALIGN);
@@ -3477,22 +3502,22 @@
         memcpy(skb_put(skb, sizeof(type)), &type, sizeof(type));
         tmpAddr = skb_put(skb, len - 14);
 
-        mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
-        pci_dma_sync_single_for_cpu(tp->pci_dev, le64_to_cpu(mapping),
-                                    len, PCI_DMA_TODEVICE);
+        mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE);
+        dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(mapping),
+                                len, DMA_TO_DEVICE);
         txd->addr = cpu_to_le64(mapping);
         txd->opts2 = 0;
         while (1) {
                 memset(tmpAddr, pattern++, len - 14);
                 pci_dma_sync_single_for_device(tp->pci_dev,
                                                le64_to_cpu(mapping),
-                                               len, PCI_DMA_TODEVICE);
+                                               len, DMA_TO_DEVICE);
                 txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len);
 
-                RTL_W32(RxConfig, RTL_R32(RxConfig)  | AcceptMyPhys);
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig)  | AcceptMyPhys);
 
                 smp_wmb();
-                RTL_W8(TxPoll, NPQ);    /* set polling bit */
+                RTL_W8(tp, TxPoll, NPQ);    /* set polling bit */
 
                 for (i = 0; i < 50; i++) {
                         udelay(200);
@@ -3501,18 +3526,18 @@
                                 break;
                 }
 
-                RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |  AcceptAllPhys));
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |  AcceptAllPhys));
 
                 rx_len = rx_cmd & 0x3FFF;
                 rx_len -= 4;
                 rxd->opts1 = cpu_to_le32(DescOwn | tp->rx_buf_sz);
 
-                pci_dma_sync_single_for_cpu(tp->pci_dev, le64_to_cpu(mapping), len, PCI_DMA_TODEVICE);
+                dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(mapping), len, DMA_TO_DEVICE);
 
                 if (rx_len == len) {
-                        pci_dma_sync_single_for_cpu(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
+                        dma_sync_single_for_cpu(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
                         i = memcmp(skb->data, rx_skb->data, rx_len);
-                        pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
+                        pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
                         if (i == 0) {
 //              dev_printk(KERN_INFO, &tp->pci_dev->dev, "loopback test finished\n",rx_len,len);
                                 break;
@@ -3521,17 +3546,17 @@
 
                 rtl8168_hw_reset(dev);
                 rtl8168_disable_rxdvgate(dev);
-                RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+                RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
         }
         tp->dirty_tx++;
         tp->dirty_rx++;
         tp->cur_tx++;
         tp->cur_rx++;
-        pci_unmap_single(tp->pci_dev, le64_to_cpu(mapping),
-                         len, PCI_DMA_TODEVICE);
-        RTL_W32(TxConfig, RTL_R32(TxConfig) & ~0x00060000);
+        dma_unmap_single(&pdev->dev, le64_to_cpu(mapping),
+                         len, DMA_TO_DEVICE);
+        RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) & ~0x00060000);
         dev_kfree_skb_any(skb);
-        RTL_W16(IntrStatus, 0xFFBF);
+        RTL_W16(tp, IntrStatus, 0xFFBF);
 }
 
 static unsigned int
@@ -3550,10 +3575,9 @@
 rtl8168_xmii_link_ok(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned int retval;
 
-        retval = (RTL_R8(PHYstatus) & LinkStatus) ? 1 : 0;
+        retval = (RTL_R8(tp, PHYstatus) & LinkStatus) ? 1 : 0;
 
         return retval;
 }
@@ -3593,8 +3617,7 @@
 rtl8168dp_10mbps_gphy_para(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
-        u8 status = RTL_R8(PHYstatus);
+        u8 status = RTL_R8(tp, PHYstatus);
 
         if ((status & LinkStatus) && (status & _10bps)) {
                 rtl8168_mdio_write(tp, 0x1f, 0x0000);
@@ -3616,7 +3639,6 @@
 static void
 rtl8168_issue_offset_99_event(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
@@ -3629,21 +3651,22 @@
         case CFG_METHOD_28:
                 if (tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
-                        rtl8168_eri_write(ioaddr, 0x3FC, 4, 0x00000000, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x3FC, 4, 0x00000000, ERIAR_ExGMAC);
                 } else {
-                        rtl8168_eri_write(ioaddr, 0x3FC, 4, 0x083C083C, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x3FC, 4, 0x083C083C, ERIAR_ExGMAC);
                 }
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x3F8, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x3F8, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0x3F8, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x3F8, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1EA, 1, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x1EA, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 }
@@ -3652,17 +3675,15 @@
 static void
 NICChkTypeEnableDashInterrupt(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
         if (tp->DASH) {
                 //
                 // even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication
                 //
                 if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                        rtl8168_enable_dash2_interrupt(tp, ioaddr);
-                        RTL_W16(IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
+                        rtl8168_enable_dash2_interrupt(tp);
+                        RTL_W16(tp, IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
                 } else {
-                        RTL_W16(IntrMask, (ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK));
+                        RTL_W16(tp, IntrMask, (ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK));
                 }
         }
 }
@@ -3672,7 +3693,6 @@
 rtl8168_check_link_status(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int link_status_on;
 
 #ifdef ENABLE_FIBER_SUPPORT
@@ -3693,76 +3713,78 @@
                         rtl8168_hw_config(dev);
 
                         if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) {
-                                if (RTL_R8(PHYstatus) & _1000bpsF) {
-                                        rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
-                                        rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                } else if (RTL_R8(PHYstatus) & _100bps) {
-                                        rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                        rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
+                                        rtl8168_eri_write(tp, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
+                                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                } else if (RTL_R8(tp, PHYstatus) & _100bps) {
+                                        rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
                                 } else {
-                                        rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                        rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
+                                        rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
                                 }
                         } else if ((tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) && netif_running(dev)) {
-                                if (tp->mcfg == CFG_METHOD_16 && (RTL_R8(PHYstatus) & _10bps)) {
-                                        RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptAllPhys);
+                                if (tp->mcfg == CFG_METHOD_16 && (RTL_R8(tp, PHYstatus) & _10bps)) {
+                                        RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptAllPhys);
                                 } else if (tp->mcfg == CFG_METHOD_17) {
-                                        if (RTL_R8(PHYstatus) & _1000bpsF) {
-                                                rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
-                                                rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
-                                        } else if (RTL_R8(PHYstatus) & _100bps) {
-                                                rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                                rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
+                                        if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
+                                                rtl8168_eri_write(tp, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
+                                                rtl8168_eri_write(tp, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
+                                        } else if (RTL_R8(tp, PHYstatus) & _100bps) {
+                                                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                                rtl8168_eri_write(tp, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
                                         } else {
-                                                rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                                rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
+                                                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
                                         }
                                 }
-                        } else if ((tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) && eee_enable ==1) {
+                        } else if ((tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) && tp->eee_enabled == 1) {
                                 /*Full -Duplex  mode*/
-                                if (RTL_R8(PHYstatus)&FullDup) {
+                                if (RTL_R8(tp, PHYstatus)&FullDup) {
                                         rtl8168_mdio_write(tp, 0x1F, 0x0006);
                                         rtl8168_mdio_write(tp, 0x00, 0x5a30);
                                         rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                                        if (RTL_R8(PHYstatus) & (_10bps | _100bps))
-                                                RTL_W32(TxConfig, (RTL_R32(TxConfig) & ~BIT_19) | BIT_25);
+                                        if (RTL_R8(tp, PHYstatus) & (_10bps | _100bps))
+                                                RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~BIT_19) | BIT_25);
 
                                 } else {
                                         rtl8168_mdio_write(tp, 0x1F, 0x0006);
                                         rtl8168_mdio_write(tp, 0x00, 0x5a00);
                                         rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                                        if (RTL_R8(PHYstatus) & (_10bps | _100bps))
-                                                RTL_W32(TxConfig, (RTL_R32(TxConfig) & ~BIT_19) | (InterFrameGap << TxInterFrameGapShift));
+                                        if (RTL_R8(tp, PHYstatus) & (_10bps | _100bps))
+                                                RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~BIT_19) | (InterFrameGap << TxInterFrameGapShift));
                                 }
                         } else if ((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                                     tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
                                     tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
                                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                                     tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) &&
-                                   netif_running(dev)) {
-                                if (RTL_R8(PHYstatus)&FullDup)
-                                        RTL_W32(TxConfig, (RTL_R32(TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
+                                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                                    tp->mcfg == CFG_METHOD_33) && netif_running(dev)) {
+                                if (RTL_R8(tp, PHYstatus)&FullDup)
+                                        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
                                 else
-                                        RTL_W32(TxConfig, (RTL_R32(TxConfig) | BIT_25) & ~(BIT_19 | BIT_24));
+                                        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_25) & ~(BIT_19 | BIT_24));
                         }
 
                         if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-                            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+                            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                            tp->mcfg == CFG_METHOD_33) {
                                 /*half mode*/
-                                if (!(RTL_R8(PHYstatus)&FullDup)) {
+                                if (!(RTL_R8(tp, PHYstatus)&FullDup)) {
                                         rtl8168_mdio_write(tp, 0x1F, 0x0000);
                                         rtl8168_mdio_write(tp, MII_ADVERTISE, rtl8168_mdio_read(tp, MII_ADVERTISE)&~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM));
                                 }
                         }
 
-                        if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) && (RTL_R8(PHYstatus) & _10bps)) {
+                        if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                             tp->mcfg == CFG_METHOD_33) && (RTL_R8(tp, PHYstatus) & _10bps)) {
                                 u32 csi_tmp;
 
-                                csi_tmp = rtl8168_eri_read(ioaddr, 0x1D0, 1, ERIAR_ExGMAC);
+                                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
                                 csi_tmp |= BIT_1;
-                                rtl8168_eri_write(ioaddr, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+                                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
                         }
 
                         rtl8168_hw_start(dev);
@@ -3827,7 +3849,7 @@
                 case CFG_METHOD_27:
                 case CFG_METHOD_28:
                         if (tp->issue_offset_99_event) {
-                                if (!(RTL_R8(PHYstatus) & PowerSaveStatus)) {
+                                if (!(RTL_R8(tp, PHYstatus) & PowerSaveStatus)) {
                                         tp->issue_offset_99_event = FALSE;
                                         rtl8168_issue_offset_99_event(tp);
                                 }
@@ -3876,7 +3898,8 @@
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
                 val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
                 if (val != 0x0050) {
                         rtl8168_set_phy_mcu_patch_request(tp);
@@ -3896,7 +3919,8 @@
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
                 val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
                 if (val != 0x0500) {
                         rtl8168_set_phy_mcu_patch_request(tp);
@@ -3911,12 +3935,11 @@
 rtl8168_wait_ll_share_fifo_ready(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int i;
 
         for (i = 0; i < 10; i++) {
                 udelay(100);
-                if (RTL_R16(0xD2) & BIT_9)
+                if (RTL_R16(tp, 0xD2) & BIT_9)
                         break;
         }
 }
@@ -3924,7 +3947,6 @@
 static void
 rtl8168_disable_pci_offset_99(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
@@ -3940,9 +3962,10 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x3F2, 2, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
-                rtl8168_eri_write(ioaddr, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
@@ -3954,6 +3977,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00);
                 break;
         }
@@ -3962,7 +3986,6 @@
 static void
 rtl8168_enable_pci_offset_99(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
@@ -3973,6 +3996,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99);
                 break;
         }
@@ -3990,13 +4014,14 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x3F2, 2, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
                 if (!(tp->org_pci_offset_99 & (BIT_5 | BIT_6)))
                         csi_tmp |= BIT_1;
                 if (!(tp->org_pci_offset_99 & BIT_2))
                         csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 }
@@ -4004,15 +4029,14 @@
 static void
 rtl8168_init_pci_offset_99(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
         case CFG_METHOD_26:
                 if (tp->org_pci_offset_99 & BIT_2) {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0x5C2, 1, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0x5C2, 1, ERIAR_ExGMAC);
                         csi_tmp &= ~BIT_1;
-                        rtl8168_eri_write(ioaddr, 0x5C2, 1, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x5C2, 1, csi_tmp, ERIAR_ExGMAC);
                 }
                 break;
         }
@@ -4030,13 +4054,14 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x3F2, 2, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~( BIT_8 | BIT_9  | BIT_10 | BIT_11  | BIT_12  | BIT_13  | BIT_14 | BIT_15 );
                 csi_tmp |= ( BIT_9 | BIT_10 | BIT_13  | BIT_14 | BIT_15 );
-                rtl8168_eri_write(ioaddr, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x3F5, 1, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x3F5, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_6 | BIT_7;
-                rtl8168_eri_write(ioaddr, 0x3F5, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x3F5, 1, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mac_ocp_write(tp, 0xE02C, 0x1880);
                 rtl8168_mac_ocp_write(tp, 0xE02E, 0x4880);
                 break;
@@ -4044,22 +4069,23 @@
 
         switch (tp->mcfg) {
         case CFG_METHOD_26:
-                rtl8168_eri_write(ioaddr, 0x5C0, 1, 0xFA, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x5C0, 1, 0xFA, ERIAR_ExGMAC);
                 break;
         }
 
         switch (tp->mcfg) {
         case CFG_METHOD_26:
                 if (tp->org_pci_offset_99 & BIT_2) {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0x5C8, 1, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0x5C8, 1, ERIAR_ExGMAC);
                         csi_tmp |= BIT_0;
-                        rtl8168_eri_write(ioaddr, 0x5C8, 1, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x5C8, 1, csi_tmp, ERIAR_ExGMAC);
                 }
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 if (tp->org_pci_offset_99 & BIT_2)
                         rtl8168_mac_ocp_write(tp, 0xE0A2,  rtl8168_mac_ocp_read(tp, 0xE0A2) | BIT_0);
                 break;
@@ -4067,12 +4093,12 @@
 
         switch (tp->mcfg) {
         case CFG_METHOD_23:
-                rtl8168_eri_write(ioaddr, 0x2E8, 2, 0x883C, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2EA, 2, 0x8C12, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E8, 2, 0x883C, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EA, 2, 0x8C12, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
                 break;
         case CFG_METHOD_21:
         case CFG_METHOD_22:
@@ -4085,12 +4111,13 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                rtl8168_eri_write(ioaddr, 0x2E8, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2EA, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                rtl8168_eri_write(tp, 0x2E8, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EA, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
                 break;
         }
 
@@ -4102,9 +4129,9 @@
         case CFG_METHOD_26:
         case CFG_METHOD_27:
         case CFG_METHOD_28:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x3FA, 2, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x3FA, 2, ERIAR_ExGMAC);
                 csi_tmp |= BIT_14;
-                rtl8168_eri_write(ioaddr, 0x3FA, 2, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x3FA, 2, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
@@ -4113,7 +4140,7 @@
         case CFG_METHOD_29:
         case CFG_METHOD_30:
                 if (tp->org_pci_offset_99 & BIT_2)
-                        RTL_W8(0xB6, RTL_R8(0xB6) | BIT_0);
+                        RTL_W8(tp, 0xB6, RTL_R8(tp, 0xB6) | BIT_0);
                 break;
         }
 
@@ -4123,7 +4150,6 @@
 static void
 rtl8168_disable_pci_offset_180(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
@@ -4136,15 +4162,16 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1E2, 1, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_2;
-                rtl8168_eri_write(ioaddr, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
         switch (tp->mcfg) {
         case CFG_METHOD_26:
-                rtl8168_eri_write(ioaddr, 0x1E9, 1, 0x0A, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E9, 1, 0x0A, ERIAR_ExGMAC);
                 break;
         }
 }
@@ -4152,31 +4179,31 @@
 static void
 rtl8168_enable_pci_offset_180(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
         case CFG_METHOD_25:
         case CFG_METHOD_28:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1E8, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(0x0000FF00);
                 csi_tmp |= (0x00006400);
-                rtl8168_eri_write(ioaddr, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1E4, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(0x0000FF00);
-                rtl8168_eri_write(ioaddr, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1E8, 4, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(0x0000FFF0);
                 csi_tmp |= (0x00000640);
-                rtl8168_eri_write(ioaddr, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1E4, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(0x0000FF00);
-                rtl8168_eri_write(ioaddr, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
@@ -4188,15 +4215,15 @@
         case CFG_METHOD_28:
         case CFG_METHOD_29:
         case CFG_METHOD_30:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1E2, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_2;
-                rtl8168_eri_write(ioaddr, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
         switch (tp->mcfg) {
         case CFG_METHOD_26:
-                rtl8168_eri_write(ioaddr, 0x1E9, 1, 0x64, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1E9, 1, 0x64, ERIAR_ExGMAC);
                 break;
         }
 
@@ -4229,6 +4256,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_issue_offset_99_event(tp);
                 break;
         }
@@ -4246,6 +4274,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_disable_pci_offset_99(tp);
                 break;
         }
@@ -4259,6 +4288,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_disable_pci_offset_180(tp);
                 break;
         }
@@ -4267,26 +4297,21 @@
 static void
 rtl8168_enable_cfg9346_write(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        RTL_W8(Cfg9346, RTL_R8(Cfg9346) | Cfg9346_Unlock);
+        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock);
 }
 
 static void
 rtl8168_disable_cfg9346_write(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        RTL_W8(Cfg9346, RTL_R8(Cfg9346) & ~Cfg9346_Unlock);
+        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock);
 }
 
 static void
 rtl8168_hw_d3_para(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
-        RTL_W16(RxMaxSize, RX_BUF_SIZE);
+        RTL_W16(tp, RxMaxSize, RX_BUF_SIZE);
 
         switch (tp->mcfg) {
         case CFG_METHOD_14:
@@ -4308,10 +4333,11 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7);
+        case CFG_METHOD_33:
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
                 rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
-                RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
                 rtl8168_disable_cfg9346_write(tp);
                 break;
         }
@@ -4321,19 +4347,20 @@
 #endif
 
         if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) {
-                rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
         } else if (tp->mcfg == CFG_METHOD_16) {
-                rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
         }
 
         if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
             tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
             tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
-                rtl8168_eri_write(ioaddr, 0x2F8, 2, 0x0064, ERIAR_ExGMAC);
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
+                rtl8168_eri_write(tp, 0x2F8, 2, 0x0064, ERIAR_ExGMAC);
         }
 
         if (tp->bios_setting & BIT_28) {
@@ -4360,17 +4387,14 @@
                 }
         }
 
-        if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD);
-        }
-
         rtl8168_set_pci_99_180_exit_driver_para(dev);
 
         /*disable ocp phy power saving*/
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32)
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33)
                 if (!tp->dash_printer_enabled)
                         rtl8168_disable_ocp_phy_power_saving(dev);
 
@@ -4381,19 +4405,18 @@
 rtl8168_enable_magic_packet(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->HwSuppMagicPktVer) {
         case WAKEUP_MAGIC_PACKET_V1:
                 rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(Config3, RTL_R8(Config3) | MagicPacket);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) | MagicPacket);
                 rtl8168_disable_cfg9346_write(tp);
                 break;
         case WAKEUP_MAGIC_PACKET_V2:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 }
@@ -4401,19 +4424,18 @@
 rtl8168_disable_magic_packet(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->HwSuppMagicPktVer) {
         case WAKEUP_MAGIC_PACKET_V1:
                 rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(Config3, RTL_R8(Config3) & ~MagicPacket);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~MagicPacket);
                 rtl8168_disable_cfg9346_write(tp);
                 break;
         case WAKEUP_MAGIC_PACKET_V2:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 }
@@ -4424,7 +4446,6 @@
 rtl8168_get_hw_wol(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u8 options;
         u32 csi_tmp;
         unsigned long flags;
@@ -4433,17 +4454,17 @@
         spin_lock_irqsave(&tp->lock, flags);
 
         tp->wol_opts = 0;
-        options = RTL_R8(Config1);
+        options = RTL_R8(tp, Config1);
         if (!(options & PMEnable))
                 goto out_unlock;
 
-        options = RTL_R8(Config3);
+        options = RTL_R8(tp, Config3);
         if (options & LinkUp)
                 tp->wol_opts |= WAKE_PHY;
 
         switch (tp->HwSuppMagicPktVer) {
         case WAKEUP_MAGIC_PACKET_V2:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
                 if (csi_tmp & BIT_0)
                         tp->wol_opts |= WAKE_MAGIC;
                 break;
@@ -4453,7 +4474,7 @@
                 break;
         }
 
-        options = RTL_R8(Config5);
+        options = RTL_R8(tp, Config5);
         if (options & UWF)
                 tp->wol_opts |= WAKE_UCAST;
         if (options & BWF)
@@ -4471,7 +4492,6 @@
 rtl8168_set_hw_wol(struct net_device *dev, u32 wolopts)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int i,tmp;
         static struct {
                 u32 opt;
@@ -4503,10 +4523,10 @@
         rtl8168_enable_cfg9346_write(tp);
 
         for (i = 0; i < tmp; i++) {
-                u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
+                u8 options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
                 if (wolopts & cfg[i].opt)
                         options |= cfg[i].mask;
-                RTL_W8(cfg[i].reg, options);
+                RTL_W8(tp, cfg[i].reg, options);
         }
 
         rtl8168_disable_cfg9346_write(tp);
@@ -4555,7 +4575,6 @@
 rtl8168_powerdown_pll(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
 #ifdef ENABLE_FIBER_SUPPORT
         if (HW_FIBER_MODE_ENABLED(tp))
@@ -4575,9 +4594,10 @@
                     tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_23 ||
                     tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
                     tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                    tp->mcfg == CFG_METHOD_33) {
                         rtl8168_enable_cfg9346_write(tp);
-                        RTL_W8(Config2, RTL_R8(Config2) | PMSTS_En);
+                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En);
                         rtl8168_disable_cfg9346_write(tp);
                 }
 
@@ -4603,7 +4623,7 @@
                 if (tp->DASH)
                         auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
 
-                if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(CPlusCmd) & ASF))
+                if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
                         auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
 
                 giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000) & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
@@ -4611,7 +4631,7 @@
                 rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
                 rtl8168_phy_restart_nway(dev);
 
-                RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
 
                 return;
         }
@@ -4619,7 +4639,7 @@
         if (tp->DASH)
                 return;
 
-        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(CPlusCmd) & ASF))
+        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
                 return;
 
         rtl8168_phy_power_down(dev);
@@ -4646,17 +4666,18 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(PMCH, RTL_R8(PMCH) & ~BIT_7);
+        case CFG_METHOD_33:
+                RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
                 break;
         }
 
         switch (tp->mcfg) {
         case CFG_METHOD_14 ... CFG_METHOD_15:
-                RTL_W8(0xD0, RTL_R8(0xD0) & ~BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
                 break;
-        case CFG_METHOD_16 ... CFG_METHOD_32:
-                RTL_W8(0xD0, RTL_R8(0xD0) & ~BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_6);
+        case CFG_METHOD_16 ... CFG_METHOD_33:
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
                 break;
         }
 }
@@ -4664,8 +4685,6 @@
 static void rtl8168_powerup_pll(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
-
 
         switch (tp->mcfg) {
         case CFG_METHOD_9:
@@ -4689,7 +4708,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(PMCH, RTL_R8(PMCH) | BIT_7 | BIT_6);
+        case CFG_METHOD_33:
+                RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6);
                 break;
         }
 
@@ -4702,7 +4722,6 @@
                 struct ethtool_wolinfo *wol)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u8 options;
         unsigned long flags;
 
@@ -4717,7 +4736,7 @@
 
         spin_lock_irqsave(&tp->lock, flags);
 
-        options = RTL_R8(Config1);
+        options = RTL_R8(tp, Config1);
         if (!(options & PMEnable))
                 goto out_unlock;
 
@@ -4783,11 +4802,13 @@
         int rc = -EINVAL;
 
         if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
                 //Disable Giga Lite
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
                 rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_9);
-                if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32)
+                if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                    tp->mcfg == CFG_METHOD_33)
                         rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A40);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -4987,7 +5008,6 @@
                     u32 data)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned long flags;
 
         if (tp->mcfg == CFG_METHOD_DEFAULT)
@@ -5000,7 +5020,7 @@
         else
                 tp->cp_cmd &= ~RxChkSum;
 
-        RTL_W16(CPlusCmd, tp->cp_cmd);
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
 
         spin_unlock_irqrestore(&tp->lock, flags);
 
@@ -5038,7 +5058,6 @@
                          struct vlan_group *grp)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         unsigned long flags;
 
         spin_lock_irqsave(&tp->lock, flags);
@@ -5047,8 +5066,8 @@
                 tp->cp_cmd |= RxVlan;
         else
                 tp->cp_cmd &= ~RxVlan;
-        RTL_W16(CPlusCmd, tp->cp_cmd);
-        RTL_R16(CPlusCmd);
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+        RTL_R16(tp, CPlusCmd);
         spin_unlock_irqrestore(&tp->lock, flags);
 }
 
@@ -5142,16 +5161,15 @@
                                    netdev_features_t features)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 rx_config;
 
-        rx_config = RTL_R32(RxConfig);
+        rx_config = RTL_R32(tp, RxConfig);
         if (features & NETIF_F_RXALL)
                 rx_config |= (AcceptErr | AcceptRunt);
         else
                 rx_config &= ~(AcceptErr | AcceptRunt);
 
-        RTL_W32(RxConfig, rx_config);
+        RTL_W32(tp, RxConfig, rx_config);
 
         if (features & NETIF_F_RXCSUM)
                 tp->cp_cmd |= RxChkSum;
@@ -5163,8 +5181,8 @@
         else
                 tp->cp_cmd &= ~RxVlan;
 
-        RTL_W16(CPlusCmd, tp->cp_cmd);
-        RTL_R16(CPlusCmd);
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+        RTL_R16(tp, CPlusCmd);
 
         return 0;
 }
@@ -5196,7 +5214,6 @@
                              )
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u8 status;
         u8 autoneg, duplex;
         u32 speed = 0;
@@ -5252,7 +5269,7 @@
                 lp_advertising = 0;
         }
 
-        status = RTL_R8(PHYstatus);
+        status = RTL_R8(tp, PHYstatus);
 
         if (status & LinkStatus) {
                 /*link on*/
@@ -5345,7 +5362,7 @@
         data = (u8*)p + 256 * 2;
 
         for (i = 0; i < R8168_EPHY_REGS_SIZE/2; i++) {
-                *(u16*)data = rtl8168_ephy_read(ioaddr, i);
+                *(u16*)data = rtl8168_ephy_read(tp, i);
                 data += 2;
         }
         data = (u8*)p + 256 * 3;
@@ -5358,7 +5375,7 @@
                 break;
         default:
                 for (i = 0; i < R8168_ERI_REGS_SIZE; i+=4) {
-                        *(u32*)data = rtl8168_eri_read(ioaddr, i , 4, ERIAR_ExGMAC);
+                        *(u32*)data = rtl8168_eri_read(tp, i , 4, ERIAR_ExGMAC);
                         data += 4;
                 }
                 break;
@@ -5426,7 +5443,6 @@
                           u64 *data)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         struct rtl8168_counters *counters;
         dma_addr_t paddr;
         u32 cmd;
@@ -5441,13 +5457,13 @@
                 return;
 
         spin_lock_irqsave(&tp->lock, flags);
-        RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
+        RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
         cmd = (u64)paddr & DMA_BIT_MASK(32);
-        RTL_W32(CounterAddrLow, cmd);
-        RTL_W32(CounterAddrLow, cmd | CounterDump);
+        RTL_W32(tp, CounterAddrLow, cmd);
+        RTL_W32(tp, CounterAddrLow, cmd | CounterDump);
 
         WaitCnt = 0;
-        while (RTL_R32(CounterAddrLow) & CounterDump) {
+        while (RTL_R32(tp, CounterAddrLow) & CounterDump) {
                 udelay(10);
 
                 WaitCnt++;
@@ -5605,7 +5621,6 @@
 
 static int rtl8168_enable_EEE(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         int ret;
         u16 data;
         u32 csi_tmp;
@@ -5630,10 +5645,10 @@
                 rtl8168_mdio_write(tp, 0x0D, 0x4007);
                 rtl8168_mdio_write(tp, 0x0E, 0x0006);
                 rtl8168_mdio_write(tp, 0x0D, 0x0000);
-                if ((RTL_R8(Config4)&0x40) && (RTL_R8(0x6D) & BIT_7)) {
+                if ((RTL_R8(tp, Config4)&0x40) && (RTL_R8(tp, 0x6D) & BIT_7)) {
                         rtl8168_mdio_write(tp, 0x1F, 0x0005);
                         rtl8168_mdio_write(tp, 0x05, 0x8AC8);
-                        rtl8168_mdio_write(tp, 0x06, RTL_R16(tp->NicCustLedValue));
+                        rtl8168_mdio_write(tp, 0x06, RTL_R16(tp, tp->NicCustLedValue));
                         rtl8168_mdio_write(tp, 0x05, 0x8B82);
                         data = rtl8168_mdio_read(tp, 0x06) | 0x0010;
                         rtl8168_mdio_write(tp, 0x05, 0x8B82);
@@ -5644,8 +5659,8 @@
 
         case CFG_METHOD_16:
         case CFG_METHOD_17:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC) | 0x0003;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC) | 0x0003;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mdio_write(tp,0x1F , 0x0004);
                 rtl8168_mdio_write(tp,0x1F , 0x0007);
                 rtl8168_mdio_write(tp,0x1E , 0x0020);
@@ -5667,9 +5682,9 @@
         case CFG_METHOD_18:
         case CFG_METHOD_19:
         case CFG_METHOD_20:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1 | BIT_0;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mdio_write(tp, 0x1F, 0x0007);
                 rtl8168_mdio_write(tp, 0x1e, 0x0020);
                 data = rtl8168_mdio_read(tp, 0x15);
@@ -5700,9 +5715,10 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1 | BIT_0;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 data = rtl8168_mdio_read(tp, 0x11);
                 rtl8168_mdio_write(tp, 0x11, data | BIT_4);
@@ -5722,6 +5738,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
                 rtl8168_set_eth_phy_bit(tp, 0x11, BIT_9);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
@@ -5737,6 +5754,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_oob_mutex_lock(tp);
                 break;
         }
@@ -5749,13 +5767,14 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_set_phy_mcu_patch_request(tp);
                 break;
         }
 
         switch (tp->mcfg) {
         case CFG_METHOD_25:
-                rtl8168_eri_write(ioaddr, 0x1EA, 1, 0xFA, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1EA, 1, 0xFA, ERIAR_ExGMAC);
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 data = rtl8168_mdio_read(tp, 0x10);
@@ -5824,6 +5843,7 @@
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
                 data |= BIT_0;
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
@@ -5848,6 +5868,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_clear_phy_mcu_patch_request(tp);
                 break;
         }
@@ -5858,6 +5879,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_oob_mutex_unlock(tp);
                 break;
         }
@@ -5867,7 +5889,6 @@
 
 static int rtl8168_disable_EEE(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         int ret;
         u16 data;
         u32 csi_tmp;
@@ -5893,7 +5914,7 @@
                 rtl8168_mdio_write(tp, 0x0E, 0x0000);
                 rtl8168_mdio_write(tp, 0x0D, 0x0000);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                if (RTL_R8(Config4) & 0x40) {
+                if (RTL_R8(tp, Config4) & 0x40) {
                         rtl8168_mdio_write(tp, 0x1F, 0x0005);
                         rtl8168_mdio_write(tp, 0x05, 0x8B82);
                         data = rtl8168_mdio_read(tp, 0x06) & ~0x0010;
@@ -5905,8 +5926,8 @@
 
         case CFG_METHOD_16:
         case CFG_METHOD_17:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0,4, ERIAR_ExGMAC)& ~0x0003;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0,4, ERIAR_ExGMAC)& ~0x0003;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mdio_write(tp, 0x1F, 0x0005);
                 rtl8168_mdio_write(tp, 0x05, 0x8B85);
                 data = rtl8168_mdio_read(tp, 0x06) & ~0x2000;
@@ -5929,9 +5950,9 @@
         case CFG_METHOD_18:
         case CFG_METHOD_19:
         case CFG_METHOD_20:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_1 | BIT_0);
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mdio_write(tp, 0x1F, 0x0005);
                 rtl8168_mdio_write(tp, 0x05, 0x8B85);
                 data = rtl8168_mdio_read(tp, 0x06);
@@ -5963,9 +5984,10 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_1 | BIT_0);
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 data = rtl8168_mdio_read(tp, 0x11);
                 rtl8168_mdio_write(tp, 0x11, data & ~BIT_4);
@@ -5998,6 +6020,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_oob_mutex_lock(tp);
                 break;
         }
@@ -6010,13 +6033,14 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_set_phy_mcu_patch_request(tp);
                 break;
         }
 
         switch (tp->mcfg) {
         case CFG_METHOD_25:
-                rtl8168_eri_write(ioaddr, 0x1EA, 1, 0x00, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1EA, 1, 0x00, ERIAR_ExGMAC);
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0A42);
                 data = rtl8168_mdio_read(tp, 0x16);
@@ -6045,6 +6069,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 data = rtl8168_mac_ocp_read(tp, 0xE052);
                 data &= ~(BIT_0);
                 rtl8168_mac_ocp_write(tp, 0xE052, data);
@@ -6068,6 +6093,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_clear_phy_mcu_patch_request(tp);
                 break;
         }
@@ -6078,6 +6104,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_oob_mutex_unlock(tp);
                 break;
         }
@@ -6091,11 +6118,13 @@
         unsigned long flags;
         int ret, bmcr;
 
-        if (unlikely(tp->rtk_enable_diag))
-                return -EBUSY;
-
         spin_lock_irqsave(&tp->lock, flags);
 
+        if (unlikely(tp->rtk_enable_diag)) {
+                spin_unlock_irqrestore(&tp->lock, flags);
+                return -EBUSY;
+        }
+
         /* if autoneg is off, it's an error */
         rtl8168_mdio_write(tp, 0x1F, 0x0000);
         bmcr = rtl8168_mdio_read(tp, MII_BMCR);
@@ -6118,28 +6147,24 @@
 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *eee)
 {
         struct rtl8168_private *tp = netdev_priv(net);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 lp, adv, supported = 0;
         unsigned long flags;
         u16 val;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
+        case CFG_METHOD_21 ... CFG_METHOD_33:
                 break;
         default:
                 return -EOPNOTSUPP;
         }
 
-        if (unlikely(tp->rtk_enable_diag))
-                return -EBUSY;
-
         spin_lock_irqsave(&tp->lock, flags);
 
+        if (unlikely(tp->rtk_enable_diag)) {
+                spin_unlock_irqrestore(&tp->lock, flags);
+                return -EBUSY;
+        }
+
         rtl8168_mdio_write(tp, 0x1F, 0x0A5C);
         val = rtl8168_mdio_read(tp, 0x12);
         supported = mmd_eee_cap_to_ethtool_sup_t(val);
@@ -6151,7 +6176,7 @@
         val = rtl8168_mdio_read(tp, 0x11);
         lp = mmd_eee_adv_to_ethtool_adv_t(val);
 
-        val = rtl8168_eri_read(ioaddr, 0x1B0, 2, ERIAR_ExGMAC);
+        val = rtl8168_eri_read(tp, 0x1B0, 2, ERIAR_ExGMAC);
         val &= BIT_1 | BIT_0;
 
         rtl8168_mdio_write(tp, 0x1F, 0x0000);
@@ -6174,12 +6199,7 @@
         unsigned long flags;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
+        case CFG_METHOD_21 ... CFG_METHOD_33:
                 break;
         default:
                 return -EOPNOTSUPP;
@@ -6321,6 +6341,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x8045);
                 rtl8168_mdio_write(tp, 0x14, 0x0000);
@@ -6398,6 +6419,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x8045);
                 rtl8168_mdio_write(tp, 0x14, 0x2444);
@@ -6421,12 +6443,12 @@
 
 #endif
 
-static void rtl8168_get_mac_version(struct rtl8168_private *tp, void __iomem *ioaddr)
+static void rtl8168_get_mac_version(struct rtl8168_private *tp)
 {
         u32 reg,val32;
         u32 ICVerID;
 
-        val32 = RTL_R32(TxConfig);
+        val32 = RTL_R32(tp, TxConfig);
         reg = val32 & 0x7c800000;
         ICVerID = val32 & 0x00700000;
 
@@ -6486,7 +6508,7 @@
                         tp->mcfg = CFG_METHOD_11;
                 } else if (ICVerID == 0x00200000) {
                         tp->mcfg = CFG_METHOD_12;
-                        RTL_W32(0xD0, RTL_R32(0xD0) | 0x00020000);
+                        RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
                 } else if (ICVerID == 0x00300000) {
                         tp->mcfg = CFG_METHOD_13;
                 } else {
@@ -6600,8 +6622,10 @@
                         tp->mcfg = CFG_METHOD_31;
                 } else if (ICVerID == 0x00200000) {
                         tp->mcfg = CFG_METHOD_32;
+                } else if (ICVerID == 0x00300000) {
+                        tp->mcfg = CFG_METHOD_33;
                 } else {
-                        tp->mcfg = CFG_METHOD_32;
+                        tp->mcfg = CFG_METHOD_33;
                         tp->HwIcVerUnknown = TRUE;
                 }
 
@@ -6680,7 +6704,6 @@
 
 static u8 rtl8168_efuse_read(struct rtl8168_private *tp, u16 reg)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         u8 efuse_data = 0;
         u32 temp;
         int cnt;
@@ -6690,36 +6713,36 @@
 
         if (tp->efuse_ver == EFUSE_SUPPORT_V1) {
                 temp = EFUSE_READ | ((reg & EFUSE_Reg_Mask) << EFUSE_Reg_Shift);
-                RTL_W32(EFUSEAR, temp);
+                RTL_W32(tp, EFUSEAR, temp);
 
                 cnt = 0;
                 do {
                         udelay(100);
-                        temp = RTL_R32(EFUSEAR);
+                        temp = RTL_R32(tp, EFUSEAR);
                         cnt++;
                 } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt));
 
                 if (cnt == EFUSE_Check_Cnt)
                         efuse_data = EFUSE_READ_FAIL;
                 else
-                        efuse_data = (u8)(RTL_R32(EFUSEAR) & EFUSE_Data_Mask);
+                        efuse_data = (u8)(RTL_R32(tp, EFUSEAR) & EFUSE_Data_Mask);
         } else  if (tp->efuse_ver == EFUSE_SUPPORT_V2) {
                 temp = (reg/2) & 0x03ff;
                 temp <<= 17;
                 temp |= EFUSE_READ;
-                RTL_W32(EFUSEAR, temp);
+                RTL_W32(tp, EFUSEAR, temp);
 
                 cnt = 0;
                 do {
                         udelay(100);
-                        temp = RTL_R32(EFUSEAR);
+                        temp = RTL_R32(tp, EFUSEAR);
                         cnt++;
                 } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt));
 
                 if (cnt == EFUSE_Check_Cnt) {
                         efuse_data = EFUSE_READ_FAIL;
                 } else {
-                        temp = RTL_R32(EFUSEAR);
+                        temp = RTL_R32(tp, EFUSEAR);
                         temp = rtl8168_decode_efuse_cmd(tp, temp);
 
                         if (reg%2) {
@@ -6733,19 +6756,19 @@
                 temp = (reg/2) & 0x03ff;
                 temp <<= 16;
                 temp |= EFUSE_READ_V3;
-                RTL_W32(EFUSEAR, temp);
+                RTL_W32(tp, EFUSEAR, temp);
 
                 cnt = 0;
                 do {
                         udelay(100);
-                        temp = RTL_R32(EFUSEAR);
+                        temp = RTL_R32(tp, EFUSEAR);
                         cnt++;
                 } while ((temp & BIT_31) && (cnt < EFUSE_Check_Cnt));
 
                 if (cnt == EFUSE_Check_Cnt) {
                         efuse_data = EFUSE_READ_FAIL;
                 } else {
-                        temp = RTL_R32(EFUSEAR);
+                        temp = RTL_R32(tp, EFUSEAR);
                         temp = rtl8168_decode_efuse_cmd(tp, temp);
 
                         if (reg%2) {
@@ -6765,20 +6788,16 @@
 static void
 rtl8168_tally_counter_addr_fill(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
         if (!tp->tally_paddr)
                 return;
 
-        RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32);
-        RTL_W32(CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32)));
+        RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
+        RTL_W32(tp, CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32)));
 }
 
 static void
 rtl8168_tally_counter_clear(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
         if (tp->mcfg == CFG_METHOD_1 || tp->mcfg == CFG_METHOD_2 ||
             tp->mcfg == CFG_METHOD_3 )
                 return;
@@ -6786,8 +6805,8 @@
         if (!tp->tally_paddr)
                 return;
 
-        RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32);
-        RTL_W32(CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
+        RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
+        RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
 }
 
 static int
@@ -6828,20 +6847,16 @@
 void
 rtl8168_enable_now_is_oob(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
         if ( tp->HwSuppNowIsOobVer == 1 ) {
-                RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) | Now_is_oob);
+                RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | Now_is_oob);
         }
 }
 
 void
 rtl8168_disable_now_is_oob(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
         if ( tp->HwSuppNowIsOobVer == 1 ) {
-                RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) & ~Now_is_oob);
+                RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) & ~Now_is_oob);
         }
 }
 
@@ -6849,10 +6864,9 @@
 rtl8168_exit_oob(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u16 data16;
 
-        RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |  AcceptAllPhys));
+        RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |  AcceptAllPhys));
 
         switch (tp->mcfg) {
         case CFG_METHOD_23:
@@ -6860,12 +6874,12 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_dash2_disable_txrx(dev);
                 break;
         }
 
-        if (tp->DASH) {
-                rtl8168_driver_stop(tp);
+        if (HW_DASH_SUPPORT_DASH(tp)) {
                 rtl8168_driver_start(tp);
 #ifdef ENABLE_DASH_SUPPORT
                 DashHwInit(dev);
@@ -6876,24 +6890,24 @@
         switch (tp->mcfg) {
         case CFG_METHOD_18:
         case CFG_METHOD_19:
-                RTL_W32(MACOCP, 0xE5A90000);
-                RTL_W32(MACOCP, 0xF2100010);
+                RTL_W32(tp, MACOCP, 0xE5A90000);
+                RTL_W32(tp, MACOCP, 0xF2100010);
                 break;
         case CFG_METHOD_20:
-                RTL_W32(MACOCP, 0xE5A90000);
-                RTL_W32(MACOCP, 0xE4640000);
-                RTL_W32(MACOCP, 0xF2100010);
+                RTL_W32(tp, MACOCP, 0xE5A90000);
+                RTL_W32(tp, MACOCP, 0xE4640000);
+                RTL_W32(tp, MACOCP, 0xF2100010);
                 break;
         case CFG_METHOD_21:
         case CFG_METHOD_22:
-                RTL_W32(MACOCP, 0x605E0000);
-                RTL_W32(MACOCP, (0xE05E << 16) | (RTL_R32(MACOCP) & 0xFFFE));
-                RTL_W32(MACOCP, 0xE9720000);
-                RTL_W32(MACOCP, 0xF2140010);
+                RTL_W32(tp, MACOCP, 0x605E0000);
+                RTL_W32(tp, MACOCP, (0xE05E << 16) | (RTL_R32(tp, MACOCP) & 0xFFFE));
+                RTL_W32(tp, MACOCP, 0xE9720000);
+                RTL_W32(tp, MACOCP, 0xF2140010);
                 break;
         case CFG_METHOD_26:
-                RTL_W32(MACOCP, 0xE05E00FF);
-                RTL_W32(MACOCP, 0xE9720000);
+                RTL_W32(tp, MACOCP, 0xE05E00FF);
+                RTL_W32(tp, MACOCP, 0xE9720000);
                 rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
                 break;
         }
@@ -6904,7 +6918,7 @@
         switch (tp->mcfg) {
         case CFG_METHOD_21:
         case CFG_METHOD_22:
-                rtl8168_eri_write(ioaddr, 0x174, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x174, 2, 0x0000, ERIAR_ExGMAC);
                 rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
                 break;
         case CFG_METHOD_24:
@@ -6913,16 +6927,17 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                rtl8168_eri_write(ioaddr, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                rtl8168_eri_write(tp, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
                 rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
                 break;
         case CFG_METHOD_29:
         case CFG_METHOD_30: {
                 u32 csi_tmp;
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x174, 2, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x174, 2, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_8);
                 csi_tmp |= (BIT_15);
-                rtl8168_eri_write(ioaddr, 0x174, 2, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x174, 2, csi_tmp, ERIAR_ExGMAC);
                 rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
         }
         break;
@@ -6952,6 +6967,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_disable_now_is_oob(tp);
 
                 data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) & ~BIT_14;
@@ -6971,6 +6987,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 if (rtl8168_is_ups_resume(dev)) {
                         rtl8168_wait_phy_ups_resume(dev, 2);
                         rtl8168_clear_ups_resume_bit(dev);
@@ -6990,7 +7007,6 @@
 rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->mcfg) {
         case CFG_METHOD_21:
@@ -7005,9 +7021,10 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
-                RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
                 rtl8168_disable_cfg9346_write(tp);
                 break;
         }
@@ -7017,6 +7034,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
                 break;
         }
@@ -7034,6 +7052,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
                 rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0000);
                 rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
@@ -9198,6 +9217,12 @@
 }
 
 static void
+rtl8168_set_mac_mcu_8168fp_4(struct net_device *dev)
+{
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
 rtl8168_hw_mac_mcu_config(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
@@ -9236,6 +9261,9 @@
         case CFG_METHOD_32:
                 rtl8168_set_mac_mcu_8168fp_3(dev);
                 break;
+        case CFG_METHOD_33:
+                rtl8168_set_mac_mcu_8168fp_4(dev);
+                break;
         }
 }
 
@@ -9243,7 +9271,6 @@
 rtl8168_hw_init(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
@@ -9266,11 +9293,12 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
-                RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
                 rtl8168_disable_cfg9346_write(tp);
-                RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7);
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
                 break;
         }
 
@@ -9280,6 +9308,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mac_ocp_write(tp, 0xD400, rtl8168_mac_ocp_read( tp, 0xD400) & ~(BIT_0));
                 break;
         }
@@ -9290,6 +9319,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1));
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) | (BIT_0));
                 rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_0));
@@ -9301,7 +9331,7 @@
         switch (tp->mcfg) {
         case CFG_METHOD_9:
         case CFG_METHOD_10:
-                RTL_W8(DBG_reg, RTL_R8(DBG_reg) | BIT_1 | BIT_7);
+                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_1 | BIT_7);
                 break;
         }
 
@@ -9312,7 +9342,7 @@
         case CFG_METHOD_17:
         case CFG_METHOD_18:
         case CFG_METHOD_19:
-                RTL_W8(0xF2, (RTL_R8(0xF2) & ~(BIT_2 | BIT_1 | BIT_0)));
+                RTL_W8(tp, 0xF2, (RTL_R8(tp, 0xF2) & ~(BIT_2 | BIT_1 | BIT_0)));
                 break;
         }
 
@@ -9323,8 +9353,8 @@
         case CFG_METHOD_19:
         case CFG_METHOD_20:
                 if (aspm) {
-                        RTL_W8(0x6E, RTL_R8(0x6E) | BIT_6);
-                        rtl8168_eri_write(ioaddr, 0x1AE, 2, 0x0403, ERIAR_ExGMAC);
+                        RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6);
+                        rtl8168_eri_write(tp, 0x1AE, 2, 0x0403, ERIAR_ExGMAC);
                 }
                 break;
         case CFG_METHOD_21:
@@ -9332,16 +9362,16 @@
         case CFG_METHOD_29:
         case CFG_METHOD_30:
                 if (aspm) {
-                        if ((rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3) || (RTL_R8(Config0) & 0x07)) {
-                                RTL_W8(0x6E, RTL_R8(0x6E) | BIT_6);
-                                rtl8168_eri_write(ioaddr, 0x1AE, 2, 0x0403, ERIAR_ExGMAC);
+                        if ((rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3) || (RTL_R8(tp, Config0) & 0x07)) {
+                                RTL_W8(tp, 0x6E, RTL_R8(tp, 0x6E) | BIT_6);
+                                rtl8168_eri_write(tp, 0x1AE, 2, 0x0403, ERIAR_ExGMAC);
                         }
                 }
                 break;
         }
 
         if (tp->mcfg == CFG_METHOD_10 || tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15)
-                RTL_W8(0xF3, RTL_R8(0xF3) | BIT_2);
+                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_2);
 
         rtl8168_hw_mac_mcu_config(dev);
 
@@ -9349,7 +9379,8 @@
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32)
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33)
                 if (!tp->dash_printer_enabled)
                         rtl8168_disable_ocp_phy_power_saving(dev);
 
@@ -9363,9 +9394,9 @@
         case CFG_METHOD_22:
         case CFG_METHOD_23:
         case CFG_METHOD_24:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1AB, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1AB, 1, ERIAR_ExGMAC);
                 csi_tmp |= ( BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7 );
-                rtl8168_eri_write(ioaddr, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
@@ -9377,27 +9408,26 @@
 rtl8168_hw_ephy_config(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u16 ephy_data;
 
         switch (tp->mcfg) {
         case CFG_METHOD_4:
                 /*Set EPHY registers    begin*/
                 /*Set EPHY register offset 0x02 bit 11 to 0 and bit 12 to 1*/
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x02);
+                ephy_data = rtl8168_ephy_read(tp, 0x02);
                 ephy_data &= ~BIT_11;
                 ephy_data |= BIT_12;
-                rtl8168_ephy_write(ioaddr, 0x02, ephy_data);
+                rtl8168_ephy_write(tp, 0x02, ephy_data);
 
                 /*Set EPHY register offset 0x03 bit 1 to 1*/
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x03);
+                ephy_data = rtl8168_ephy_read(tp, 0x03);
                 ephy_data |= (1 << 1);
-                rtl8168_ephy_write(ioaddr, 0x03, ephy_data);
+                rtl8168_ephy_write(tp, 0x03, ephy_data);
 
                 /*Set EPHY register offset 0x06 bit 7 to 0*/
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x06);
+                ephy_data = rtl8168_ephy_read(tp, 0x06);
                 ephy_data &= ~(1 << 7);
-                rtl8168_ephy_write(ioaddr, 0x06, ephy_data);
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
                 /*Set EPHY registers    end*/
 
                 break;
@@ -9414,8 +9444,8 @@
                 break;
         case CFG_METHOD_9:
                 /* set EPHY registers */
-                rtl8168_ephy_write(ioaddr, 0x01, 0x7C7F);
-                rtl8168_ephy_write(ioaddr, 0x02, 0x011F);
+                rtl8168_ephy_write(tp, 0x01, 0x7C7F);
+                rtl8168_ephy_write(tp, 0x02, 0x011F);
                 if (tp->eeprom_type != EEPROM_TYPE_NONE) {
                         ClearAndSetPCIePhyBit(tp,
                                               0x03,
@@ -9429,210 +9459,210 @@
                                               0x05F0
                                              );
                 }
-                rtl8168_ephy_write(ioaddr, 0x06, 0xB271);
-                rtl8168_ephy_write(ioaddr, 0x07, 0xCE00);
+                rtl8168_ephy_write(tp, 0x06, 0xB271);
+                rtl8168_ephy_write(tp, 0x07, 0xCE00);
 
                 break;
         case CFG_METHOD_10:
                 /* set EPHY registers */
-                rtl8168_ephy_write(ioaddr, 0x01, 0x6C7F);
-                rtl8168_ephy_write(ioaddr, 0x02, 0x011F);
+                rtl8168_ephy_write(tp, 0x01, 0x6C7F);
+                rtl8168_ephy_write(tp, 0x02, 0x011F);
                 ClearAndSetPCIePhyBit(tp,
                                       0x03,
                                       0xFFF0,
                                       0x01B0
                                      );
-                rtl8168_ephy_write(ioaddr, 0x1A, 0x0546);
-                rtl8168_ephy_write(ioaddr, 0x1C, 0x80C4);
-                rtl8168_ephy_write(ioaddr, 0x1D, 0x78E5);
-                rtl8168_ephy_write(ioaddr, 0x0A, 0x8100);
+                rtl8168_ephy_write(tp, 0x1A, 0x0546);
+                rtl8168_ephy_write(tp, 0x1C, 0x80C4);
+                rtl8168_ephy_write(tp, 0x1D, 0x78E5);
+                rtl8168_ephy_write(tp, 0x0A, 0x8100);
 
                 break;
         case CFG_METHOD_12:
         case CFG_METHOD_13:
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0B);
-                rtl8168_ephy_write(ioaddr, 0x0B, ephy_data|0x48);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x19);
+                ephy_data = rtl8168_ephy_read(tp, 0x0B);
+                rtl8168_ephy_write(tp, 0x0B, ephy_data|0x48);
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
                 ephy_data &= ~0x20;
-                rtl8168_ephy_write(ioaddr, 0x19, ephy_data|0x50);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                rtl8168_ephy_write(tp, 0x19, ephy_data|0x50);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~0x100;
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data|0x20);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x10);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data|0x20);
+                ephy_data = rtl8168_ephy_read(tp, 0x10);
                 ephy_data &= ~0x04;
-                rtl8168_ephy_write(ioaddr, 0x10, ephy_data);
+                rtl8168_ephy_write(tp, 0x10, ephy_data);
 
                 break;
         case CFG_METHOD_14:
         case CFG_METHOD_15:
                 /* set EPHY registers */
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00) & ~0x0200;
+                ephy_data = rtl8168_ephy_read(tp, 0x00) & ~0x0200;
                 ephy_data |= 0x0100;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data |= 0x0004;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x06) & ~0x0002;
+                ephy_data = rtl8168_ephy_read(tp, 0x06) & ~0x0002;
                 ephy_data |= 0x0001;
-                rtl8168_ephy_write(ioaddr, 0x06, ephy_data);
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x06);
+                ephy_data = rtl8168_ephy_read(tp, 0x06);
                 ephy_data |= 0x0030;
-                rtl8168_ephy_write(ioaddr, 0x06, ephy_data);
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x07);
+                ephy_data = rtl8168_ephy_read(tp, 0x07);
                 ephy_data |= 0x2000;
-                rtl8168_ephy_write(ioaddr, 0x07, ephy_data);
+                rtl8168_ephy_write(tp, 0x07, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data |= 0x0020;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x03) & ~0x5800;
+                ephy_data = rtl8168_ephy_read(tp, 0x03) & ~0x5800;
                 ephy_data |= 0x2000;
-                rtl8168_ephy_write(ioaddr, 0x03, ephy_data);
+                rtl8168_ephy_write(tp, 0x03, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x03);
+                ephy_data = rtl8168_ephy_read(tp, 0x03);
                 ephy_data |= 0x0001;
-                rtl8168_ephy_write(ioaddr, 0x03, ephy_data);
+                rtl8168_ephy_write(tp, 0x03, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x01) & ~0x0800;
+                ephy_data = rtl8168_ephy_read(tp, 0x01) & ~0x0800;
                 ephy_data |= 0x1000;
-                rtl8168_ephy_write(ioaddr, 0x01, ephy_data);
+                rtl8168_ephy_write(tp, 0x01, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x07);
+                ephy_data = rtl8168_ephy_read(tp, 0x07);
                 ephy_data |= 0x4000;
-                rtl8168_ephy_write(ioaddr, 0x07, ephy_data);
+                rtl8168_ephy_write(tp, 0x07, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x1E);
+                ephy_data = rtl8168_ephy_read(tp, 0x1E);
                 ephy_data |= 0x2000;
-                rtl8168_ephy_write(ioaddr, 0x1E, ephy_data);
+                rtl8168_ephy_write(tp, 0x1E, ephy_data);
 
-                rtl8168_ephy_write(ioaddr, 0x19, 0xFE6C);
+                rtl8168_ephy_write(tp, 0x19, 0xFE6C);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0A);
+                ephy_data = rtl8168_ephy_read(tp, 0x0A);
                 ephy_data |= 0x0040;
-                rtl8168_ephy_write(ioaddr, 0x0A, ephy_data);
+                rtl8168_ephy_write(tp, 0x0A, ephy_data);
 
                 break;
         case CFG_METHOD_16:
         case CFG_METHOD_17:
                 if (tp->mcfg == CFG_METHOD_16) {
-                        rtl8168_ephy_write(ioaddr, 0x06, 0xF020);
-                        rtl8168_ephy_write(ioaddr, 0x07, 0x01FF);
-                        rtl8168_ephy_write(ioaddr, 0x00, 0x5027);
-                        rtl8168_ephy_write(ioaddr, 0x01, 0x0003);
-                        rtl8168_ephy_write(ioaddr, 0x02, 0x2D16);
-                        rtl8168_ephy_write(ioaddr, 0x03, 0x6D49);
-                        rtl8168_ephy_write(ioaddr, 0x08, 0x0006);
-                        rtl8168_ephy_write(ioaddr, 0x0A, 0x00C8);
+                        rtl8168_ephy_write(tp, 0x06, 0xF020);
+                        rtl8168_ephy_write(tp, 0x07, 0x01FF);
+                        rtl8168_ephy_write(tp, 0x00, 0x5027);
+                        rtl8168_ephy_write(tp, 0x01, 0x0003);
+                        rtl8168_ephy_write(tp, 0x02, 0x2D16);
+                        rtl8168_ephy_write(tp, 0x03, 0x6D49);
+                        rtl8168_ephy_write(tp, 0x08, 0x0006);
+                        rtl8168_ephy_write(tp, 0x0A, 0x00C8);
                 }
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x09);
+                ephy_data = rtl8168_ephy_read(tp, 0x09);
                 ephy_data |= BIT_7;
-                rtl8168_ephy_write(ioaddr, 0x09, ephy_data);
+                rtl8168_ephy_write(tp, 0x09, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x19);
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
                 ephy_data |= (BIT_2 | BIT_5 | BIT_9);
-                rtl8168_ephy_write(ioaddr, 0x19, ephy_data);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data |= BIT_3;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
                 ephy_data |= BIT_9;
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
 
                 break;
         case CFG_METHOD_18:
         case CFG_METHOD_19:
                 if (tp->mcfg == CFG_METHOD_18) {
-                        ephy_data = rtl8168_ephy_read(ioaddr, 0x06);
+                        ephy_data = rtl8168_ephy_read(tp, 0x06);
                         ephy_data |= BIT_5;
                         ephy_data &= ~(BIT_7 | BIT_6);
-                        rtl8168_ephy_write(ioaddr, 0x06, ephy_data);
+                        rtl8168_ephy_write(tp, 0x06, ephy_data);
 
-                        ephy_data = rtl8168_ephy_read(ioaddr, 0x08);
+                        ephy_data = rtl8168_ephy_read(tp, 0x08);
                         ephy_data |= BIT_1;
                         ephy_data &= ~BIT_0;
-                        rtl8168_ephy_write(ioaddr, 0x08, ephy_data);
+                        rtl8168_ephy_write(tp, 0x08, ephy_data);
                 }
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x09);
+                ephy_data = rtl8168_ephy_read(tp, 0x09);
                 ephy_data |= BIT_7;
-                rtl8168_ephy_write(ioaddr, 0x09, ephy_data);
+                rtl8168_ephy_write(tp, 0x09, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x19);
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
                 ephy_data |= (BIT_2 | BIT_5 | BIT_9);
-                rtl8168_ephy_write(ioaddr, 0x19, ephy_data);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data |= BIT_3;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
                 ephy_data |= BIT_9;
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
 
                 break;
         case CFG_METHOD_20:
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x06);
+                ephy_data = rtl8168_ephy_read(tp, 0x06);
                 ephy_data |= BIT_5;
                 ephy_data &= ~(BIT_7 | BIT_6);
-                rtl8168_ephy_write(ioaddr, 0x06, ephy_data);
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
 
-                rtl8168_ephy_write(ioaddr, 0x0f, 0x5200);
+                rtl8168_ephy_write(tp, 0x0f, 0x5200);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x19);
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
                 ephy_data |= (BIT_2 | BIT_5 | BIT_9);
-                rtl8168_ephy_write(ioaddr, 0x19, ephy_data);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data |= BIT_3;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
                 ephy_data |= BIT_9;
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
 
                 break;
         case CFG_METHOD_21:
         case CFG_METHOD_22:
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data &= ~(BIT_3);
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
                 ephy_data |= (BIT_5 | BIT_11);
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x1E);
+                ephy_data = rtl8168_ephy_read(tp, 0x1E);
                 ephy_data |= (BIT_0);
-                rtl8168_ephy_write(ioaddr, 0x1E, ephy_data);
+                rtl8168_ephy_write(tp, 0x1E, ephy_data);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x19);
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
                 ephy_data &= ~(BIT_15);
-                rtl8168_ephy_write(ioaddr, 0x19, ephy_data);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
 
                 break;
         case CFG_METHOD_25:
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x00);
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
                 ephy_data &= ~BIT_3;
-                rtl8168_ephy_write(ioaddr, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10| BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
                 ephy_data |= (BIT_5 | BIT_11);
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
 
-                rtl8168_ephy_write(ioaddr, 0x19, 0x7C00);
-                rtl8168_ephy_write(ioaddr, 0x1E, 0x20EB);
-                rtl8168_ephy_write(ioaddr, 0x0D, 0x1666);
-                rtl8168_ephy_write(ioaddr, 0x00, 0x10A3);
-                rtl8168_ephy_write(ioaddr, 0x06, 0xF050);
+                rtl8168_ephy_write(tp, 0x19, 0x7C00);
+                rtl8168_ephy_write(tp, 0x1E, 0x20EB);
+                rtl8168_ephy_write(tp, 0x0D, 0x1666);
+                rtl8168_ephy_write(tp, 0x00, 0x10A3);
+                rtl8168_ephy_write(tp, 0x06, 0xF050);
 
                 SetPCIePhyBit(tp, 0x04, BIT_4);
                 ClearPCIePhyBit(tp, 0x1D, BIT_14);
@@ -9662,31 +9692,28 @@
 
                 break;
         case CFG_METHOD_23:
-                rtl8168_ephy_write(ioaddr, 0x00, 0x10AB);
-                rtl8168_ephy_write(ioaddr, 0x06, 0xf030);
-                rtl8168_ephy_write(ioaddr, 0x08, 0x2006);
-                rtl8168_ephy_write(ioaddr, 0x0D, 0x1666);
+                rtl8168_ephy_write(tp, 0x00, 0x10AB);
+                rtl8168_ephy_write(tp, 0x06, 0xf030);
+                rtl8168_ephy_write(tp, 0x08, 0x2006);
+                rtl8168_ephy_write(tp, 0x0D, 0x1666);
 
-                ephy_data = rtl8168_ephy_read(ioaddr, 0x0C);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
                 ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                rtl8168_ephy_write(ioaddr, 0x0C, ephy_data);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
 
                 break;
         case CFG_METHOD_27:
-                rtl8168_ephy_write(ioaddr, 0x00, 0x10A3);
-                rtl8168_ephy_write(ioaddr, 0x19, 0xFC00);
-                rtl8168_ephy_write(ioaddr, 0x1E, 0x20EA);
+                rtl8168_ephy_write(tp, 0x00, 0x10A3);
+                rtl8168_ephy_write(tp, 0x19, 0xFC00);
+                rtl8168_ephy_write(tp, 0x1E, 0x20EA);
 
                 break;
         case CFG_METHOD_28:
-                SetPCIePhyBit(tp, 0x00, BIT_7);
-                ClearAndSetPCIePhyBit(tp,
-                                      0x0D,
-                                      BIT_8,
-                                      BIT_9
-                                     );
-                ClearPCIePhyBit(tp, 0x19, (BIT_15 | BIT_5 | BIT_0));
-                SetPCIePhyBit(tp, 0x1E, BIT_13);
+                rtl8168_ephy_write(tp, 0x00, 0x10A3);
+                rtl8168_ephy_write(tp, 0x19, 0x7C00);
+                rtl8168_ephy_write(tp, 0x1E, 0x20EB);
+                rtl8168_ephy_write(tp, 0x0D, 0x1666);
+                ClearPCIePhyBit(tp, 0x0B, BIT_0);
 
                 break;
         case CFG_METHOD_29:
@@ -9696,15 +9723,16 @@
                 SetPCIePhyBit(tp, 0x1E, BIT_0);
                 SetPCIePhyBit(tp, 0x1D, BIT_11);
 
-                rtl8168_ephy_write(ioaddr, 0x05, 0x2089);
-                rtl8168_ephy_write(ioaddr, 0x06, 0x5881);
+                rtl8168_ephy_write(tp, 0x05, 0x2089);
+                rtl8168_ephy_write(tp, 0x06, 0x5881);
 
-                rtl8168_ephy_write(ioaddr, 0x04, 0x854A);
-                rtl8168_ephy_write(ioaddr, 0x01, 0x068B);
+                rtl8168_ephy_write(tp, 0x04, 0x854A);
+                rtl8168_ephy_write(tp, 0x01, 0x068B);
 
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 ClearAndSetPCIePhyBit(tp,
                                       0x19,
                                       BIT_6,
@@ -9716,6 +9744,10 @@
                                       (BIT_12| BIT_8)
                                      );
 
+                ClearPCIePhyBit(tp, 0x0C, BIT_4);
+                ClearPCIePhyBit(tp, 0x4C, BIT_4);
+                ClearPCIePhyBit(tp, 0x0B, BIT_0);
+
                 break;
         }
 }
@@ -9728,7 +9760,7 @@
         int retval = TRUE;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_32:
+        case CFG_METHOD_21 ... CFG_METHOD_33:
                 rtl8168_mdio_write(tp,0x1f, 0x0B82);
                 rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4);
 
@@ -9760,7 +9792,7 @@
         int retval = TRUE;
 
         switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_32:
+        case CFG_METHOD_21 ... CFG_METHOD_33:
                 rtl8168_mdio_write(tp, 0x1f, 0x0B82);
                 rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
 
@@ -9820,6 +9852,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
                 tp->hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
@@ -9875,6 +9908,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x801E);
                 rtl8168_mdio_write(tp, 0x14, tp->sw_ram_code_ver);
@@ -23515,7 +23549,8 @@
                                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
                         }
                 }
-        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                   tp->mcfg == CFG_METHOD_33) {
                 rtl8168_mdio_write(tp, 0x1F, 0x0A43);
                 rtl8168_mdio_write(tp, 0x13, 0x808E);
                 ClearAndSetEthPhyBit( tp,
@@ -23691,7 +23726,8 @@
                 rtl8168_mdio_write(tp, 0x14, 0x1065);
                 rtl8168_mdio_write(tp, 0x1F, 0x0000);
         } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                   tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+                   tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                   tp->mcfg == CFG_METHOD_33) {
                 //enable EthPhyPPSW
                 rtl8168_mdio_write(tp, 0x1F, 0x0A44);
                 rtl8168_set_eth_phy_bit( tp, 0x11, BIT_7 );
@@ -23702,7 +23738,8 @@
         if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
             tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
                 if (aspm)
                         rtl8168_enable_ocp_phy_power_saving(dev);
         }
@@ -23778,7 +23815,6 @@
 rtl8168_get_bios_setting(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->mcfg) {
         case CFG_METHOD_9:
@@ -23805,7 +23841,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                tp->bios_setting = RTL_R32(0x8c);
+        case CFG_METHOD_33:
+                tp->bios_setting = RTL_R32(tp, 0x8c);
                 break;
         }
 }
@@ -23814,7 +23851,6 @@
 rtl8168_set_bios_setting(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (tp->mcfg) {
         case CFG_METHOD_9:
@@ -23841,7 +23877,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W32(0x8C, tp->bios_setting);
+        case CFG_METHOD_33:
+                RTL_W32(tp, 0x8C, tp->bios_setting);
                 break;
         }
 }
@@ -23851,7 +23888,6 @@
 {
         struct rtl8168_private *tp = netdev_priv(dev);
         struct pci_dev *pdev = tp->pci_dev;
-        void __iomem *ioaddr = tp->mmio_addr;
 
         rtl8168_get_bios_setting(dev);
 
@@ -23868,6 +23904,7 @@
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwSuppDashVer = 3;
                 break;
         default:
@@ -23878,6 +23915,7 @@
         switch (tp->mcfg) {
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwPkgDet = rtl8168_mac_ocp_read(tp, 0xDC00);
                 tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x0F;
                 break;
@@ -23899,13 +23937,33 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwSuppNowIsOobVer = 1;
                 break;
         }
 
         switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+                tp->HwSuppPhyOcpVer = 1;
+                break;
+        }
+
+        switch (tp->mcfg) {
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwPcieSNOffset = 0x16C;
                 break;
         case CFG_METHOD_DEFAULT:
@@ -23929,26 +23987,21 @@
                 if (HW_DASH_SUPPORT_TYPE_3(tp)) {
                         u64 CmacMemPhysAddress;
                         void __iomem *cmac_ioaddr = NULL;
+                        struct pci_dev *pdev_cmac;
+
+                        pdev_cmac = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
 
                         //map CMAC IO space
-                        CmacMemPhysAddress = rtl8168_csi_other_fun_read(tp, 0, 0x18);
-                        if (!(CmacMemPhysAddress & BIT_0)) {
-                                if (CmacMemPhysAddress & BIT_2)
-                                        CmacMemPhysAddress |=  (u64)rtl8168_csi_other_fun_read(tp, 0, 0x1C) << 32;
-
-                                CmacMemPhysAddress &=  0xFFFFFFF0;
-                                /* ioremap MMIO region */
-                                cmac_ioaddr = ioremap(CmacMemPhysAddress, R8168_REGS_SIZE);
-                        }
+                        CmacMemPhysAddress = pci_resource_start(pdev_cmac, 2);
+
+                        /* ioremap MMIO region */
+                        cmac_ioaddr = ioremap(CmacMemPhysAddress, R8168_REGS_SIZE);
 
                         if (cmac_ioaddr == NULL) {
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
                                 if (netif_msg_probe(tp))
                                         dev_err(&pdev->dev, "cannot remap CMAC MMIO, aborting\n");
 #endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                        }
-
-                        if (cmac_ioaddr == NULL) {
                                 tp->DASH = 0;
                         } else {
                                 tp->mapped_cmac_ioaddr = cmac_ioaddr;
@@ -24014,6 +24067,7 @@
                 case CFG_METHOD_30:
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
+                case CFG_METHOD_33:
                         tp->org_pci_offset_99 = rtl8168_csi_fun0_read_byte(tp, 0x99);
                         tp->org_pci_offset_99 &= ~(BIT_5|BIT_6);
                         break;
@@ -24030,6 +24084,7 @@
                         break;
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
+                case CFG_METHOD_33:
                         tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214);
                         break;
                 }
@@ -24111,7 +24166,8 @@
         case CFG_METHOD_29:
         case CFG_METHOD_30:
         case CFG_METHOD_31:
-        case CFG_METHOD_32: {
+        case CFG_METHOD_32:
+        case CFG_METHOD_33: {
                 u16 rg_saw_cnt;
 
                 rtl8168_mdio_write(tp, 0x1F, 0x0C42);
@@ -24199,6 +24255,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V2;
                 break;
         case CFG_METHOD_DEFAULT:
@@ -24230,6 +24287,7 @@
         case CFG_METHOD_28:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwSuppCheckPhyDisableModeVer = 3;
                 break;
         }
@@ -24247,6 +24305,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->HwSuppGigaForceMode = TRUE;
                 break;
         }
@@ -24291,6 +24350,7 @@
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31;
                 break;
         }
@@ -24300,7 +24360,7 @@
                 tp->NotWrMcuPatchCode = TRUE;
         }
 
-        tp->NicCustLedValue = RTL_R16(CustomLED);
+        tp->NicCustLedValue = RTL_R16(tp, CustomLED);
 
         rtl8168_get_hw_wol(dev);
 
@@ -24323,10 +24383,10 @@
 
 static void
 rtl8168_release_board(struct pci_dev *pdev,
-                      struct net_device *dev,
-                      void __iomem *ioaddr)
+                      struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
+        void __iomem *ioaddr = tp->mmio_addr;
 
         rtl8168_set_bios_setting(dev);
         rtl8168_rar_set(tp, tp->org_mac_addr);
@@ -24353,12 +24413,11 @@
 rtl8168_get_mac_address(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int i;
         u8 mac_addr[MAC_ADDR_LEN];
 
         for (i = 0; i < MAC_ADDR_LEN; i++)
-                mac_addr[i] = RTL_R8(MAC0 + i);
+                mac_addr[i] = RTL_R8(tp, MAC0 + i);
 
         if (tp->mcfg == CFG_METHOD_18 ||
             tp->mcfg == CFG_METHOD_19 ||
@@ -24374,9 +24433,10 @@
             tp->mcfg == CFG_METHOD_29 ||
             tp->mcfg == CFG_METHOD_30 ||
             tp->mcfg == CFG_METHOD_31 ||
-            tp->mcfg == CFG_METHOD_32) {
-                *(u32*)&mac_addr[0] = rtl8168_eri_read(ioaddr, 0xE0, 4, ERIAR_ExGMAC);
-                *(u16*)&mac_addr[4] = rtl8168_eri_read(ioaddr, 0xE4, 2, ERIAR_ExGMAC);
+            tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33) {
+                *(u32*)&mac_addr[0] = rtl8168_eri_read(tp, 0xE0, 4, ERIAR_ExGMAC);
+                *(u16*)&mac_addr[4] = rtl8168_eri_read(tp, 0xE4, 2, ERIAR_ExGMAC);
         } else {
                 if (tp->eeprom_type != EEPROM_TYPE_NONE) {
                         u16 *pUshort = (u16*)mac_addr;
@@ -24397,7 +24457,8 @@
                             tp->mcfg == CFG_METHOD_29 ||
                             tp->mcfg == CFG_METHOD_30 ||
                             tp->mcfg == CFG_METHOD_31 ||
-                            tp->mcfg == CFG_METHOD_32) {
+                            tp->mcfg == CFG_METHOD_32 ||
+                            tp->mcfg == CFG_METHOD_33) {
                                 *pUshort++ = rtl8168_eeprom_read_sc(tp, 1);
                                 *pUshort++ = rtl8168_eeprom_read_sc(tp, 2);
                                 *pUshort = rtl8168_eeprom_read_sc(tp, 3);
@@ -24422,7 +24483,7 @@
         rtl8168_rar_set(tp, mac_addr);
 
         for (i = 0; i < MAC_ADDR_LEN; i++) {
-                dev->dev_addr[i] = RTL_R8(MAC0 + i);
+                dev->dev_addr[i] = RTL_R8(tp, MAC0 + i);
                 tp->org_mac_addr[i] = dev->dev_addr[i]; /* keep the original MAC address */
         }
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
@@ -24472,7 +24533,6 @@
 rtl8168_rar_set(struct rtl8168_private *tp,
                 uint8_t *addr)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
         uint32_t rar_low = 0;
         uint32_t rar_high = 0;
 
@@ -24485,20 +24545,20 @@
                     ((uint32_t) addr[5] << 8));
 
         rtl8168_enable_cfg9346_write(tp);
-        RTL_W32(MAC0, rar_low);
-        RTL_W32(MAC4, rar_high);
+        RTL_W32(tp, MAC0, rar_low);
+        RTL_W32(tp, MAC4, rar_high);
 
         switch (tp->mcfg) {
         case CFG_METHOD_14:
         case CFG_METHOD_15:
-                RTL_W32(SecMAC0, rar_low);
-                RTL_W16(SecMAC4, (uint16_t)rar_high);
+                RTL_W32(tp, SecMAC0, rar_low);
+                RTL_W16(tp, SecMAC4, (uint16_t)rar_high);
                 break;
         }
 
         if (tp->mcfg == CFG_METHOD_17) {
-                rtl8168_eri_write(ioaddr, 0xf0, 4, rar_low << 16, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xf4, 4, rar_low >> 16 | rar_high << 16, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xf0, 4, rar_low << 16, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xf4, 4, rar_low >> 16 | rar_high << 16, ERIAR_ExGMAC);
         }
 
         rtl8168_disable_cfg9346_write(tp);
@@ -25291,6 +25351,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_wait_phy_ups_resume(dev, 3);
                 break;
         };
@@ -25300,7 +25361,6 @@
 rtl8168_phy_power_down(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 csi_tmp;
 
         switch (tp->mcfg) {
@@ -25308,9 +25368,9 @@
         case CFG_METHOD_22:
         case CFG_METHOD_23:
         case CFG_METHOD_24:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1AB, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1AB, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~( BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7 );
-                rtl8168_eri_write(ioaddr, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
@@ -25474,8 +25534,10 @@
                 goto err_out_free_res;
         }
 
+        tp->mmio_addr = ioaddr;
+
         /* Identify chip attached to board */
-        rtl8168_get_mac_version(tp, ioaddr);
+        rtl8168_get_mac_version(tp);
 
         rtl8168_print_mac_version(tp);
 
@@ -25806,7 +25868,6 @@
         tp = netdev_priv(dev);
         assert(ioaddr != NULL);
 
-        tp->mmio_addr = ioaddr;
         tp->set_speed = rtl8168_set_speed_xmii;
         tp->get_settings = rtl8168_gset_xmii;
         tp->phy_reset_enable = rtl8168_xmii_reset_enable;
@@ -25838,7 +25899,7 @@
         }
 #endif
 
-        tp->cp_cmd |= RTL_R16(CPlusCmd);
+        tp->cp_cmd |= RTL_R16(tp, CPlusCmd);
         if (tp->mcfg != CFG_METHOD_DEFAULT) {
                 dev->features |= NETIF_F_IP_CSUM;
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
@@ -25915,7 +25976,7 @@
                 rtl8168_eeprom_type(tp);
 
         if (tp->eeprom_type == EEPROM_TYPE_93C46 || tp->eeprom_type == EEPROM_TYPE_93C56)
-                rtl8168_set_eeprom_sel_low(ioaddr);
+                rtl8168_set_eeprom_sel_low(tp);
 
         rtl8168_get_mac_address(dev);
 
@@ -25925,7 +25986,8 @@
         init_completion(&tp->fw_req);
 #endif
 
-        tp->tally_vaddr = pci_alloc_consistent(pdev, sizeof(*tp->tally_vaddr), &tp->tally_paddr);
+        tp->tally_vaddr = dma_alloc_coherent(&pdev->dev, sizeof(*tp->tally_vaddr),
+                                             &tp->tally_paddr, GFP_KERNEL);
         if (!tp->tally_vaddr) {
                 rc = -ENOMEM;
                 goto err_out;
@@ -25954,8 +26016,8 @@
 
 err_out:
         if (tp->tally_vaddr != NULL) {
-                pci_free_consistent(pdev, sizeof(*tp->tally_vaddr), tp->tally_vaddr,
-                                    tp->tally_paddr);
+                dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr,
+                                  tp->tally_paddr);
 
                 tp->tally_vaddr = NULL;
         }
@@ -25963,7 +26025,7 @@
         RTL_NAPI_DEL(tp);
 #endif
         rtl8168_disable_msi(pdev, tp);
-        rtl8168_release_board(pdev, dev, ioaddr);
+        rtl8168_release_board(pdev, dev);
 
         goto out;
 }
@@ -25980,7 +26042,7 @@
 #ifdef  CONFIG_R8168_NAPI
         RTL_NAPI_DEL(tp);
 #endif
-        if (tp->DASH)
+        if (HW_DASH_SUPPORT_DASH(tp))
                 rtl8168_driver_stop(tp);
 
         unregister_netdev(dev);
@@ -25989,11 +26051,11 @@
         rtl8168_proc_remove(dev);
 #endif
         if (tp->tally_vaddr != NULL) {
-                pci_free_consistent(pdev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr);
+                dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr);
                 tp->tally_vaddr = NULL;
         }
 
-        rtl8168_release_board(pdev, dev, tp->mmio_addr);
+        rtl8168_release_board(pdev, dev);
         pci_set_drvdata(pdev, NULL);
 }
 
@@ -26023,19 +26085,19 @@
          * Rx and Tx descriptors needs 256 bytes alignment.
          * pci_alloc_consistent provides more.
          */
-        tp->TxDescArray = pci_alloc_consistent(pdev, R8168_TX_RING_BYTES,
-                                               &tp->TxPhyAddr);
+        tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8168_TX_RING_BYTES,
+                                             &tp->TxPhyAddr, GFP_KERNEL);
         if (!tp->TxDescArray)
                 goto err_free_all_allocated_mem;
 
-        tp->RxDescArray = pci_alloc_consistent(pdev, R8168_RX_RING_BYTES,
-                                               &tp->RxPhyAddr);
+        tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8168_RX_RING_BYTES,
+                                             &tp->RxPhyAddr, GFP_KERNEL);
         if (!tp->RxDescArray)
                 goto err_free_all_allocated_mem;
 
         if (tp->UseSwPaddingShortPkt) {
-                tp->ShortPacketEmptyBuffer = pci_alloc_consistent(pdev, SHORT_PACKET_PADDING_BUF_SIZE,
-                                             &tp->ShortPacketEmptyBufferPhy);
+                tp->ShortPacketEmptyBuffer = dma_alloc_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE,
+                                             &tp->ShortPacketEmptyBufferPhy, GFP_KERNEL);
                 if (!tp->ShortPacketEmptyBuffer)
                         goto err_free_all_allocated_mem;
 
@@ -26105,20 +26167,20 @@
 
 err_free_all_allocated_mem:
         if (tp->RxDescArray != NULL) {
-                pci_free_consistent(pdev, R8168_RX_RING_BYTES, tp->RxDescArray,
-                                    tp->RxPhyAddr);
+                dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray,
+                                  tp->RxPhyAddr);
                 tp->RxDescArray = NULL;
         }
 
         if (tp->TxDescArray != NULL) {
-                pci_free_consistent(pdev, R8168_TX_RING_BYTES, tp->TxDescArray,
-                                    tp->TxPhyAddr);
+                dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray,
+                                  tp->TxPhyAddr);
                 tp->TxDescArray = NULL;
         }
 
         if (tp->ShortPacketEmptyBuffer != NULL) {
-                pci_free_consistent(pdev, ETH_ZLEN, tp->ShortPacketEmptyBuffer,
-                                    tp->ShortPacketEmptyBufferPhy);
+                dma_free_coherent(&pdev->dev, ETH_ZLEN, tp->ShortPacketEmptyBuffer,
+                                  tp->ShortPacketEmptyBufferPhy);
                 tp->ShortPacketEmptyBuffer = NULL;
         }
 
@@ -26129,31 +26191,30 @@
 rtl8168_dsm(struct net_device *dev, int dev_state)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         switch (dev_state) {
         case DSM_MAC_INIT:
                 if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
-                        if (RTL_R8(MACDBG) & 0x80)
-                                RTL_W8(GPIO, RTL_R8(GPIO) | GPIO_en);
+                        if (RTL_R8(tp, MACDBG) & 0x80)
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) | GPIO_en);
                         else
-                                RTL_W8(GPIO, RTL_R8(GPIO) & ~GPIO_en);
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) & ~GPIO_en);
                 }
 
                 break;
         case DSM_NIC_GOTO_D3:
         case DSM_IF_DOWN:
                 if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
-                        if (RTL_R8(MACDBG) & 0x80)
-                                RTL_W8(GPIO, RTL_R8(GPIO) & ~GPIO_en);
+                        if (RTL_R8(tp, MACDBG) & 0x80)
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) & ~GPIO_en);
                 }
                 break;
 
         case DSM_NIC_RESUME_D3:
         case DSM_IF_UP:
                 if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
-                        if (RTL_R8(MACDBG) & 0x80)
-                                RTL_W8(GPIO, RTL_R8(GPIO) | GPIO_en);
+                        if (RTL_R8(tp, MACDBG) & 0x80)
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) | GPIO_en);
                 }
 
                 break;
@@ -26207,7 +26268,6 @@
 rtl8168_hw_set_rx_packet_filter(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         u32 mc_filter[2];   /* Multicast hash filter */
         int rx_mode;
         u32 tmp = 0;
@@ -26261,11 +26321,11 @@
         mc_filter[1] = swab32(tmp);
 
         tp->rtl8168_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg;
-        tmp = tp->rtl8168_rx_config | rx_mode | (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
+        tmp = tp->rtl8168_rx_config | rx_mode | (RTL_R32(tp, RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
 
-        RTL_W32(RxConfig, tmp);
-        RTL_W32(MAR0 + 0, mc_filter[0]);
-        RTL_W32(MAR0 + 4, mc_filter[1]);
+        RTL_W32(tp, RxConfig, tmp);
+        RTL_W32(tp, MAR0 + 0, mc_filter[0]);
+        RTL_W32(tp, MAR0 + 4, mc_filter[1]);
 }
 
 static void
@@ -26285,7 +26345,6 @@
 rtl8168_hw_config(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         struct pci_dev *pdev = tp->pci_dev;
         u8 device_control;
         u16 mac_ocp_data;
@@ -26299,7 +26358,7 @@
         }
 #endif
 
-        RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
+        RTL_W32(tp, RxConfig, (RX_DMA_BURST << RxCfgDMAShift));
 
         rtl8168_hw_reset(dev);
 
@@ -26324,9 +26383,10 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7);
-                RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
-                RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
+        case CFG_METHOD_33:
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
                 break;
         }
 
@@ -26345,7 +26405,8 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                RTL_W8(Config3, RTL_R8(Config3) & ~BIT_1);
+        case CFG_METHOD_33:
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1);
                 break;
         }
 
@@ -26368,13 +26429,14 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC);
+        case CFG_METHOD_33:
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
                 break;
         }
 
-        RTL_W8(MTPS, Reserved1_data);
+        RTL_W8(tp, MTPS, Reserved1_data);
 
         tp->cp_cmd |= INTT_1;
         if (tp->use_timer_interrrupt)
@@ -26382,7 +26444,7 @@
         else
                 tp->cp_cmd &= ~PktCntrDisable;
 
-        RTL_W16(IntrMitigate, 0x5f51);
+        RTL_W16(tp, IntrMitigate, 0x5f51);
 
         rtl8168_tally_counter_addr_fill(tp);
 
@@ -26390,30 +26452,30 @@
 
         /* Set DMA burst size and Interframe Gap Time */
         if (tp->mcfg == CFG_METHOD_1)
-                RTL_W32(TxConfig, (TX_DMA_BURST_512 << TxDMAShift) |
+                RTL_W32(tp, TxConfig, (TX_DMA_BURST_512 << TxDMAShift) |
                         (InterFrameGap << TxInterFrameGapShift));
         else
-                RTL_W32(TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
+                RTL_W32(tp, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
                         (InterFrameGap << TxInterFrameGapShift));
 
         if (tp->mcfg == CFG_METHOD_4) {
                 set_offset70F(tp, 0x27);
 
-                RTL_W8(DBG_reg, (0x0E << 4) | Fix_Nak_1 | Fix_Nak_2);
+                RTL_W8(tp, DBG_reg, (0x0E << 4) | Fix_Nak_1 | Fix_Nak_2);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 //disable clock request.
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
                         set_offset79(tp, 0x50);
                 }
@@ -26432,19 +26494,19 @@
 
                 set_offset70F(tp, 0x27);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 //disable clock request.
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
                         set_offset79(tp, 0x50);
                 }
@@ -26458,19 +26520,19 @@
         } else if (tp->mcfg == CFG_METHOD_6) {
                 set_offset70F(tp, 0x27);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 //disable clock request.
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
                         set_offset79(tp, 0x50);
                 }
@@ -26484,21 +26546,21 @@
         } else if (tp->mcfg == CFG_METHOD_7) {
                 set_offset70F(tp, 0x27);
 
-                rtl8168_eri_write(ioaddr, 0x1EC, 1, 0x07, ERIAR_ASF);
+                rtl8168_eri_write(tp, 0x1EC, 1, 0x07, ERIAR_ASF);
 
                 //disable clock request.
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
 
                         set_offset79(tp, 0x50);
@@ -26507,23 +26569,23 @@
 
                 set_offset70F(tp, 0x27);
 
-                rtl8168_eri_write(ioaddr, 0x1EC, 1, 0x07, ERIAR_ASF);
+                rtl8168_eri_write(tp, 0x1EC, 1, 0x07, ERIAR_ASF);
 
                 //disable clock request.
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
-                RTL_W8(0xD1, 0x20);
+                RTL_W8(tp, 0xD1, 0x20);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
                         set_offset79(tp, 0x50);
                 }
@@ -26533,43 +26595,43 @@
                 /* disable clock request. */
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~BIT_4);
-                RTL_W8(DBG_reg, RTL_R8(DBG_reg) | BIT_7 | BIT_1);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_4);
+                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_7 | BIT_1);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
                         set_offset79(tp, 0x50);
                 }
 
-                RTL_W8(TDFNR, 0x8);
+                RTL_W8(tp, TDFNR, 0x8);
 
         } else if (tp->mcfg == CFG_METHOD_10) {
                 set_offset70F(tp, 0x27);
 
-                RTL_W8(DBG_reg, RTL_R8(DBG_reg) | BIT_7 | BIT_1);
+                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_7 | BIT_1);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
 
                         set_offset79(tp, 0x20);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
 
                         set_offset79(tp, 0x50);
                 }
 
-                RTL_W8(TDFNR, 0x8);
+                RTL_W8(tp, TDFNR, 0x8);
 
-                RTL_W8(Config1, RTL_R8(Config1) | 0x10);
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
 
                 /* disable clock request. */
                 pci_write_config_byte(pdev, 0x81, 0x00);
@@ -26578,26 +26640,26 @@
                 set_offset79(tp, 0x50);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
                 else
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
 
                 pci_write_config_byte(pdev, 0x81, 0x00);
 
-                RTL_W8(Config1, RTL_R8(Config1) | 0x10);
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
 
         } else if (tp->mcfg == CFG_METHOD_12) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
                 else
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
 
                 pci_write_config_byte(pdev, 0x81, 0x01);
 
-                RTL_W8(Config1, RTL_R8(Config1) | 0x10);
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
 
         } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
 
@@ -26605,79 +26667,79 @@
                 set_offset79(tp, 0x50);
 
                 if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(MTPS, 0x24);
-                        RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) | 0x01);
+                        RTL_W8(tp, MTPS, 0x24);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
                 } else {
-                        RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);
-                        RTL_W8(Config4, RTL_R8(Config4) & ~0x01);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
                 }
 
-                RTL_W8(0xF3, RTL_R8(0xF3) | BIT_5);
-                RTL_W8(0xF3, RTL_R8(0xF3) & ~BIT_5);
+                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_5);
+                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) & ~BIT_5);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_7 | BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7 | BIT_6);
 
-                RTL_W8(0xD1, RTL_R8(0xD1) | BIT_2 | BIT_3);
+                RTL_W8(tp, 0xD1, RTL_R8(tp, 0xD1) | BIT_2 | BIT_3);
 
-                RTL_W8(0xF1, RTL_R8(0xF1) | BIT_6 | BIT_5 | BIT_4 | BIT_2 | BIT_1);
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_6 | BIT_5 | BIT_4 | BIT_2 | BIT_1);
 
-                RTL_W8(TDFNR, 0x8);
+                RTL_W8(tp, TDFNR, 0x8);
 
                 if (aspm)
-                        RTL_W8(0xF1, RTL_R8(0xF1) | BIT_7);
+                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
 
-                RTL_W8(Config5, RTL_R8(Config5) & ~BIT_3);
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_3);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
-                RTL_W8(Config1, RTL_R8(Config1) & ~0x10);
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) & ~0x10);
         } else if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
-                rtl8168_eri_write(ioaddr, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1D0, 4, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 4, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1;
-                rtl8168_eri_write(ioaddr, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
-                RTL_W32(TxConfig, RTL_R32(TxConfig) | BIT_7);
-                RTL_W8(0xD3, RTL_R8(0xD3) & ~BIT_7);
-                RTL_W8(0x1B, RTL_R8(0x1B) & ~0x07);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
 
                 if (tp->mcfg == CFG_METHOD_16) {
-                        RTL_W32(0xB0, 0xEE480010);
-                        RTL_W8(0x1A, RTL_R8(0x1A) & ~(BIT_2|BIT_3));
-                        rtl8168_eri_write(ioaddr, 0x1DC, 1, 0x64, ERIAR_ExGMAC);
+                        RTL_W32(tp, 0xB0, 0xEE480010);
+                        RTL_W8(tp, 0x1A, RTL_R8(tp, 0x1A) & ~(BIT_2|BIT_3));
+                        rtl8168_eri_write(tp, 0x1DC, 1, 0x64, ERIAR_ExGMAC);
                 } else {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                         csi_tmp |= BIT_4;
-                        rtl8168_eri_write(ioaddr, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
-                        rtl8168_eri_write(ioaddr, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
-                        rtl8168_eri_write(ioaddr, 0xD0, 4, 0x07ff0060, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xD0, 4, 0x07ff0060, ERIAR_ExGMAC);
                 }
 
-                RTL_W8(TDFNR, 0x8);
+                RTL_W8(tp, TDFNR, 0x8);
 
-                RTL_W8(Config2, RTL_R8(Config2) & ~PMSTS_En);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(MTPS, 0x27);
+                        RTL_W8(tp, MTPS, 0x27);
 
                 /* disable clock request. */
                 pci_write_config_byte(pdev, 0x81, 0x00);
@@ -26686,80 +26748,80 @@
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
-                rtl8168_eri_write(ioaddr, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-                RTL_W32(TxConfig, RTL_R32(TxConfig) | BIT_7);
-                RTL_W8(0xD3, RTL_R8(0xD3) & ~BIT_7);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 1, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
                 if (aspm)
-                        RTL_W8(0xF1, RTL_R8(0xF1) | BIT_7);
+                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(MTPS, 0x27);
+                        RTL_W8(tp, MTPS, 0x27);
 
-                RTL_W8(TDFNR, 0x8);
+                RTL_W8(tp, TDFNR, 0x8);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
 
-                rtl8168_eri_write(ioaddr, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                RTL_W8(0x1B,RTL_R8(0x1B) & ~0x07);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                RTL_W8(tp, 0x1B,RTL_R8(tp, 0x1B) & ~0x07);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_4;
-                rtl8168_eri_write(ioaddr, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1d0, 1, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1d0, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_4 | BIT_1;
-                rtl8168_eri_write(ioaddr, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
         } else if (tp->mcfg == CFG_METHOD_20) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
-                rtl8168_eri_write(ioaddr, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-                RTL_W32(TxConfig, RTL_R32(TxConfig) | BIT_7);
-                RTL_W8(0xD3, RTL_R8(0xD3) & ~BIT_7);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 1, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
                 if (aspm)
-                        RTL_W8(0xF1, RTL_R8(0xF1) | BIT_7);
+                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(MTPS, 0x27);
+                        RTL_W8(tp, MTPS, 0x27);
 
-                RTL_W8(TDFNR, 0x8);
+                RTL_W8(tp, TDFNR, 0x8);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_6);
-                rtl8168_eri_write(ioaddr, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp |= BIT_10 | BIT_11;
-                rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_4;
-                rtl8168_eri_write(ioaddr, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1d0, 1, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1d0, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_4 | BIT_1;
-                rtl8168_eri_write(ioaddr, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
         } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
                    tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_29 ||
@@ -26769,18 +26831,18 @@
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22)
                         set_offset711(tp, 0x04);
 
-                rtl8168_eri_write(ioaddr, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xCC, 1, 0x38, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xD0, 1, 0x48, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 1, 0x38, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x48, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
 
-                RTL_W32(TxConfig, RTL_R32(TxConfig) | BIT_7);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
                 if (tp->mcfg == CFG_METHOD_26) {
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0);
@@ -26824,45 +26886,45 @@
                         rtl8168_mac_ocp_write(tp, 0xE0D6, mac_ocp_data);
                 }
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
-                RTL_W8(0x1B, RTL_R8(0x1B) & ~0x07);
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
 
-                RTL_W8(TDFNR, 0x4);
+                RTL_W8(tp, TDFNR, 0x4);
 
-                RTL_W8(Config2, RTL_R8(Config2) & ~PMSTS_En);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
 
                 if (aspm)
-                        RTL_W8(0xF1, RTL_R8(0xF1) | BIT_7);
+                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(MTPS, 0x27);
+                        RTL_W8(tp, MTPS, 0x27);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_7);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
 
-                rtl8168_eri_write(ioaddr, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
 
                 if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30)
                         rtl8168_mac_ocp_write(tp, 0xE054, 0xFC01);
 
-                rtl8168_eri_write(ioaddr, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
 
                 if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                         csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                        rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
 
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 4, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
                         csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
-                        rtl8168_eri_write(ioaddr, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
                 } else {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                         csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                        rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
                 }
 
                 if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
@@ -26873,83 +26935,83 @@
                         rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
                 }
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_12;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
 
                 if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0x2FC, 1, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
                         csi_tmp &= ~(BIT_2);
-                        rtl8168_eri_write(ioaddr, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
                 } else {
-                        csi_tmp = rtl8168_eri_read(ioaddr, 0x2FC, 1, ERIAR_ExGMAC);
+                        csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
                         csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
                         csi_tmp |= BIT_0;
-                        rtl8168_eri_write(ioaddr, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
                 }
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1D0, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1;
-                rtl8168_eri_write(ioaddr, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
         } else if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 ||
                    tp->mcfg == CFG_METHOD_28) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
-                rtl8168_eri_write(ioaddr, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
 
-                RTL_W32(TxConfig, RTL_R32(TxConfig) | BIT_7);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_7);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
 
-                rtl8168_eri_write(ioaddr, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                RTL_W8(0x1B, RTL_R8(0x1B) & ~0x07);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
 
-                RTL_W8(TDFNR, 0x4);
+                RTL_W8(tp, TDFNR, 0x4);
 
                 if (aspm)
-                        RTL_W8(0xF1, RTL_R8(0xF1) | BIT_7);
+                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_12;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x2FC, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1D0, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
                 csi_tmp |= BIT_1;
-                rtl8168_eri_write(ioaddr, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(MTPS, 0x27);
+                        RTL_W8(tp, MTPS, 0x27);
 
                 if (tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
                         rtl8168_oob_mutex_lock(tp);
-                        rtl8168_eri_write(ioaddr, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
                         rtl8168_oob_mutex_unlock(tp);
                 }
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp  |= ( BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12 );
-                rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
 
                 rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
                 rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
@@ -26968,26 +27030,23 @@
                         mac_ocp_data |= BIT_7;
                         rtl8168_mac_ocp_write(tp, 0xE860, mac_ocp_data);
                 }
-
-                rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x0E);
-                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x0E);
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x0E);
-        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32) {
+        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                   tp->mcfg == CFG_METHOD_33) {
                 set_offset70F(tp, 0x27);
                 set_offset79(tp, 0x50);
 
-                rtl8168_eri_write(ioaddr, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
 
-                RTL_W32(TxConfig, RTL_R32(TxConfig) | BIT_7);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
 
                 if (tp->RequireAdjustUpsTxLinkPulseTiming) {
                         mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
@@ -27005,7 +27064,7 @@
                 rtl8168_oob_mutex_lock(tp);
                 mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
                 mac_ocp_data |= BIT_0;
-                if (tp->mcfg == CFG_METHOD_32)
+                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
                         mac_ocp_data |= BIT_3;
                 else
                         mac_ocp_data &= ~BIT_3;
@@ -27017,63 +27076,55 @@
                 mac_ocp_data |= 0x47F;
                 rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
 
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
-                RTL_W8(0x1B, RTL_R8(0x1B) & ~0x07);
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
 
-                RTL_W8(TDFNR, 0x4);
+                RTL_W8(tp, TDFNR, 0x4);
 
-                RTL_W8(Config2, RTL_R8(Config2) & ~PMSTS_En);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
 
                 if (aspm)
-                        RTL_W8(0xF1, RTL_R8(0xF1) | BIT_7);
+                        RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
 
                 if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(MTPS, 0x27);
+                        RTL_W8(tp, MTPS, 0x27);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_6);
-                RTL_W8(0xF2, RTL_R8(0xF2) | BIT_6);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
 
-                RTL_W8(0xD0, RTL_R8(0xD0) | BIT_7);
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
 
-                rtl8168_eri_write(ioaddr, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(ioaddr, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
 
                 rtl8168_oob_mutex_lock(tp);
-                rtl8168_eri_write(ioaddr, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
                 rtl8168_oob_mutex_unlock(tp);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
                 csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                if (tp->mcfg == CFG_METHOD_32) csi_tmp|= BIT_4;
-                rtl8168_eri_write(ioaddr, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33)
+                        csi_tmp|= BIT_4;
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
 
                 rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
                 rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_12;
-                rtl8168_eri_write(ioaddr, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x2FC, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~(BIT_0 | BIT_1);
                 csi_tmp |= BIT_0;
-                rtl8168_eri_write(ioaddr, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
 
-                csi_tmp = rtl8168_eri_read(ioaddr, 0x1D0, 1, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
                 csi_tmp &= ~BIT_1;
-                rtl8168_eri_write(ioaddr, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
-
-                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 2, 1, 0xED);
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x78);
-                if (tp->DASH) {
-                        rtl8168_set_dash_other_fun_dev_state_change(tp, 0, 0x85);
-                        rtl8168_set_dash_other_fun_dev_pci_cmd_register(tp, 0x07, 0x85);
-                } else {
-                        rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x85);
-                }
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
         } else if (tp->mcfg == CFG_METHOD_1) {
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 if (dev->mtu > ETH_DATA_LEN) {
                         pci_read_config_byte(pdev, 0x69, &device_control);
@@ -27087,7 +27138,7 @@
                         pci_write_config_byte(pdev, 0x69, device_control);
                 }
         } else if (tp->mcfg == CFG_METHOD_2) {
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 if (dev->mtu > ETH_DATA_LEN) {
                         pci_read_config_byte(pdev, 0x69, &device_control);
@@ -27095,17 +27146,17 @@
                         device_control |= 0x28;
                         pci_write_config_byte(pdev, 0x69, device_control);
 
-                        RTL_W8(Config4, RTL_R8(Config4) | (1 << 0));
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
                 } else {
                         pci_read_config_byte(pdev, 0x69, &device_control);
                         device_control &= ~0x70;
                         device_control |= 0x58;
                         pci_write_config_byte(pdev, 0x69, device_control);
 
-                        RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
                 }
         } else if (tp->mcfg == CFG_METHOD_3) {
-                RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
 
                 if (dev->mtu > ETH_DATA_LEN) {
                         pci_read_config_byte(pdev, 0x69, &device_control);
@@ -27113,14 +27164,14 @@
                         device_control |= 0x28;
                         pci_write_config_byte(pdev, 0x69, device_control);
 
-                        RTL_W8(Config4, RTL_R8(Config4) | (1 << 0));
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
                 } else {
                         pci_read_config_byte(pdev, 0x69, &device_control);
                         device_control &= ~0x70;
                         device_control |= 0x58;
                         pci_write_config_byte(pdev, 0x69, device_control);
 
-                        RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
                 }
         }
 
@@ -27144,7 +27195,7 @@
             tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
             tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
             tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
-                rtl8168_eri_write(ioaddr, 0x2F8, 2, 0x1D8F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2F8, 2, 0x1D8F, ERIAR_ExGMAC);
 
         if (tp->bios_setting & BIT_28) {
                 if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
@@ -27178,6 +27229,7 @@
                 break;
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 rtl8168_mac_ocp_write(tp, 0xE098, 0xC302);
                 break;
         }
@@ -27195,6 +27247,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 if (aspm) {
                         rtl8168_init_pci_offset_99(tp);
                 }
@@ -27210,6 +27263,7 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 if (aspm) {
                         rtl8168_init_pci_offset_180(tp);
                 }
@@ -27221,7 +27275,7 @@
                         ASF | Macdbgo_sel);
 
 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        RTL_W16(CPlusCmd, tp->cp_cmd);
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
 #else
         rtl8168_hw_set_features(dev, dev->features);
 #endif
@@ -27243,10 +27297,11 @@
         case CFG_METHOD_29:
         case CFG_METHOD_30:
         case CFG_METHOD_31:
-        case CFG_METHOD_32: {
+        case CFG_METHOD_32:
+        case CFG_METHOD_33: {
                 int timeout;
                 for (timeout = 0; timeout < 10; timeout++) {
-                        if ((rtl8168_eri_read(ioaddr, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0)
+                        if ((rtl8168_eri_read(tp, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0)
                                 break;
                         mdelay(1);
                 }
@@ -27254,7 +27309,7 @@
         break;
         }
 
-        RTL_W16(RxMaxSize, tp->rx_buf_sz);
+        RTL_W16(tp, RxMaxSize, tp->rx_buf_sz);
 
         rtl8168_disable_rxdvgate(dev);
 
@@ -27314,12 +27369,13 @@
         case CFG_METHOD_30:
         case CFG_METHOD_31:
         case CFG_METHOD_32:
+        case CFG_METHOD_33:
                 if (aspm) {
-                        RTL_W8(Config5, RTL_R8(Config5) | BIT_0);
-                        RTL_W8(Config2, RTL_R8(Config2) | BIT_7);
+                        RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0);
+                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7);
                 } else {
-                        RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7);
-                        RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0);
+                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7);
+                        RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0);
                 }
                 break;
         }
@@ -27333,11 +27389,10 @@
 rtl8168_hw_start(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
-        RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+        RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
 
-        rtl8168_enable_hw_interrupt(tp, ioaddr);
+        rtl8168_enable_hw_interrupt(tp);
 }
 
 
@@ -27414,8 +27469,8 @@
 {
         struct pci_dev *pdev = tp->pci_dev;
 
-        pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
-                         PCI_DMA_FROMDEVICE);
+        dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
+                         DMA_FROM_DEVICE);
         dev_kfree_skb(*sk_buff);
         *sk_buff = NULL;
         rtl8168_make_unusable_by_asic(desc);
@@ -27461,8 +27516,8 @@
 
         skb_reserve(skb, RTK_RX_ALIGN);
 
-        mapping = pci_map_single(tp->pci_dev, skb->data, rx_buf_sz,
-                                 PCI_DMA_FROMDEVICE);
+        mapping = dma_map_single(&tp->pci_dev->dev, skb->data, rx_buf_sz,
+                                 DMA_FROM_DEVICE);
         if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
                 if (unlikely(net_ratelimit()))
                         netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
@@ -27528,15 +27583,13 @@
 static void
 rtl8168_desc_addr_fill(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr = tp->mmio_addr;
-
         if (!tp->TxPhyAddr || !tp->RxPhyAddr)
                 return;
 
-        RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_BIT_MASK(32)));
-        RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
-        RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32)));
-        RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
+        RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_BIT_MASK(32)));
+        RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
+        RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32)));
+        RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
 }
 
 static void
@@ -27607,7 +27660,7 @@
 {
         unsigned int len = tx_skb->len;
 
-        pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
+        dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);
         desc->opts1 = 0x00;
         desc->opts2 = 0x00;
         desc->addr = 0x00;
@@ -27673,6 +27726,9 @@
 static void rtl8168_cancel_schedule_work(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
+        struct work_struct *work = &tp->task.work;
+
+        if (!work->func) return;
 
         cancel_delayed_work_sync(&tp->task);
 }
@@ -27682,7 +27738,6 @@
 rtl8168_wait_for_quiescence(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         synchronize_irq(dev->irq);
 
@@ -27693,7 +27748,7 @@
 #endif
 #endif//CONFIG_R8168_NAPI
 
-        rtl8168_irq_mask_and_ack(tp, ioaddr);
+        rtl8168_irq_mask_and_ack(tp);
 
 #ifdef CONFIG_R8168_NAPI
 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
@@ -27760,9 +27815,9 @@
         rtl8168_wait_for_quiescence(dev);
 
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-        rtl8168_rx_interrupt(dev, tp, tp->mmio_addr, &budget);
+        rtl8168_rx_interrupt(dev, tp, &budget);
 #else
-        rtl8168_rx_interrupt(dev, tp, tp->mmio_addr, budget);
+        rtl8168_rx_interrupt(dev, tp, budget);
 #endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
 
         spin_lock_irqsave(&tp->lock, flags);
@@ -27804,6 +27859,17 @@
         rtl8168_schedule_work(dev, rtl8168_reset_task);
 }
 
+static u32
+rtl8168_get_txd_opts1(u32 opts1, u32 len, unsigned int entry)
+{
+        u32 status = opts1 | len;
+
+        if (entry == NUM_TX_DESC - 1)
+                status |= RingEnd;
+
+        return status;
+}
+
 static int
 rtl8168_xmit_frags(struct rtl8168_private *tp,
                    struct sk_buff *skb,
@@ -27813,9 +27879,10 @@
         struct skb_shared_info *info = skb_shinfo(skb);
         unsigned int cur_frag, entry;
         struct TxDesc *txd = NULL;
+        const unsigned char nr_frags = info->nr_frags;
 
         entry = tp->cur_tx;
-        for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
+        for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
                 skb_frag_t *frag = info->frags + cur_frag;
                 dma_addr_t mapping;
                 u32 status, len;
@@ -27831,7 +27898,7 @@
                 len = skb_frag_size(frag);
                 addr = skb_frag_address(frag);
 #endif
-                mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
+                mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE);
 
                 if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
                         if (unlikely(net_ratelimit()))
@@ -27841,20 +27908,19 @@
                 }
 
                 /* anti gcc 2.95.3 bugware (sic) */
-                status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
+                status = rtl8168_get_txd_opts1(opts1, len, entry);
+                if (cur_frag == (nr_frags - 1)) {
+                        tp->tx_skb[entry].skb = skb;
+                        status |= LastFrag;
+                }
 
                 txd->addr = cpu_to_le64(mapping);
 
                 tp->tx_skb[entry].len = len;
 
-                txd->opts1 = cpu_to_le32(status);
                 txd->opts2 = cpu_to_le32(opts2);
-        }
-
-        if (cur_frag) {
-                tp->tx_skb[entry].skb = skb;
                 wmb();
-                txd->opts1 |= cpu_to_le32(LastFrag);
+                txd->opts1 = cpu_to_le32(status);
         }
 
         return cur_frag;
@@ -27976,7 +28042,7 @@
         txd = tp->TxDescArray + entry;
         len = ETH_ZLEN - skb->len;
         addr = tp->ShortPacketEmptyBuffer;
-        mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
+        mapping = dma_map_single(&tp->pci_dev->dev, addr, len, DMA_TO_DEVICE);
         if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
                 if (unlikely(net_ratelimit()))
                         netif_err(tp, drv, tp->dev,
@@ -27984,15 +28050,14 @@
                 ret = -ENOMEM;
                 goto out;
         }
-        status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
+        status = rtl8168_get_txd_opts1(opts1, len, entry);
+        status |= LastFrag;
 
         txd->addr = cpu_to_le64(mapping);
 
-        txd->opts1 = cpu_to_le32(status);
         txd->opts2 = cpu_to_le32(opts2);
-
         wmb();
-        txd->opts1 |= cpu_to_le32(LastFrag);
+        txd->opts1 = cpu_to_le32(status);
 out:
         return ret;
 }
@@ -28068,7 +28133,6 @@
         struct rtl8168_private *tp = netdev_priv(dev);
         unsigned int entry;
         struct TxDesc *txd;
-        void __iomem *ioaddr = tp->mmio_addr;
         dma_addr_t mapping;
         u32 len;
         u32 opts1;
@@ -28182,8 +28246,8 @@
                 }
         }
 
-        opts1 |= len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
-        mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
+        opts1 = rtl8168_get_txd_opts1(opts1, len, entry);
+        mapping = dma_map_single(&tp->pci_dev->dev, skb->data, len, DMA_TO_DEVICE);
         if (unlikely(dma_mapping_error(&tp->pci_dev->dev, mapping))) {
                 if (unlikely(net_ratelimit()))
                         netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
@@ -28192,7 +28256,6 @@
         tp->tx_skb[entry].len = len;
         txd->addr = cpu_to_le64(mapping);
         txd->opts2 = cpu_to_le32(opts2);
-        txd->opts1 = cpu_to_le32(opts1&~DescOwn);
         wmb();
         txd->opts1 = cpu_to_le32(opts1);
 
@@ -28206,7 +28269,7 @@
 
         wmb();
 
-        RTL_W8(TxPoll, NPQ);    /* set polling bit */
+        RTL_W8(tp, TxPoll, NPQ);    /* set polling bit */
 
         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
                 netif_stop_queue(dev);
@@ -28238,14 +28301,12 @@
 
 static void
 rtl8168_tx_interrupt(struct net_device *dev,
-                     struct rtl8168_private *tp,
-                     void __iomem *ioaddr)
+                     struct rtl8168_private *tp)
 {
         unsigned int dirty_tx, tx_left;
 
         assert(dev != NULL);
         assert(tp != NULL);
-        assert(ioaddr != NULL);
 
         dirty_tx = tp->dirty_tx;
         smp_rmb();
@@ -28290,7 +28351,7 @@
                 }
                 smp_rmb();
                 if (tp->cur_tx != dirty_tx)
-                        RTL_W8(TxPoll, NPQ);
+                        RTL_W8(tp, TxPoll, NPQ);
         }
 }
 
@@ -28380,7 +28441,7 @@
 static int
 rtl8168_rx_interrupt(struct net_device *dev,
                      struct rtl8168_private *tp,
-                     void __iomem *ioaddr, napi_budget budget)
+                     napi_budget budget)
 {
         unsigned int cur_rx, rx_left;
         unsigned int delta, count = 0;
@@ -28391,7 +28452,6 @@
 
         assert(dev != NULL);
         assert(tp != NULL);
-        assert(ioaddr != NULL);
 
         if ((tp->RxDescArray == NULL) || (tp->Rx_skbuff == NULL))
                 goto rx_out;
@@ -28428,8 +28488,6 @@
                 } else {
                         struct sk_buff *skb;
                         int pkt_size;
-                        void (*pci_action)(struct pci_dev *, dma_addr_t,
-                                           size_t, int);
 
 process_pkt:
                         if (likely(!(dev->features & NETIF_F_RXFCS)))
@@ -28450,22 +28508,23 @@
                         }
 
                         skb = tp->Rx_skbuff[entry];
-                        if (tp->cp_cmd & RxChkSum)
-                                rtl8168_rx_csum(tp, skb, desc);
 
-                        pci_dma_sync_single_for_cpu(tp->pci_dev,
-                                                    le64_to_cpu(desc->addr), tp->rx_buf_sz,
-                                                    PCI_DMA_FROMDEVICE);
+                        dma_sync_single_for_cpu(&tp->pci_dev->dev,
+                                                le64_to_cpu(desc->addr), tp->rx_buf_sz,
+                                                DMA_FROM_DEVICE);
 
-                        pci_action = pci_dma_sync_single_for_device;
                         if (rtl8168_try_rx_copy(tp, &skb, pkt_size,
                                                 desc, tp->rx_buf_sz)) {
-                                pci_action = pci_unmap_single;
                                 tp->Rx_skbuff[entry] = NULL;
+                                dma_unmap_single(&tp->pci_dev->dev, le64_to_cpu(desc->addr),
+                                                 tp->rx_buf_sz, DMA_FROM_DEVICE);
+                        } else {
+                                dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(desc->addr),
+                                                           tp->rx_buf_sz, DMA_FROM_DEVICE);
                         }
 
-                        pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
-                                   tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
+                        if (tp->cp_cmd & RxChkSum)
+                                rtl8168_rx_csum(tp, skb, desc);
 
                         skb->dev = dev;
                         skb_put(skb, pkt_size);
@@ -28525,12 +28584,11 @@
 {
         struct net_device *dev = (struct net_device *) dev_instance;
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
         int status;
         int handled = 0;
 
         do {
-                status = RTL_R16(IntrStatus);
+                status = RTL_R16(tp, IntrStatus);
 
                 if (!(tp->features & RTL_FEATURE_MSI)) {
                         /* hotplug/major error/no more work/shared irq */
@@ -28543,7 +28601,7 @@
 
                 handled = 1;
 
-                rtl8168_disable_hw_interrupt(tp, ioaddr);
+                rtl8168_disable_hw_interrupt(tp);
 
                 switch (tp->mcfg) {
                 case CFG_METHOD_9:
@@ -28570,11 +28628,12 @@
                 case CFG_METHOD_30:
                 case CFG_METHOD_31:
                 case CFG_METHOD_32:
+                case CFG_METHOD_33:
                         /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
-                        RTL_W16(IntrStatus, status&~RxFIFOOver);
+                        RTL_W16(tp, IntrStatus, status&~RxFIFOOver);
                         break;
                 default:
-                        RTL_W16(IntrStatus, status);
+                        RTL_W16(tp, IntrStatus, status);
                         break;
                 }
 
@@ -28601,7 +28660,7 @@
                                 if (status & ISRIMR_DASH_INTR_CMAC_RESET)
                                         tp->CmacResetIntr = TRUE;
 
-                                DashIntType2Status = RTL_CMAC_R8(CMAC_IBISR0);
+                                DashIntType2Status = RTL_CMAC_R8(tp, CMAC_IBISR0);
                                 if (DashIntType2Status & ISRIMR_DASH_TYPE2_ROK) {
                                         tp->RcvFwDashOkEvt = TRUE;
                                 }
@@ -28612,7 +28671,7 @@
                                         tp->DashFwDisableRx = TRUE;
                                 }
 
-                                RTL_CMAC_W8(CMAC_IBISR0, DashIntType2Status);
+                                RTL_CMAC_W8(tp, CMAC_IBISR0, DashIntType2Status);
                         } else {
                                 if (status & ISRIMR_DP_REQSYS_OK) {
                                         tp->RcvFwReqSysOkEvt = TRUE;
@@ -28639,7 +28698,7 @@
                                        dev->name, status);
                 } else {
                         tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
-                        rtl8168_switch_to_hw_interrupt(tp, ioaddr);
+                        rtl8168_switch_to_hw_interrupt(tp);
                 }
 #else
                 if (status & tp->intr_mask || tp->keep_intr_cnt-- > 0) {
@@ -28648,11 +28707,11 @@
                         if (status & tp->intr_mask)
                                 tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                        rtl8168_rx_interrupt(dev, tp, tp->mmio_addr, &budget);
+                        rtl8168_rx_interrupt(dev, tp, &budget);
 #else
-                        rtl8168_rx_interrupt(dev, tp, tp->mmio_addr, budget);
+                        rtl8168_rx_interrupt(dev, tp, budget);
 #endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                        rtl8168_tx_interrupt(dev, tp, ioaddr);
+                        rtl8168_tx_interrupt(dev, tp);
 
 #ifdef ENABLE_DASH_SUPPORT
                         if ( tp->DASH ) {
@@ -28662,10 +28721,10 @@
                         }
 #endif
 
-                        rtl8168_switch_to_timer_interrupt(tp, ioaddr);
+                        rtl8168_switch_to_timer_interrupt(tp);
                 } else {
                         tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
-                        rtl8168_switch_to_hw_interrupt(tp, ioaddr);
+                        rtl8168_switch_to_hw_interrupt(tp);
                 }
 #endif
 
@@ -28678,16 +28737,15 @@
 static int rtl8168_poll(napi_ptr napi, napi_budget budget)
 {
         struct rtl8168_private *tp = RTL_GET_PRIV(napi, struct rtl8168_private);
-        void __iomem *ioaddr = tp->mmio_addr;
         RTL_GET_NETDEV(tp)
         unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
         unsigned int work_done;
         unsigned long flags;
 
-        work_done = rtl8168_rx_interrupt(dev, tp, ioaddr, budget);
+        work_done = rtl8168_rx_interrupt(dev, tp, budget);
 
         spin_lock_irqsave(&tp->lock, flags);
-        rtl8168_tx_interrupt(dev, tp, ioaddr);
+        rtl8168_tx_interrupt(dev, tp);
         spin_unlock_irqrestore(&tp->lock, flags);
 
         RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
@@ -28716,7 +28774,7 @@
                  */
                 smp_wmb();
 
-                rtl8168_switch_to_timer_interrupt(tp, ioaddr);
+                rtl8168_switch_to_timer_interrupt(tp);
         }
 
         return RTL_NAPI_RETURN_VALUE;
@@ -28726,15 +28784,14 @@
 static void rtl8168_sleep_rx_enable(struct net_device *dev)
 {
         struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
 
         if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2)) {
-                RTL_W8(ChipCmd, CmdReset);
+                RTL_W8(tp, ChipCmd, CmdReset);
                 rtl8168_rx_desc_offset0_init(tp, 0);
-                RTL_W8(ChipCmd, CmdRxEnb);
+                RTL_W8(tp, ChipCmd, CmdRxEnb);
         } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
-                rtl8168_ephy_write(ioaddr, 0x19, 0xFF64);
-                RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
+                rtl8168_ephy_write(tp, 0x19, 0xFF64);
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
         }
 }
 
@@ -28804,16 +28861,16 @@
 
                 free_irq(dev->irq, dev);
 
-                pci_free_consistent(pdev, R8168_RX_RING_BYTES, tp->RxDescArray,
-                                    tp->RxPhyAddr);
-                pci_free_consistent(pdev, R8168_TX_RING_BYTES, tp->TxDescArray,
-                                    tp->TxPhyAddr);
+                dma_free_coherent(&pdev->dev, R8168_RX_RING_BYTES, tp->RxDescArray,
+                                  tp->RxPhyAddr);
+                dma_free_coherent(&pdev->dev, R8168_TX_RING_BYTES, tp->TxDescArray,
+                                  tp->TxPhyAddr);
                 tp->TxDescArray = NULL;
                 tp->RxDescArray = NULL;
 
                 if (tp->ShortPacketEmptyBuffer != NULL) {
-                        pci_free_consistent(pdev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer,
-                                            tp->ShortPacketEmptyBufferPhy);
+                        dma_free_coherent(&pdev->dev, SHORT_PACKET_PADDING_BUF_SIZE, tp->ShortPacketEmptyBuffer,
+                                          tp->ShortPacketEmptyBufferPhy);
                         tp->ShortPacketEmptyBuffer = NULL;
                 }
         } else {
@@ -28835,7 +28892,7 @@
         struct net_device *dev = pci_get_drvdata(pdev);
         struct rtl8168_private *tp = netdev_priv(dev);
 
-        if (tp->DASH)
+        if (HW_DASH_SUPPORT_DASH(tp))
                 rtl8168_driver_stop(tp);
 
         rtl8168_set_bios_setting(dev);
@@ -28925,7 +28982,7 @@
         spin_unlock_irqrestore(&tp->lock, flags);
 
 out:
-        if (tp->DASH) {
+        if (HW_DASH_SUPPORT_DASH(tp)) {
                 spin_lock_irqsave(&tp->lock, flags);
                 rtl8168_driver_stop(tp);
                 spin_unlock_irqrestore(&tp->lock, flags);
@@ -28968,7 +29025,7 @@
         spin_unlock_irqrestore(&tp->lock, flags);
 
         if (!netif_running(dev)) {
-                if (tp->DASH) {
+                if (HW_DASH_SUPPORT_DASH(tp)) {
                         spin_lock_irqsave(&tp->lock, flags);
                         rtl8168_driver_start(tp);
                         spin_unlock_irqrestore(&tp->lock, flags);

r8168-8.047.05.tar.bz2/src/rtl_eeprom.c -> r8168-8.048.00.tar.bz2/src/rtl_eeprom.c Changed

@@ -52,18 +52,17 @@
 //-------------------------------------------------------------------
 void rtl8168_eeprom_type(struct rtl8168_private *tp)
 {
-        void __iomem *ioaddr=tp->mmio_addr;
         u16 magic = 0;
 
         if (tp->mcfg == CFG_METHOD_DEFAULT)
                 goto out_no_eeprom;
 
-        if(RTL_R8(0xD2)&0x04) {
+        if(RTL_R8(tp, 0xD2)&0x04) {
                 //not support
                 //tp->eeprom_type = EEPROM_TWSI;
                 //tp->eeprom_len = 256;
                 goto out_no_eeprom;
-        } else if(RTL_R32(RxConfig) & RxCfg_9356SEL) {
+        } else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) {
                 tp->eeprom_type = EEPROM_TYPE_93C56;
                 tp->eeprom_len = 256;
         } else {
@@ -80,28 +79,28 @@
         }
 }
 
-void rtl8168_eeprom_cleanup(void __iomem *ioaddr)
+void rtl8168_eeprom_cleanup(struct rtl8168_private *tp)
 {
         u8 x;
 
-        x = RTL_R8(Cfg9346);
+        x = RTL_R8(tp, Cfg9346);
         x &= ~(Cfg9346_EEDI | Cfg9346_EECS);
 
-        RTL_W8(Cfg9346, x);
+        RTL_W8(tp, Cfg9346, x);
 
-        rtl8168_raise_clock(&x, ioaddr);
-        rtl8168_lower_clock(&x, ioaddr);
+        rtl8168_raise_clock(tp, &x);
+        rtl8168_lower_clock(tp, &x);
 }
 
-int rtl8168_eeprom_cmd_done(void __iomem *ioaddr)
+int rtl8168_eeprom_cmd_done(struct rtl8168_private *tp)
 {
         u8 x;
         int i;
 
-        rtl8168_stand_by(ioaddr);
+        rtl8168_stand_by(tp);
 
         for (i = 0; i < 50000; i++) {
-                x = RTL_R8(Cfg9346);
+                x = RTL_R8(tp, Cfg9346);
 
                 if (x & Cfg9346_EEDO) {
                         udelay(RTL_CLOCK_RATE * 2 * 3);
@@ -119,7 +118,6 @@
 //-------------------------------------------------------------------
 u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg)
 {
-        void __iomem *ioaddr=tp->mmio_addr;
         int addr_sz = 6;
         u8 x;
         u16 data;
@@ -134,16 +132,16 @@
                 addr_sz = 8;
 
         x = Cfg9346_EEM1 | Cfg9346_EECS;
-        RTL_W8(Cfg9346, x);
+        RTL_W8(tp, Cfg9346, x);
 
-        rtl8168_shift_out_bits(RTL_EEPROM_READ_OPCODE, 3, ioaddr);
-        rtl8168_shift_out_bits(reg, addr_sz, ioaddr);
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
+        rtl8168_shift_out_bits(tp, reg, addr_sz);
 
-        data = rtl8168_shift_in_bits(ioaddr);
+        data = rtl8168_shift_in_bits(tp);
 
-        rtl8168_eeprom_cleanup(ioaddr);
+        rtl8168_eeprom_cleanup(tp);
 
-        RTL_W8(Cfg9346, 0);
+        RTL_W8(tp, Cfg9346, 0);
 
         return data;
 }
@@ -154,7 +152,6 @@
 //-------------------------------------------------------------------
 void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data)
 {
-        void __iomem *ioaddr=tp->mmio_addr;
         u8 x;
         int addr_sz = 6;
         int w_dummy_addr = 4;
@@ -172,56 +169,56 @@
         }
 
         x = Cfg9346_EEM1 | Cfg9346_EECS;
-        RTL_W8(Cfg9346, x);
+        RTL_W8(tp, Cfg9346, x);
 
-        rtl8168_shift_out_bits(RTL_EEPROM_EWEN_OPCODE, 5, ioaddr);
-        rtl8168_shift_out_bits(reg, w_dummy_addr, ioaddr);
-        rtl8168_stand_by(ioaddr);
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
+        rtl8168_shift_out_bits(tp, reg, w_dummy_addr);
+        rtl8168_stand_by(tp);
 
-        rtl8168_shift_out_bits(RTL_EEPROM_ERASE_OPCODE, 3, ioaddr);
-        rtl8168_shift_out_bits(reg, addr_sz, ioaddr);
-        if (rtl8168_eeprom_cmd_done(ioaddr) < 0) {
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
+        rtl8168_shift_out_bits(tp, reg, addr_sz);
+        if (rtl8168_eeprom_cmd_done(tp) < 0) {
                 return;
         }
-        rtl8168_stand_by(ioaddr);
+        rtl8168_stand_by(tp);
 
-        rtl8168_shift_out_bits(RTL_EEPROM_WRITE_OPCODE, 3, ioaddr);
-        rtl8168_shift_out_bits(reg, addr_sz, ioaddr);
-        rtl8168_shift_out_bits(data, 16, ioaddr);
-        if (rtl8168_eeprom_cmd_done(ioaddr) < 0) {
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
+        rtl8168_shift_out_bits(tp, reg, addr_sz);
+        rtl8168_shift_out_bits(tp, data, 16);
+        if (rtl8168_eeprom_cmd_done(tp) < 0) {
                 return;
         }
-        rtl8168_stand_by(ioaddr);
+        rtl8168_stand_by(tp);
 
-        rtl8168_shift_out_bits(RTL_EEPROM_EWDS_OPCODE, 5, ioaddr);
-        rtl8168_shift_out_bits(reg, w_dummy_addr, ioaddr);
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
+        rtl8168_shift_out_bits(tp, reg, w_dummy_addr);
 
-        rtl8168_eeprom_cleanup(ioaddr);
-        RTL_W8(Cfg9346, 0);
+        rtl8168_eeprom_cleanup(tp);
+        RTL_W8(tp, Cfg9346, 0);
 }
 
-void rtl8168_raise_clock(u8 *x, void __iomem *ioaddr)
+void rtl8168_raise_clock(struct rtl8168_private *tp, u8 *x)
 {
         *x = *x | Cfg9346_EESK;
-        RTL_W8(Cfg9346, *x);
+        RTL_W8(tp, Cfg9346, *x);
         udelay(RTL_CLOCK_RATE);
 }
 
-void rtl8168_lower_clock(u8 *x, void __iomem *ioaddr)
+void rtl8168_lower_clock(struct rtl8168_private *tp, u8 *x)
 {
 
         *x = *x & ~Cfg9346_EESK;
-        RTL_W8(Cfg9346, *x);
+        RTL_W8(tp, Cfg9346, *x);
         udelay(RTL_CLOCK_RATE);
 }
 
-void rtl8168_shift_out_bits(int data, int count, void __iomem *ioaddr)
+void rtl8168_shift_out_bits(struct rtl8168_private *tp, int data, int count)
 {
         u8 x;
         int  mask;
 
         mask = 0x01 << (count - 1);
-        x = RTL_R8(Cfg9346);
+        x = RTL_R8(tp, Cfg9346);
         x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
 
         do {
@@ -230,62 +227,62 @@
                 else
                         x &= ~Cfg9346_EEDI;
 
-                RTL_W8(Cfg9346, x);
+                RTL_W8(tp, Cfg9346, x);
                 udelay(RTL_CLOCK_RATE);
-                rtl8168_raise_clock(&x, ioaddr);
-                rtl8168_lower_clock(&x, ioaddr);
+                rtl8168_raise_clock(tp, &x);
+                rtl8168_lower_clock(tp, &x);
                 mask = mask >> 1;
         } while(mask);
 
         x &= ~Cfg9346_EEDI;
-        RTL_W8(Cfg9346, x);
+        RTL_W8(tp, Cfg9346, x);
 }
 
-u16 rtl8168_shift_in_bits(void __iomem *ioaddr)
+u16 rtl8168_shift_in_bits(struct rtl8168_private *tp)
 {
         u8 x;
         u16 d, i;
 
-        x = RTL_R8(Cfg9346);
+        x = RTL_R8(tp, Cfg9346);
         x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
 
         d = 0;
 
         for (i = 0; i < 16; i++) {
                 d = d << 1;
-                rtl8168_raise_clock(&x, ioaddr);
+                rtl8168_raise_clock(tp, &x);
 
-                x = RTL_R8(Cfg9346);
+                x = RTL_R8(tp, Cfg9346);
                 x &= ~Cfg9346_EEDI;
 
                 if (x & Cfg9346_EEDO)
                         d |= 1;
 
-                rtl8168_lower_clock(&x, ioaddr);
+                rtl8168_lower_clock(tp, &x);
         }
 
         return d;
 }
 
-void rtl8168_stand_by(void __iomem *ioaddr)
+void rtl8168_stand_by(struct rtl8168_private *tp)
 {
         u8 x;
 
-        x = RTL_R8(Cfg9346);
+        x = RTL_R8(tp, Cfg9346);
         x &= ~(Cfg9346_EECS | Cfg9346_EESK);
-        RTL_W8(Cfg9346, x);
+        RTL_W8(tp, Cfg9346, x);
         udelay(RTL_CLOCK_RATE);
 
         x |= Cfg9346_EECS;
-        RTL_W8(Cfg9346, x);
+        RTL_W8(tp, Cfg9346, x);
 }
 
-void rtl8168_set_eeprom_sel_low(void __iomem *ioaddr)
+void rtl8168_set_eeprom_sel_low(struct rtl8168_private *tp)
 {
-        RTL_W8(Cfg9346, Cfg9346_EEM1);
-        RTL_W8(Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
+        RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
+        RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
 
         udelay(20);
 
-        RTL_W8(Cfg9346, Cfg9346_EEM1);
+        RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
 }

r8168-8.047.05.tar.bz2/src/rtl_eeprom.h -> r8168-8.048.00.tar.bz2/src/rtl_eeprom.h Changed

@@ -41,15 +41,15 @@
 #define RTL_CLOCK_RATE  3
 
 void rtl8168_eeprom_type(struct rtl8168_private *tp);
-void rtl8168_eeprom_cleanup(void __iomem *ioaddr);
+void rtl8168_eeprom_cleanup(struct rtl8168_private *tp);
 u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg);
 void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data);
-void rtl8168_shift_out_bits(int data, int count, void __iomem *ioaddr);
-u16 rtl8168_shift_in_bits(void __iomem *ioaddr);
-void rtl8168_raise_clock(u8 *x, void __iomem *ioaddr);
-void rtl8168_lower_clock(u8 *x, void __iomem *ioaddr);
-void rtl8168_stand_by(void __iomem *ioaddr);
-void rtl8168_set_eeprom_sel_low(void __iomem *ioaddr);
+void rtl8168_shift_out_bits(struct rtl8168_private *tp, int data, int count);
+u16 rtl8168_shift_in_bits(struct rtl8168_private *tp);
+void rtl8168_raise_clock(struct rtl8168_private *tp, u8 *x);
+void rtl8168_lower_clock(struct rtl8168_private *tp, u8 *x);
+void rtl8168_stand_by(struct rtl8168_private *tp);
+void rtl8168_set_eeprom_sel_low(struct rtl8168_private *tp);

r8168-8.047.05.tar.bz2/src/rtltool.c -> r8168-8.048.00.tar.bz2/src/rtltool.c Changed

@@ -121,7 +121,7 @@
                         return -EPERM;
 
                 spin_lock_irqsave(&tp->lock, flags);
-                my_cmd.data = rtl8168_ephy_read(tp->mmio_addr, my_cmd.offset);
+                my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset);
                 spin_unlock_irqrestore(&tp->lock, flags);
 
                 if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
@@ -136,7 +136,7 @@
                         return -EPERM;
 
                 spin_lock_irqsave(&tp->lock, flags);
-                rtl8168_ephy_write(tp->mmio_addr, my_cmd.offset, my_cmd.data);
+                rtl8168_ephy_write(tp, my_cmd.offset, my_cmd.data);
                 spin_unlock_irqrestore(&tp->lock, flags);
                 break;
 
@@ -144,7 +144,7 @@
                 my_cmd.data = 0;
                 if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
                         spin_lock_irqsave(&tp->lock, flags);
-                        my_cmd.data = rtl8168_eri_read(tp->mmio_addr, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
+                        my_cmd.data = rtl8168_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
                         spin_unlock_irqrestore(&tp->lock, flags);
                 } else {
                         ret = -EOPNOTSUPP;
@@ -167,7 +167,7 @@
 
                 if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
                         spin_lock_irqsave(&tp->lock, flags);
-                        rtl8168_eri_write(tp->mmio_addr, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
                         spin_unlock_irqrestore(&tp->lock, flags);
                 } else {
                         ret = -EOPNOTSUPP;

Build Results
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Comments for request 4992 0

Request History

bitstreamout created request almost 5 years ago

- Update to new version 8.048.00
- Modify patch r8168-kernel_version.patch as upstream now supports 5.4

- Modify patch r8168-kernel_version.patch to let it build with 5.4

hillwood accepted request almost 5 years ago